#define TMCS 0x64
#define TEPR 0x65
-/*
- * FIXME: DAR here clashed with asm-ppc/reg.h and asm-sh/.../dma.h
- */
-#undef DAR
/* DMA Controller Register macros */
#define DAR 0x80
#define DARL 0x80
cleanup:
if (retval) {
if (tty->count == 1)
- info->tty = NULL;/* tty layer will release tty struct */
+ info->tty = 0; /* tty layer will release tty struct */
if(info->count)
info->count--;
}
shutdown(info);
tty->closing = 0;
- info->tty = NULL;
+ info->tty = 0;
if (info->blocked_open) {
if (info->close_delay) {
info->count = 0;
info->flags &= ~ASYNC_NORMAL_ACTIVE;
- info->tty = NULL;
+ info->tty = 0;
wake_up_interruptible(&info->open_wait);
}
if (info->tx_buf) {
kfree(info->tx_buf);
- info->tx_buf = NULL;
+ info->tx_buf = 0;
}
spin_lock_irqsave(&info->lock,flags);
if (info->memory_base){
iounmap(info->memory_base);
- info->memory_base = NULL;
+ info->memory_base = 0;
}
if (info->sca_base) {
iounmap(info->sca_base - info->sca_offset);
- info->sca_base=NULL;
+ info->sca_base=0;
}
if (info->statctrl_base) {
iounmap(info->statctrl_base - info->statctrl_offset);
- info->statctrl_base=NULL;
+ info->statctrl_base=0;
}
if (info->lcr_base){
iounmap(info->lcr_base - info->lcr_offset);
- info->lcr_base = NULL;
+ info->lcr_base = 0;
}
if ( debug_level >= DEBUG_LEVEL_INFO )
u32 speed = info->params.clock_speed;
info->params.clock_speed = 3686400;
- info->tty = NULL;
+ info->tty = 0;
/* assume failure */
info->init_error = DiagStatus_DmaFailure;