*
*/
-
-#include <linux/config.h>
#include <linux/module.h>
#include <linux/init.h>
-
#include <linux/pci.h>
#include <linux/pci_ids.h>
-
#include <linux/slab.h>
-
#include "edac_mc.h"
+#define E752X_REVISION " Ver: 2.0.1 " __DATE__
+#define EDAC_MOD_STR "e752x_edac"
+
+static int force_function_unhide;
+
+#define e752x_printk(level, fmt, arg...) \
+ edac_printk(level, "e752x", fmt, ##arg)
+
+#define e752x_mc_printk(mci, level, fmt, arg...) \
+ edac_mc_chipset_printk(mci, level, "e752x", fmt, ##arg)
#ifndef PCI_DEVICE_ID_INTEL_7520_0
#define PCI_DEVICE_ID_INTEL_7520_0 0x3590
#define E752X_NR_CSROWS 8 /* number of csrows */
-
/* E752X register addresses - device 0 function 0 */
#define E752X_DRB 0x60 /* DRAM row boundary register (8b) */
#define E752X_DRA 0x70 /* DRAM row attribute register (8b) */
E7320 = 2
};
-
struct e752x_pvt {
struct pci_dev *bridge_ck;
struct pci_dev *dev_d0f0;
const struct e752x_dev_info *dev_info;
};
-
struct e752x_dev_info {
u16 err_dev;
+ u16 ctl_dev;
const char *ctl_name;
};
static const struct e752x_dev_info e752x_devs[] = {
[E7520] = {
- .err_dev = PCI_DEVICE_ID_INTEL_7520_1_ERR,
- .ctl_name = "E7520"},
+ .err_dev = PCI_DEVICE_ID_INTEL_7520_1_ERR,
+ .ctl_dev = PCI_DEVICE_ID_INTEL_7520_0,
+ .ctl_name = "E7520"
+ },
[E7525] = {
- .err_dev = PCI_DEVICE_ID_INTEL_7525_1_ERR,
- .ctl_name = "E7525"},
+ .err_dev = PCI_DEVICE_ID_INTEL_7525_1_ERR,
+ .ctl_dev = PCI_DEVICE_ID_INTEL_7525_0,
+ .ctl_name = "E7525"
+ },
[E7320] = {
- .err_dev = PCI_DEVICE_ID_INTEL_7320_1_ERR,
- .ctl_name = "E7320"},
+ .err_dev = PCI_DEVICE_ID_INTEL_7320_1_ERR,
+ .ctl_dev = PCI_DEVICE_ID_INTEL_7320_0,
+ .ctl_name = "E7320"
+ },
};
-
static unsigned long ctl_page_to_phys(struct mem_ctl_info *mci,
- unsigned long page)
+ unsigned long page)
{
u32 remap;
struct e752x_pvt *pvt = (struct e752x_pvt *) mci->pvt_info;
- debugf3("MC: " __FILE__ ": %s()\n", __func__);
+ debugf3("%s()\n", __func__);
if (page < pvt->tolm)
return page;
+
if ((page >= 0x100000) && (page < pvt->remapbase))
return page;
+
remap = (page - pvt->tolm) + pvt->remapbase;
+
if (remap < pvt->remaplimit)
return remap;
- printk(KERN_ERR "Invalid page %lx - out of range\n", page);
+
+ e752x_printk(KERN_ERR, "Invalid page %lx - out of range\n", page);
return pvt->tolm - 1;
}
static void do_process_ce(struct mem_ctl_info *mci, u16 error_one,
- u32 sec1_add, u16 sec1_syndrome)
+ u32 sec1_add, u16 sec1_syndrome)
{
u32 page;
int row;
int i;
struct e752x_pvt *pvt = (struct e752x_pvt *) mci->pvt_info;
- debugf3("MC: " __FILE__ ": %s()\n", __func__);
+ debugf3("%s()\n", __func__);
/* convert the addr to 4k page */
page = sec1_add >> (PAGE_SHIFT - 4);
if (pvt->mc_symmetric) {
/* chip select are bits 14 & 13 */
row = ((page >> 1) & 3);
- printk(KERN_WARNING
- "Test row %d Table %d %d %d %d %d %d %d %d\n",
- row, pvt->map[0], pvt->map[1], pvt->map[2],
- pvt->map[3], pvt->map[4], pvt->map[5],
- pvt->map[6], pvt->map[7]);
+ e752x_printk(KERN_WARNING,
+ "Test row %d Table %d %d %d %d %d %d %d %d\n", row,
+ pvt->map[0], pvt->map[1], pvt->map[2], pvt->map[3],
+ pvt->map[4], pvt->map[5], pvt->map[6], pvt->map[7]);
/* test for channel remapping */
for (i = 0; i < 8; i++) {
if (pvt->map[i] == row)
break;
}
- printk(KERN_WARNING "Test computed row %d\n", i);
+
+ e752x_printk(KERN_WARNING, "Test computed row %d\n", i);
+
if (i < 8)
row = i;
else
- printk(KERN_WARNING
- "MC%d: row %d not found in remap table\n",
- mci->mc_idx, row);
+ e752x_mc_printk(mci, KERN_WARNING,
+ "row %d not found in remap table\n", row);
} else
row = edac_mc_find_csrow_by_page(mci, page);
+
/* 0 = channel A, 1 = channel B */
channel = !(error_one & 1);
if (!pvt->map_type)
row = 7 - row;
+
edac_mc_handle_ce(mci, page, 0, sec1_syndrome, row, channel,
- "e752x CE");
+ "e752x CE");
}
-
static inline void process_ce(struct mem_ctl_info *mci, u16 error_one,
u32 sec1_add, u16 sec1_syndrome, int *error_found,
int handle_error)
do_process_ce(mci, error_one, sec1_add, sec1_syndrome);
}
-static void do_process_ue(struct mem_ctl_info *mci, u16 error_one, u32 ded_add,
- u32 scrb_add)
+static void do_process_ue(struct mem_ctl_info *mci, u16 error_one,
+ u32 ded_add, u32 scrb_add)
{
u32 error_2b, block_page;
int row;
struct e752x_pvt *pvt = (struct e752x_pvt *) mci->pvt_info;
- debugf3("MC: " __FILE__ ": %s()\n", __func__);
+ debugf3("%s()\n", __func__);
if (error_one & 0x0202) {
error_2b = ded_add;
+
/* convert to 4k address */
block_page = error_2b >> (PAGE_SHIFT - 4);
+
row = pvt->mc_symmetric ?
- /* chip select are bits 14 & 13 */
- ((block_page >> 1) & 3) :
- edac_mc_find_csrow_by_page(mci, block_page);
+ /* chip select are bits 14 & 13 */
+ ((block_page >> 1) & 3) :
+ edac_mc_find_csrow_by_page(mci, block_page);
+
edac_mc_handle_ue(mci, block_page, 0, row,
- "e752x UE from Read");
+ "e752x UE from Read");
}
if (error_one & 0x0404) {
error_2b = scrb_add;
+
/* convert to 4k address */
block_page = error_2b >> (PAGE_SHIFT - 4);
+
row = pvt->mc_symmetric ?
- /* chip select are bits 14 & 13 */
- ((block_page >> 1) & 3) :
- edac_mc_find_csrow_by_page(mci, block_page);
+ /* chip select are bits 14 & 13 */
+ ((block_page >> 1) & 3) :
+ edac_mc_find_csrow_by_page(mci, block_page);
+
edac_mc_handle_ue(mci, block_page, 0, row,
- "e752x UE from Scruber");
+ "e752x UE from Scruber");
}
}
if (!handle_error)
return;
- debugf3("MC: " __FILE__ ": %s()\n", __func__);
+ debugf3("%s()\n", __func__);
edac_mc_handle_ue_no_info(mci, "e752x UE log memory write");
}
struct e752x_pvt *pvt = (struct e752x_pvt *) mci->pvt_info;
error_1b = retry_add;
- page = error_1b >> (PAGE_SHIFT - 4); /* convert the addr to 4k page */
+ page = error_1b >> (PAGE_SHIFT - 4); /* convert the addr to 4k page */
row = pvt->mc_symmetric ?
- ((page >> 1) & 3) : /* chip select are bits 14 & 13 */
- edac_mc_find_csrow_by_page(mci, page);
- printk(KERN_WARNING
- "MC%d: CE page 0x%lx, row %d : Memory read retry\n",
- mci->mc_idx, (long unsigned int) page, row);
+ ((page >> 1) & 3) : /* chip select are bits 14 & 13 */
+ edac_mc_find_csrow_by_page(mci, page);
+ e752x_mc_printk(mci, KERN_WARNING,
+ "CE page 0x%lx, row %d : Memory read retry\n",
+ (long unsigned int) page, row);
}
static inline void process_ded_retry(struct mem_ctl_info *mci, u16 error,
*error_found = 1;
if (handle_error)
- printk(KERN_WARNING "MC%d: Memory threshold CE\n",
- mci->mc_idx);
+ e752x_mc_printk(mci, KERN_WARNING, "Memory threshold CE\n");
}
static char *global_message[11] = {
for (i = 0; i < 11; i++) {
if (errors & (1 << i))
- printk(KERN_WARNING "%sError %s\n",
- fatal_message[fatal], global_message[i]);
+ e752x_printk(KERN_WARNING, "%sError %s\n",
+ fatal_message[fatal], global_message[i]);
}
}
for (i = 0; i < 7; i++) {
if (errors & (1 << i))
- printk(KERN_WARNING "%sError %s\n",
- fatal_message[fatal], hub_message[i]);
+ e752x_printk(KERN_WARNING, "%sError %s\n",
+ fatal_message[fatal], hub_message[i]);
}
}
for (i = 0; i < 4; i++) {
if (errors & (1 << i))
- printk(KERN_WARNING "Non-Fatal Error %s\n",
- membuf_message[i]);
+ e752x_printk(KERN_WARNING, "Non-Fatal Error %s\n",
+ membuf_message[i]);
}
}
do_membuf_error(errors);
}
-#if 0
-char *sysbus_message[10] = {
+static char *sysbus_message[10] = {
"Addr or Request Parity",
"Data Strobe Glitch",
"Addr Strobe Glitch",
"Memory Parity",
"IO Subsystem Parity"
};
-#endif /* 0 */
static void do_sysbus_error(int fatal, u32 errors)
{
for (i = 0; i < 10; i++) {
if (errors & (1 << i))
- printk(KERN_WARNING "%sError System Bus %s\n",
- fatal_message[fatal], global_message[i]);
+ e752x_printk(KERN_WARNING, "%sError System Bus %s\n",
+ fatal_message[fatal], sysbus_message[i]);
}
}
do_sysbus_error(fatal, errors);
}
-static void e752x_check_hub_interface (struct e752x_error_info *info,
+static void e752x_check_hub_interface(struct e752x_error_info *info,
int *error_found, int handle_error)
{
u8 stat8;
//pci_read_config_byte(dev,E752X_HI_FERR,&stat8);
+
stat8 = info->hi_ferr;
+
if(stat8 & 0x7f) { /* Error, so process */
stat8 &= 0x7f;
+
if(stat8 & 0x2b)
hub_error(1, stat8 & 0x2b, error_found, handle_error);
+
if(stat8 & 0x54)
hub_error(0, stat8 & 0x54, error_found, handle_error);
}
+
//pci_read_config_byte(dev,E752X_HI_NERR,&stat8);
+
stat8 = info->hi_nerr;
+
if(stat8 & 0x7f) { /* Error, so process */
stat8 &= 0x7f;
+
if (stat8 & 0x2b)
hub_error(1, stat8 & 0x2b, error_found, handle_error);
+
if(stat8 & 0x54)
hub_error(0, stat8 & 0x54, error_found, handle_error);
}
}
-static void e752x_check_sysbus (struct e752x_error_info *info, int *error_found,
- int handle_error)
+static void e752x_check_sysbus(struct e752x_error_info *info,
+ int *error_found, int handle_error)
{
u32 stat32, error32;
error32 = (stat32 >> 16) & 0x3ff;
stat32 = stat32 & 0x3ff;
+
if(stat32 & 0x083)
sysbus_error(1, stat32 & 0x083, error_found, handle_error);
+
if(stat32 & 0x37c)
sysbus_error(0, stat32 & 0x37c, error_found, handle_error);
+
if(error32 & 0x083)
sysbus_error(1, error32 & 0x083, error_found, handle_error);
+
if(error32 & 0x37c)
sysbus_error(0, error32 & 0x37c, error_found, handle_error);
}
-static void e752x_check_membuf (struct e752x_error_info *info, int *error_found,
- int handle_error)
+static void e752x_check_membuf (struct e752x_error_info *info,
+ int *error_found, int handle_error)
{
u8 stat8;
stat8 = info->buf_ferr;
+
if (stat8 & 0x0f) { /* Error, so process */
stat8 &= 0x0f;
membuf_error(stat8, error_found, handle_error);
}
+
stat8 = info->buf_nerr;
+
if (stat8 & 0x0f) { /* Error, so process */
stat8 &= 0x0f;
membuf_error(stat8, error_found, handle_error);
}
static void e752x_check_dram (struct mem_ctl_info *mci,
- struct e752x_error_info *info, int *error_found, int handle_error)
+ struct e752x_error_info *info, int *error_found,
+ int handle_error)
{
u16 error_one, error_next;
}
static void e752x_get_error_info (struct mem_ctl_info *mci,
- struct e752x_error_info *info)
+ struct e752x_error_info *info)
{
struct pci_dev *dev;
struct e752x_pvt *pvt;
memset(info, 0, sizeof(*info));
pvt = (struct e752x_pvt *) mci->pvt_info;
dev = pvt->dev_d0f1;
-
pci_read_config_dword(dev, E752X_FERR_GLOBAL, &info->ferr_global);
if (info->ferr_global) {
static void e752x_check(struct mem_ctl_info *mci)
{
struct e752x_error_info info;
- debugf3("MC: " __FILE__ ": %s()\n", __func__);
+
+ debugf3("%s()\n", __func__);
e752x_get_error_info(mci, &info);
e752x_process_error_info(mci, &info, 1);
}
-static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
+/* Return 1 if dual channel mode is active. Else return 0. */
+static inline int dual_channel_active(u16 ddrcsr)
{
- int rc = -ENODEV;
- int index;
- u16 pci_data, stat;
- u32 stat32;
- u16 stat16;
- u8 stat8;
- struct mem_ctl_info *mci = NULL;
- struct e752x_pvt *pvt = NULL;
- u16 ddrcsr;
- u32 drc;
- int drc_chan; /* Number of channels 0=1chan,1=2chan */
- int drc_drbg; /* DRB granularity 0=64mb,1=128mb */
- int drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
- u32 dra;
- unsigned long last_cumul_size;
- struct pci_dev *pres_dev;
- struct pci_dev *dev = NULL;
-
- debugf0("MC: " __FILE__ ": %s(): mci\n", __func__);
- debugf0("Starting Probe1\n");
+ return (((ddrcsr >> 12) & 3) == 3);
+}
- /* enable device 0 function 1 */
- pci_read_config_byte(pdev, E752X_DEVPRES1, &stat8);
- stat8 |= (1 << 5);
- pci_write_config_byte(pdev, E752X_DEVPRES1, stat8);
+static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
+ u16 ddrcsr)
+{
+ struct csrow_info *csrow;
+ unsigned long last_cumul_size;
+ int index, mem_dev, drc_chan;
+ int drc_drbg; /* DRB granularity 0=64mb, 1=128mb */
+ int drc_ddim; /* DRAM Data Integrity Mode 0=none, 2=edac */
+ u8 value;
+ u32 dra, drc, cumul_size;
- /* need to find out the number of channels */
+ pci_read_config_dword(pdev, E752X_DRA, &dra);
pci_read_config_dword(pdev, E752X_DRC, &drc);
- pci_read_config_word(pdev, E752X_DDRCSR, &ddrcsr);
- /* FIXME: should check >>12 or 0xf, true for all? */
- /* Dual channel = 1, Single channel = 0 */
- drc_chan = (((ddrcsr >> 12) & 3) == 3);
- drc_drbg = drc_chan + 1; /* 128 in dual mode, 64 in single */
+ drc_chan = dual_channel_active(ddrcsr);
+ drc_drbg = drc_chan + 1; /* 128 in dual mode, 64 in single */
drc_ddim = (drc >> 20) & 0x3;
- mci = edac_mc_alloc(sizeof(*pvt), E752X_NR_CSROWS, drc_chan + 1);
-
- if (mci == NULL) {
- rc = -ENOMEM;
- goto fail;
- }
-
- debugf3("MC: " __FILE__ ": %s(): init mci\n", __func__);
-
- mci->mtype_cap = MEM_FLAG_RDDR;
- mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED |
- EDAC_FLAG_S4ECD4ED;
- /* FIXME - what if different memory types are in different csrows? */
- mci->mod_name = BS_MOD_STR;
- mci->mod_ver = "$Revision: 1.5.2.11 $";
- mci->pdev = pdev;
-
- debugf3("MC: " __FILE__ ": %s(): init pvt\n", __func__);
- pvt = (struct e752x_pvt *) mci->pvt_info;
- pvt->dev_info = &e752x_devs[dev_idx];
- pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL,
- pvt->dev_info->err_dev,
- pvt->bridge_ck);
- if (pvt->bridge_ck == NULL)
- pvt->bridge_ck = pci_scan_single_device(pdev->bus,
- PCI_DEVFN(0, 1));
- if (pvt->bridge_ck == NULL) {
- printk(KERN_ERR "MC: error reporting device not found:"
- "vendor %x device 0x%x (broken BIOS?)\n",
- PCI_VENDOR_ID_INTEL, e752x_devs[dev_idx].err_dev);
- goto fail;
- }
- pvt->mc_symmetric = ((ddrcsr & 0x10) != 0);
-
- debugf3("MC: " __FILE__ ": %s(): more mci init\n", __func__);
- mci->ctl_name = pvt->dev_info->ctl_name;
- mci->edac_check = e752x_check;
- mci->ctl_page_to_phys = ctl_page_to_phys;
-
- /* find out the device types */
- pci_read_config_dword(pdev, E752X_DRA, &dra);
-
- /*
- * The dram row boundary (DRB) reg values are boundary address for
+ /* The dram row boundary (DRB) reg values are boundary address for
* each DRAM row with a granularity of 64 or 128MB (single/dual
* channel operation). DRB regs are cumulative; therefore DRB7 will
* contain the total memory contained in all eight rows.
*/
for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) {
- u8 value;
- u32 cumul_size;
/* mem_dev 0=x8, 1=x4 */
- int mem_dev = (dra >> (index * 4 + 2)) & 0x3;
- struct csrow_info *csrow = &mci->csrows[index];
+ mem_dev = (dra >> (index * 4 + 2)) & 0x3;
+ csrow = &mci->csrows[index];
mem_dev = (mem_dev == 2);
- pci_read_config_byte(mci->pdev, E752X_DRB + index, &value);
+ pci_read_config_byte(pdev, E752X_DRB + index, &value);
/* convert a 128 or 64 MiB DRB to a page size. */
cumul_size = value << (25 + drc_drbg - PAGE_SHIFT);
- debugf3("MC: " __FILE__ ": %s(): (%d) cumul_size 0x%x\n",
- __func__, index, cumul_size);
+ debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
+ cumul_size);
if (cumul_size == last_cumul_size)
continue; /* not populated */
} else
csrow->edac_mode = EDAC_NONE;
}
+}
- /* Fill in the memory map table */
- {
- u8 value;
- u8 last = 0;
- u8 row = 0;
- for (index = 0; index < 8; index += 2) {
-
- pci_read_config_byte(mci->pdev, E752X_DRB + index,
+static void e752x_init_mem_map_table(struct pci_dev *pdev,
+ struct e752x_pvt *pvt)
+{
+ int index;
+ u8 value, last, row, stat8;
+
+ last = 0;
+ row = 0;
+
+ for (index = 0; index < 8; index += 2) {
+ pci_read_config_byte(pdev, E752X_DRB + index, &value);
+ /* test if there is a dimm in this slot */
+ if (value == last) {
+ /* no dimm in the slot, so flag it as empty */
+ pvt->map[index] = 0xff;
+ pvt->map[index + 1] = 0xff;
+ } else { /* there is a dimm in the slot */
+ pvt->map[index] = row;
+ row++;
+ last = value;
+ /* test the next value to see if the dimm is double
+ * sided
+ */
+ pci_read_config_byte(pdev, E752X_DRB + index + 1,
&value);
- /* test if there is a dimm in this slot */
- if (value == last) {
- /* no dimm in the slot, so flag it as empty */
- pvt->map[index] = 0xff;
- pvt->map[index + 1] = 0xff;
- } else { /* there is a dimm in the slot */
- pvt->map[index] = row;
- row++;
- last = value;
- /* test the next value to see if the dimm is
- double sided */
- pci_read_config_byte(mci->pdev,
- E752X_DRB + index + 1,
- &value);
- pvt->map[index + 1] = (value == last) ?
- 0xff : /* the dimm is single sided,
- so flag as empty */
- row; /* this is a double sided dimm
- to save the next row # */
- row++;
- last = value;
- }
+ pvt->map[index + 1] = (value == last) ?
+ 0xff : /* the dimm is single sided,
+ so flag as empty */
+ row; /* this is a double sided dimm
+ to save the next row # */
+ row++;
+ last = value;
}
}
/* set the map type. 1 = normal, 0 = reversed */
- pci_read_config_byte(mci->pdev, E752X_DRM, &stat8);
+ pci_read_config_byte(pdev, E752X_DRM, &stat8);
pvt->map_type = ((stat8 & 0x0f) > ((stat8 >> 4) & 0x0f));
+}
- mci->edac_cap |= EDAC_FLAG_NONE;
+/* Return 0 on success or 1 on failure. */
+static int e752x_get_devs(struct pci_dev *pdev, int dev_idx,
+ struct e752x_pvt *pvt)
+{
+ struct pci_dev *dev;
- debugf3("MC: " __FILE__ ": %s(): tolm, remapbase, remaplimit\n",
- __func__);
- /* load the top of low memory, remap base, and remap limit vars */
- pci_read_config_word(mci->pdev, E752X_TOLM, &pci_data);
- pvt->tolm = ((u32) pci_data) << 4;
- pci_read_config_word(mci->pdev, E752X_REMAPBASE, &pci_data);
- pvt->remapbase = ((u32) pci_data) << 14;
- pci_read_config_word(mci->pdev, E752X_REMAPLIMIT, &pci_data);
- pvt->remaplimit = ((u32) pci_data) << 14;
- printk("tolm = %x, remapbase = %x, remaplimit = %x\n", pvt->tolm,
- pvt->remapbase, pvt->remaplimit);
+ pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL,
+ pvt->dev_info->err_dev,
+ pvt->bridge_ck);
- if (edac_mc_add_mc(mci)) {
- debugf3("MC: " __FILE__
- ": %s(): failed edac_mc_add_mc()\n",
- __func__);
- goto fail;
- }
+ if (pvt->bridge_ck == NULL)
+ pvt->bridge_ck = pci_scan_single_device(pdev->bus,
+ PCI_DEVFN(0, 1));
- /* Walk through the PCI table and clear errors */
- switch (dev_idx) {
- case E7520:
- dev = pci_get_device(PCI_VENDOR_ID_INTEL,
- PCI_DEVICE_ID_INTEL_7520_0, NULL);
- break;
- case E7525:
- dev = pci_get_device(PCI_VENDOR_ID_INTEL,
- PCI_DEVICE_ID_INTEL_7525_0, NULL);
- break;
- case E7320:
- dev = pci_get_device(PCI_VENDOR_ID_INTEL,
- PCI_DEVICE_ID_INTEL_7320_0, NULL);
- break;
+ if (pvt->bridge_ck == NULL) {
+ e752x_printk(KERN_ERR, "error reporting device not found:"
+ "vendor %x device 0x%x (broken BIOS?)\n",
+ PCI_VENDOR_ID_INTEL, e752x_devs[dev_idx].err_dev);
+ return 1;
}
+ dev = pci_get_device(PCI_VENDOR_ID_INTEL, e752x_devs[dev_idx].ctl_dev,
+ NULL);
+
+ if (dev == NULL)
+ goto fail;
pvt->dev_d0f0 = dev;
- for (pres_dev = dev;
- ((struct pci_dev *) pres_dev->global_list.next != dev);
- pres_dev = (struct pci_dev *) pres_dev->global_list.next) {
- pci_read_config_dword(pres_dev, PCI_COMMAND, &stat32);
- stat = (u16) (stat32 >> 16);
- /* clear any error bits */
- if (stat32 & ((1 << 6) + (1 << 8)))
- pci_write_config_word(pres_dev, PCI_STATUS, stat);
- }
- /* find the error reporting device and clear errors */
- dev = pvt->dev_d0f1 = pci_dev_get(pvt->bridge_ck);
+ pvt->dev_d0f1 = pci_dev_get(pvt->bridge_ck);
+
+ return 0;
+
+fail:
+ pci_dev_put(pvt->bridge_ck);
+ return 1;
+}
+
+static void e752x_init_error_reporting_regs(struct e752x_pvt *pvt)
+{
+ struct pci_dev *dev;
+
+ dev = pvt->dev_d0f1;
/* Turn off error disable & SMI in case the BIOS turned it on */
pci_write_config_byte(dev, E752X_HI_ERRMASK, 0x00);
pci_write_config_byte(dev, E752X_HI_SMICMD, 0x00);
pci_write_config_byte(dev, E752X_BUF_SMICMD, 0x00);
pci_write_config_byte(dev, E752X_DRAM_ERRMASK, 0x00);
pci_write_config_byte(dev, E752X_DRAM_SMICMD, 0x00);
- /* clear other MCH errors */
- pci_read_config_dword(dev, E752X_FERR_GLOBAL, &stat32);
- pci_write_config_dword(dev, E752X_FERR_GLOBAL, stat32);
- pci_read_config_dword(dev, E752X_NERR_GLOBAL, &stat32);
- pci_write_config_dword(dev, E752X_NERR_GLOBAL, stat32);
- pci_read_config_byte(dev, E752X_HI_FERR, &stat8);
- pci_write_config_byte(dev, E752X_HI_FERR, stat8);
- pci_read_config_byte(dev, E752X_HI_NERR, &stat8);
- pci_write_config_byte(dev, E752X_HI_NERR, stat8);
- pci_read_config_dword(dev, E752X_SYSBUS_FERR, &stat32);
- pci_write_config_dword(dev, E752X_SYSBUS_FERR, stat32);
- pci_read_config_byte(dev, E752X_BUF_FERR, &stat8);
- pci_write_config_byte(dev, E752X_BUF_FERR, stat8);
- pci_read_config_byte(dev, E752X_BUF_NERR, &stat8);
- pci_write_config_byte(dev, E752X_BUF_NERR, stat8);
- pci_read_config_word(dev, E752X_DRAM_FERR, &stat16);
- pci_write_config_word(dev, E752X_DRAM_FERR, stat16);
- pci_read_config_word(dev, E752X_DRAM_NERR, &stat16);
- pci_write_config_word(dev, E752X_DRAM_NERR, stat16);
+}
+
+static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
+{
+ u16 pci_data;
+ u8 stat8;
+ struct mem_ctl_info *mci;
+ struct e752x_pvt *pvt;
+ u16 ddrcsr;
+ int drc_chan; /* Number of channels 0=1chan,1=2chan */
+ struct e752x_error_info discard;
+
+ debugf0("%s(): mci\n", __func__);
+ debugf0("Starting Probe1\n");
+
+ /* check to see if device 0 function 1 is enabled; if it isn't, we
+ * assume the BIOS has reserved it for a reason and is expecting
+ * exclusive access, we take care not to violate that assumption and
+ * fail the probe. */
+ pci_read_config_byte(pdev, E752X_DEVPRES1, &stat8);
+ if (!force_function_unhide && !(stat8 & (1 << 5))) {
+ printk(KERN_INFO "Contact your BIOS vendor to see if the "
+ "E752x error registers can be safely un-hidden\n");
+ return -ENOMEM;
+ }
+ stat8 |= (1 << 5);
+ pci_write_config_byte(pdev, E752X_DEVPRES1, stat8);
+
+ pci_read_config_word(pdev, E752X_DDRCSR, &ddrcsr);
+ /* FIXME: should check >>12 or 0xf, true for all? */
+ /* Dual channel = 1, Single channel = 0 */
+ drc_chan = dual_channel_active(ddrcsr);
+
+ mci = edac_mc_alloc(sizeof(*pvt), E752X_NR_CSROWS, drc_chan + 1);
+
+ if (mci == NULL) {
+ return -ENOMEM;
+ }
+
+ debugf3("%s(): init mci\n", __func__);
+ mci->mtype_cap = MEM_FLAG_RDDR;
+ mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED |
+ EDAC_FLAG_S4ECD4ED;
+ /* FIXME - what if different memory types are in different csrows? */
+ mci->mod_name = EDAC_MOD_STR;
+ mci->mod_ver = E752X_REVISION;
+ mci->dev = &pdev->dev;
+
+ debugf3("%s(): init pvt\n", __func__);
+ pvt = (struct e752x_pvt *) mci->pvt_info;
+ pvt->dev_info = &e752x_devs[dev_idx];
+ pvt->mc_symmetric = ((ddrcsr & 0x10) != 0);
+
+ if (e752x_get_devs(pdev, dev_idx, pvt)) {
+ edac_mc_free(mci);
+ return -ENODEV;
+ }
+
+ debugf3("%s(): more mci init\n", __func__);
+ mci->ctl_name = pvt->dev_info->ctl_name;
+ mci->edac_check = e752x_check;
+ mci->ctl_page_to_phys = ctl_page_to_phys;
+
+ e752x_init_csrows(mci, pdev, ddrcsr);
+ e752x_init_mem_map_table(pdev, pvt);
+
+ /* set the map type. 1 = normal, 0 = reversed */
+ pci_read_config_byte(pdev, E752X_DRM, &stat8);
+ pvt->map_type = ((stat8 & 0x0f) > ((stat8 >> 4) & 0x0f));
+
+ mci->edac_cap |= EDAC_FLAG_NONE;
+ debugf3("%s(): tolm, remapbase, remaplimit\n", __func__);
+
+ /* load the top of low memory, remap base, and remap limit vars */
+ pci_read_config_word(pdev, E752X_TOLM, &pci_data);
+ pvt->tolm = ((u32) pci_data) << 4;
+ pci_read_config_word(pdev, E752X_REMAPBASE, &pci_data);
+ pvt->remapbase = ((u32) pci_data) << 14;
+ pci_read_config_word(pdev, E752X_REMAPLIMIT, &pci_data);
+ pvt->remaplimit = ((u32) pci_data) << 14;
+ e752x_printk(KERN_INFO,
+ "tolm = %x, remapbase = %x, remaplimit = %x\n", pvt->tolm,
+ pvt->remapbase, pvt->remaplimit);
+
+ /* Here we assume that we will never see multiple instances of this
+ * type of memory controller. The ID is therefore hardcoded to 0.
+ */
+ if (edac_mc_add_mc(mci,0)) {
+ debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
+ goto fail;
+ }
+
+ e752x_init_error_reporting_regs(pvt);
+ e752x_get_error_info(mci, &discard); /* clear other MCH errors */
/* get this far and it's successful */
- debugf3("MC: " __FILE__ ": %s(): success\n", __func__);
+ debugf3("%s(): success\n", __func__);
return 0;
fail:
- if (mci) {
- if (pvt->dev_d0f0)
- pci_dev_put(pvt->dev_d0f0);
- if (pvt->dev_d0f1)
- pci_dev_put(pvt->dev_d0f1);
- if (pvt->bridge_ck)
- pci_dev_put(pvt->bridge_ck);
- edac_mc_free(mci);
- }
- return rc;
+ pci_dev_put(pvt->dev_d0f0);
+ pci_dev_put(pvt->dev_d0f1);
+ pci_dev_put(pvt->bridge_ck);
+ edac_mc_free(mci);
+
+ return -ENODEV;
}
/* returns count (>= 0), or negative on error */
static int __devinit e752x_init_one(struct pci_dev *pdev,
- const struct pci_device_id *ent)
+ const struct pci_device_id *ent)
{
- debugf0("MC: " __FILE__ ": %s()\n", __func__);
+ debugf0("%s()\n", __func__);
/* wake up and enable device */
if(pci_enable_device(pdev) < 0)
return -EIO;
+
return e752x_probe1(pdev, ent->driver_data);
}
-
static void __devexit e752x_remove_one(struct pci_dev *pdev)
{
struct mem_ctl_info *mci;
struct e752x_pvt *pvt;
- debugf0(__FILE__ ": %s()\n", __func__);
+ debugf0("%s()\n", __func__);
- if ((mci = edac_mc_find_mci_by_pdev(pdev)) == NULL)
- return;
-
- if (edac_mc_del_mc(mci))
+ if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
return;
pvt = (struct e752x_pvt *) mci->pvt_info;
edac_mc_free(mci);
}
-
static const struct pci_device_id e752x_pci_tbl[] __devinitdata = {
- {PCI_VEND_DEV(INTEL, 7520_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
- E7520},
- {PCI_VEND_DEV(INTEL, 7525_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
- E7525},
- {PCI_VEND_DEV(INTEL, 7320_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
- E7320},
- {0,} /* 0 terminated list. */
+ {
+ PCI_VEND_DEV(INTEL, 7520_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ E7520
+ },
+ {
+ PCI_VEND_DEV(INTEL, 7525_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ E7525
+ },
+ {
+ PCI_VEND_DEV(INTEL, 7320_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ E7320
+ },
+ {
+ 0,
+ } /* 0 terminated list. */
};
MODULE_DEVICE_TABLE(pci, e752x_pci_tbl);
-
static struct pci_driver e752x_driver = {
- .name = BS_MOD_STR,
+ .name = EDAC_MOD_STR,
.probe = e752x_init_one,
.remove = __devexit_p(e752x_remove_one),
.id_table = e752x_pci_tbl,
};
-
static int __init e752x_init(void)
{
int pci_rc;
- debugf3("MC: " __FILE__ ": %s()\n", __func__);
+ debugf3("%s()\n", __func__);
pci_rc = pci_register_driver(&e752x_driver);
return (pci_rc < 0) ? pci_rc : 0;
}
-
static void __exit e752x_exit(void)
{
- debugf3("MC: " __FILE__ ": %s()\n", __func__);
+ debugf3("%s()\n", __func__);
pci_unregister_driver(&e752x_driver);
}
-
module_init(e752x_init);
module_exit(e752x_exit);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Linux Networx (http://lnxi.com) Tom Zimmerman\n");
MODULE_DESCRIPTION("MC support for Intel e752x memory controllers");
+
+module_param(force_function_unhide, int, 0444);
+MODULE_PARM_DESC(force_function_unhide, "if BIOS sets Dev0:Fun1 up as hidden:"
+" 1=force unhide and hope BIOS doesn't fight driver for Dev0:Fun1 access");
+
git://git.onelab.eu / linux-2.6.git / blobdiff