static u8
sgiioc4_INB(unsigned long port)
{
- u8 reg = (u8) readb((void __iomem *) port);
+ u8 reg = (u8) inb(port);
if ((port & 0xFFF) == 0x11C) { /* Status register of IOC4 */
if (reg & 0x51) { /* Not busy...check for interrupt */
unsigned long other_ir = port - 0x110;
- unsigned int intr_reg = (u32) readl((void __iomem *) other_ir);
+ unsigned int intr_reg = (u32) inl(other_ir);
/* Clear the Interrupt, Error bits on the IOC4 */
if (intr_reg & 0x03) {
- writel(0x03, (void __iomem *) other_ir);
- intr_reg = (u32) readl((void __iomem *) other_ir);
+ outl(0x03, other_ir);
+ intr_reg = (u32) inl(other_ir);
}
}
}
static void __devinit
ide_dma_sgiioc4(ide_hwif_t * hwif, unsigned long dma_base)
{
- void __iomem *virt_dma_base;
int num_ports = sizeof (ioc4_dma_regs_t);
printk(KERN_INFO "%s: BM-DMA at 0x%04lx-0x%04lx\n", hwif->name,
dma_base, dma_base + num_ports - 1);
- if (!request_mem_region(dma_base, num_ports, hwif->name)) {
+ if (!request_region(dma_base, num_ports, hwif->name)) {
printk(KERN_ERR
"%s(%s) -- ERROR, Addresses 0x%p to 0x%p "
"ALREADY in use\n",
goto dma_alloc_failure;
}
- virt_dma_base = ioremap(dma_base, num_ports);
- if (virt_dma_base == NULL) {
- printk(KERN_ERR
- "%s(%s) -- ERROR, Unable to map addresses 0x%lx to 0x%lx\n",
- __FUNCTION__, hwif->name, dma_base, dma_base + num_ports - 1);
- goto dma_remap_failure;
- }
- hwif->dma_base = (unsigned long) virt_dma_base;
-
+ hwif->dma_base = dma_base;
hwif->dmatable_cpu = pci_alloc_consistent(hwif->pci_dev,
IOC4_PRD_ENTRIES * IOC4_PRD_BYTES,
&hwif->dmatable_dma);
if (!hwif->dmatable_cpu)
- goto dma_pci_alloc_failure;
+ goto dma_alloc_failure;
hwif->sg_max_nents = IOC4_PRD_ENTRIES;
printk(KERN_INFO
"Changing from DMA to PIO mode for Drive %s\n", hwif->name);
-dma_pci_alloc_failure:
- iounmap(virt_dma_base);
-
-dma_remap_failure:
- release_mem_region(dma_base, num_ports);
-
dma_alloc_failure:
/* Disable DMA because we couldnot allocate any DMA maps */
hwif->autodma = 0;
hwif->ide_dma_host_off = &sgiioc4_ide_dma_host_off;
hwif->ide_dma_lostirq = &sgiioc4_ide_dma_lostirq;
hwif->ide_dma_timeout = &__ide_dma_timeout;
-
hwif->INB = &sgiioc4_INB;
}
static int __devinit
sgiioc4_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t * d)
{
- unsigned long cmd_base, dma_base, irqport;
- unsigned long bar0, cmd_phys_base, ctl;
- void __iomem *virt_base;
+ unsigned long base, ctl, dma_base, irqport;
ide_hwif_t *hwif;
int h;
}
/* Get the CmdBlk and CtrlBlk Base Registers */
- bar0 = pci_resource_start(dev, 0);
- virt_base = ioremap(bar0, pci_resource_len(dev, 0));
- if (virt_base == NULL) {
- printk(KERN_ERR "%s: Unable to remap BAR 0 address: 0x%lx\n",
- d->name, bar0);
- return -ENOMEM;
- }
- cmd_base = (unsigned long) virt_base + IOC4_CMD_OFFSET;
- ctl = (unsigned long) virt_base + IOC4_CTRL_OFFSET;
- irqport = (unsigned long) virt_base + IOC4_INTR_OFFSET;
+ base = pci_resource_start(dev, 0) + IOC4_CMD_OFFSET;
+ ctl = pci_resource_start(dev, 0) + IOC4_CTRL_OFFSET;
+ irqport = pci_resource_start(dev, 0) + IOC4_INTR_OFFSET;
dma_base = pci_resource_start(dev, 0) + IOC4_DMA_OFFSET;
- cmd_phys_base = bar0 + IOC4_CMD_OFFSET;
- if (!request_mem_region(cmd_phys_base, IOC4_CMD_CTL_BLK_SIZE,
- hwif->name)) {
+ if (!request_region(base, IOC4_CMD_CTL_BLK_SIZE, hwif->name)) {
printk(KERN_ERR
- "%s : %s -- ERROR, Addresses "
+ "%s : %s -- ERROR, Port Addresses "
"0x%p to 0x%p ALREADY in use\n",
- __FUNCTION__, hwif->name, (void *) cmd_phys_base,
- (void *) cmd_phys_base + IOC4_CMD_CTL_BLK_SIZE);
+ __FUNCTION__, hwif->name, (void *) base,
+ (void *) base + IOC4_CMD_CTL_BLK_SIZE);
return -ENOMEM;
}
- if (hwif->io_ports[IDE_DATA_OFFSET] != cmd_base) {
+ if (hwif->io_ports[IDE_DATA_OFFSET] != base) {
/* Initialize the IO registers */
- sgiioc4_init_hwif_ports(&hwif->hw, cmd_base, ctl, irqport);
+ sgiioc4_init_hwif_ports(&hwif->hw, base, ctl, irqport);
memcpy(hwif->io_ports, hwif->hw.io_ports,
sizeof (hwif->io_ports));
hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET];
hwif->cds = (struct ide_pci_device_s *) d;
hwif->gendev.parent = &dev->dev;/* setup proper ancestral information */
- /* The IOC4 uses MMIO rather than Port IO. */
- default_hwif_mmiops(hwif);
-
/* Initializing chipset IRQ Registers */
hwif->OUTL(0x03, irqport + IOC4_INTR_SET * 4);
int
ioc4_ide_attach_one(struct ioc4_driver_data *idd)
{
- /* PCI-RT does not bring out IDE connection.
- * Do not attach to this particular IOC4.
- */
- if (idd->idd_variant == IOC4_VARIANT_PCI_RT)
- return 0;
-
return pci_init_sgiioc4(idd->idd_pdev,
&sgiioc4_chipsets[idd->idd_pci_id->driver_data]);
}
return ioc4_register_submodule(&ioc4_ide_submodule);
}
-static void __devexit
-ioc4_ide_exit(void)
-{
- ioc4_unregister_submodule(&ioc4_ide_submodule);
-}
-
module_init(ioc4_ide_init);
-module_exit(ioc4_ide_exit);
-MODULE_AUTHOR("Aniket Malatpure/Jeremy Higdon");
+MODULE_AUTHOR("Aniket Malatpure - Silicon Graphics Inc. (SGI)");
MODULE_DESCRIPTION("IDE PCI driver module for SGI IOC4 Base-IO Card");
MODULE_LICENSE("GPL");