#include <linux/moduleparam.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/serio.h>
#include <linux/err.h>
+#include <linux/rcupdate.h>
+#include <linux/platform_device.h>
#include <asm/io.h>
MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
MODULE_LICENSE("GPL");
+static unsigned int i8042_nokbd;
+module_param_named(nokbd, i8042_nokbd, bool, 0);
+MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
+
static unsigned int i8042_noaux;
module_param_named(noaux, i8042_noaux, bool, 0);
MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
static unsigned int i8042_noloop;
module_param_named(noloop, i8042_noloop, bool, 0);
-MODULE_PARM_DESC(dumbkbd, "Disable the AUX Loopback command while probing for the AUX port");
+MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
+
+static unsigned int i8042_blink_frequency = 500;
+module_param_named(panicblink, i8042_blink_frequency, uint, 0600);
+MODULE_PARM_DESC(panicblink, "Frequency with which keyboard LEDs should blink when kernel panics");
-#ifdef CONFIG_ACPI
-static int i8042_noacpi;
-module_param_named(noacpi, i8042_noacpi, bool, 0);
-MODULE_PARM_DESC(noacpi, "Do not use ACPI to detect controller settings");
+#ifdef CONFIG_PNP
+static int i8042_nopnp;
+module_param_named(nopnp, i8042_nopnp, bool, 0);
+MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
#endif
#define DEBUG
#include "i8042.h"
-DEFINE_SPINLOCK(i8042_lock);
+static DEFINE_SPINLOCK(i8042_lock);
-struct i8042_values {
+struct i8042_port {
+ struct serio *serio;
int irq;
unsigned char disable;
unsigned char irqen;
char name[8];
};
-static struct i8042_values i8042_kbd_values = {
- .disable = I8042_CTR_KBDDIS,
- .irqen = I8042_CTR_KBDINT,
- .mux = -1,
- .name = "KBD",
-};
-
-static struct i8042_values i8042_aux_values = {
- .disable = I8042_CTR_AUXDIS,
- .irqen = I8042_CTR_AUXINT,
- .mux = -1,
- .name = "AUX",
+#define I8042_KBD_PORT_NO 0
+#define I8042_AUX_PORT_NO 1
+#define I8042_MUX_PORT_NO 2
+#define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
+static struct i8042_port i8042_ports[I8042_NUM_PORTS] = {
+ {
+ .disable = I8042_CTR_KBDDIS,
+ .irqen = I8042_CTR_KBDINT,
+ .mux = -1,
+ .name = "KBD",
+ },
+ {
+ .disable = I8042_CTR_AUXDIS,
+ .irqen = I8042_CTR_AUXINT,
+ .mux = -1,
+ .name = "AUX",
+ }
};
-static struct i8042_values i8042_mux_values[I8042_NUM_MUX_PORTS];
-
-static struct serio *i8042_kbd_port;
-static struct serio *i8042_aux_port;
-static struct serio *i8042_mux_port[I8042_NUM_MUX_PORTS];
static unsigned char i8042_initial_ctr;
static unsigned char i8042_ctr;
static unsigned char i8042_mux_open;
static struct timer_list i8042_timer;
static struct platform_device *i8042_platform_device;
+
/*
* Shared IRQ's require a device pointer, but this driver doesn't support
* multiple devices
static int i8042_flush(void)
{
unsigned long flags;
- unsigned char data;
+ unsigned char data, str;
int i = 0;
spin_lock_irqsave(&i8042_lock, flags);
- while ((i8042_read_status() & I8042_STR_OBF) && (i++ < I8042_BUFFER_SIZE)) {
+ while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) {
udelay(50);
data = i8042_read_data();
+ i++;
dbg("%02x <- i8042 (flush, %s)", data,
- i8042_read_status() & I8042_STR_AUXDATA ? "aux" : "kbd");
+ str & I8042_STR_AUXDATA ? "aux" : "kbd");
}
spin_unlock_irqrestore(&i8042_lock, flags);
static int i8042_command(unsigned char *param, int command)
{
unsigned long flags;
- int retval = 0, i = 0;
+ int i, retval, auxerr = 0;
if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
return -1;
spin_lock_irqsave(&i8042_lock, flags);
- retval = i8042_wait_write();
- if (!retval) {
- dbg("%02x -> i8042 (command)", command & 0xff);
- i8042_write_command(command & 0xff);
+ if ((retval = i8042_wait_write()))
+ goto out;
+
+ dbg("%02x -> i8042 (command)", command & 0xff);
+ i8042_write_command(command & 0xff);
+
+ for (i = 0; i < ((command >> 12) & 0xf); i++) {
+ if ((retval = i8042_wait_write()))
+ goto out;
+ dbg("%02x -> i8042 (parameter)", param[i]);
+ i8042_write_data(param[i]);
}
- if (!retval)
- for (i = 0; i < ((command >> 12) & 0xf); i++) {
- if ((retval = i8042_wait_write())) break;
- dbg("%02x -> i8042 (parameter)", param[i]);
- i8042_write_data(param[i]);
- }
+ for (i = 0; i < ((command >> 8) & 0xf); i++) {
+ if ((retval = i8042_wait_read()))
+ goto out;
- if (!retval)
- for (i = 0; i < ((command >> 8) & 0xf); i++) {
- if ((retval = i8042_wait_read())) break;
- if (i8042_read_status() & I8042_STR_AUXDATA)
- param[i] = ~i8042_read_data();
- else
- param[i] = i8042_read_data();
- dbg("%02x <- i8042 (return)", param[i]);
+ if (command == I8042_CMD_AUX_LOOP &&
+ !(i8042_read_status() & I8042_STR_AUXDATA)) {
+ retval = auxerr = -1;
+ goto out;
}
- spin_unlock_irqrestore(&i8042_lock, flags);
+ param[i] = i8042_read_data();
+ dbg("%02x <- i8042 (return)", param[i]);
+ }
if (retval)
- dbg(" -- i8042 (timeout)");
+ dbg(" -- i8042 (%s)", auxerr ? "auxerr" : "timeout");
+ out:
+ spin_unlock_irqrestore(&i8042_lock, flags);
return retval;
}
* i8042_aux_write() sends a byte out through the aux interface.
*/
-static int i8042_aux_write(struct serio *port, unsigned char c)
+static int i8042_aux_write(struct serio *serio, unsigned char c)
{
- struct i8042_values *values = port->port_data;
+ struct i8042_port *port = serio->port_data;
int retval;
/*
* Send the byte out.
*/
- if (values->mux == -1)
+ if (port->mux == -1)
retval = i8042_command(&c, I8042_CMD_AUX_SEND);
else
- retval = i8042_command(&c, I8042_CMD_MUX_SEND + values->mux);
+ retval = i8042_command(&c, I8042_CMD_MUX_SEND + port->mux);
/*
* Make sure the interrupt happens and the character is received even
* i8042_activate_port() enables port on a chip.
*/
-static int i8042_activate_port(struct serio *port)
+static int i8042_activate_port(struct i8042_port *port)
{
- struct i8042_values *values = port->port_data;
+ if (!port->serio)
+ return -1;
i8042_flush();
* Enable port again here because it is disabled if we are
* resuming (normally it is enabled already).
*/
- i8042_ctr &= ~values->disable;
+ i8042_ctr &= ~port->disable;
- i8042_ctr |= values->irqen;
+ i8042_ctr |= port->irqen;
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
- i8042_ctr &= ~values->irqen;
+ i8042_ctr &= ~port->irqen;
return -1;
}
* It allocates the interrupt and calls i8042_enable_port.
*/
-static int i8042_open(struct serio *port)
+static int i8042_open(struct serio *serio)
{
- struct i8042_values *values = port->port_data;
+ struct i8042_port *port = serio->port_data;
- if (values->mux != -1)
+ if (port->mux != -1)
if (i8042_mux_open++)
return 0;
- if (request_irq(values->irq, i8042_interrupt,
- SA_SHIRQ, "i8042", i8042_request_irq_cookie)) {
- printk(KERN_ERR "i8042.c: Can't get irq %d for %s, unregistering the port.\n", values->irq, values->name);
+ if (request_irq(port->irq, i8042_interrupt,
+ IRQF_SHARED, "i8042", i8042_request_irq_cookie)) {
+ printk(KERN_ERR "i8042.c: Can't get irq %d for %s, unregistering the port.\n", port->irq, port->name);
goto irq_fail;
}
if (i8042_activate_port(port)) {
- printk(KERN_ERR "i8042.c: Can't activate %s, unregistering the port\n", values->name);
+ printk(KERN_ERR "i8042.c: Can't activate %s, unregistering the port\n", port->name);
goto activate_fail;
}
return 0;
-activate_fail:
- free_irq(values->irq, i8042_request_irq_cookie);
+ activate_fail:
+ free_irq(port->irq, i8042_request_irq_cookie);
-irq_fail:
- values->exists = 0;
- serio_unregister_port_delayed(port);
+ irq_fail:
+ serio_unregister_port_delayed(serio);
return -1;
}
* the BIOS could have used the AUX interrupt for PCI.
*/
-static void i8042_close(struct serio *port)
+static void i8042_close(struct serio *serio)
{
- struct i8042_values *values = port->port_data;
+ struct i8042_port *port = serio->port_data;
- if (values->mux != -1)
+ if (port->mux != -1)
if (--i8042_mux_open)
return;
- i8042_ctr &= ~values->irqen;
+ i8042_ctr &= ~port->irqen;
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
- printk(KERN_ERR "i8042.c: Can't write CTR while closing %s.\n", values->name);
- return;
+ printk(KERN_WARNING "i8042.c: Can't write CTR while closing %s.\n", port->name);
+/*
+ * We still want to continue and free IRQ so if more data keeps coming in
+ * kernel will just ignore the irq.
+ */
}
- free_irq(values->irq, i8042_request_irq_cookie);
+ free_irq(port->irq, i8042_request_irq_cookie);
i8042_flush();
}
+/*
+ * i8042_start() is called by serio core when port is about to finish
+ * registering. It will mark port as existing so i8042_interrupt can
+ * start sending data through it.
+ */
+static int i8042_start(struct serio *serio)
+{
+ struct i8042_port *port = serio->port_data;
+
+ port->exists = 1;
+ mb();
+ return 0;
+}
+
+/*
+ * i8042_stop() marks serio port as non-existing so i8042_interrupt
+ * will not try to send data to the port that is about to go away.
+ * The function is called by serio core as part of unregister procedure.
+ */
+static void i8042_stop(struct serio *serio)
+{
+ struct i8042_port *port = serio->port_data;
+
+ port->exists = 0;
+ synchronize_sched();
+ port->serio = NULL;
+}
+
/*
* i8042_interrupt() is the most important function in this driver -
* it handles the interrupts from the i8042, and sends incoming bytes
static irqreturn_t i8042_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
+ struct i8042_port *port;
unsigned long flags;
- unsigned char str, data = 0;
+ unsigned char str, data;
unsigned int dfl;
- unsigned int aux_idx;
+ unsigned int port_no;
int ret;
mod_timer(&i8042_timer, jiffies + I8042_POLL_PERIOD);
spin_lock_irqsave(&i8042_lock, flags);
str = i8042_read_status();
- if (str & I8042_STR_OBF)
- data = i8042_read_data();
- spin_unlock_irqrestore(&i8042_lock, flags);
-
- if (~str & I8042_STR_OBF) {
+ if (unlikely(~str & I8042_STR_OBF)) {
+ spin_unlock_irqrestore(&i8042_lock, flags);
if (irq) dbg("Interrupt %d, without any data", irq);
ret = 0;
goto out;
}
+ data = i8042_read_data();
+ spin_unlock_irqrestore(&i8042_lock, flags);
if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
static unsigned long last_transmit;
}
}
- aux_idx = (str >> 6) & 3;
-
- dbg("%02x <- i8042 (interrupt, aux%d, %d%s%s)",
- data, aux_idx, irq,
- dfl & SERIO_PARITY ? ", bad parity" : "",
- dfl & SERIO_TIMEOUT ? ", timeout" : "");
-
- if (likely(i8042_mux_values[aux_idx].exists))
- serio_interrupt(i8042_mux_port[aux_idx], data, dfl, regs);
-
+ port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
last_str = str;
last_transmit = jiffies;
- goto irq_ret;
+ } else {
+
+ dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
+ ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0);
+
+ port_no = (str & I8042_STR_AUXDATA) ?
+ I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
}
- dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
- ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0);
+ port = &i8042_ports[port_no];
dbg("%02x <- i8042 (interrupt, %s, %d%s%s)",
- data, (str & I8042_STR_AUXDATA) ? "aux" : "kbd", irq,
- dfl & SERIO_PARITY ? ", bad parity" : "",
- dfl & SERIO_TIMEOUT ? ", timeout" : "");
-
+ data, port->name, irq,
+ dfl & SERIO_PARITY ? ", bad parity" : "",
+ dfl & SERIO_TIMEOUT ? ", timeout" : "");
- if (str & I8042_STR_AUXDATA) {
- if (likely(i8042_aux_values.exists))
- serio_interrupt(i8042_aux_port, data, dfl, regs);
- } else {
- if (likely(i8042_kbd_values.exists))
- serio_interrupt(i8042_kbd_port, data, dfl, regs);
- }
+ if (likely(port->exists))
+ serio_interrupt(port->serio, data, dfl, regs);
-irq_ret:
ret = 1;
-out:
+ out:
return IRQ_RETVAL(ret);
}
*/
param = 0xf0;
- if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0x0f)
+ if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0xf0)
return -1;
param = mode ? 0x56 : 0xf6;
- if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != (mode ? 0xa9 : 0x09))
+ if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != (mode ? 0x56 : 0xf6))
return -1;
param = mode ? 0xa4 : 0xa5;
- if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == (mode ? 0x5b : 0x5a))
+ if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == (mode ? 0xa4 : 0xa5))
return -1;
if (mux_version)
- *mux_version = ~param;
+ *mux_version = param;
return 0;
}
* the controller has been switched into Multiplexed mode
*/
-static int i8042_enable_mux_ports(struct i8042_values *values)
+static int i8042_enable_mux_ports(void)
{
unsigned char param;
int i;
* Enable all muxed ports.
*/
- for (i = 0; i < 4; i++) {
+ for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
i8042_command(¶m, I8042_CMD_MUX_PFX + i);
i8042_command(¶m, I8042_CMD_AUX_ENABLE);
}
* LCS/Telegraphics.
*/
-static int __init i8042_check_mux(struct i8042_values *values)
+static int __devinit i8042_check_mux(void)
{
unsigned char mux_version;
printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
(mux_version >> 4) & 0xf, mux_version & 0xf);
- if (i8042_enable_mux_ports(values))
+ if (i8042_enable_mux_ports())
return -1;
i8042_mux_present = 1;
* the presence of an AUX interface.
*/
-static int __init i8042_check_aux(struct i8042_values *values)
+static int __devinit i8042_check_aux(void)
{
unsigned char param;
static int i8042_check_aux_cookie;
* in trying to detect AUX presence.
*/
- if (request_irq(values->irq, i8042_interrupt, SA_SHIRQ,
- "i8042", &i8042_check_aux_cookie))
+ if (request_irq(i8042_ports[I8042_AUX_PORT_NO].irq, i8042_interrupt,
+ IRQF_SHARED, "i8042", &i8042_check_aux_cookie))
return -1;
- free_irq(values->irq, &i8042_check_aux_cookie);
+ free_irq(i8042_ports[I8042_AUX_PORT_NO].irq, &i8042_check_aux_cookie);
/*
* Get rid of bytes in the queue.
*/
param = 0x5a;
- if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0xa5) {
+ if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0x5a) {
/*
* External connection test - filters out AT-soldered PS/2 i8042's
*/
if (i8042_command(¶m, I8042_CMD_AUX_TEST)
- || (param && param != 0xfa && param != 0xff))
+ || (param && param != 0xfa && param != 0xff))
return -1;
}
* registers it, and reports to the user.
*/
-static int __init i8042_port_register(struct serio *port)
+static int __devinit i8042_port_register(struct i8042_port *port)
{
- struct i8042_values *values = port->port_data;
-
- values->exists = 1;
-
- i8042_ctr &= ~values->disable;
+ i8042_ctr &= ~port->disable;
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
printk(KERN_WARNING "i8042.c: Can't write CTR while registering.\n");
- values->exists = 0;
- return -1;
+ kfree(port->serio);
+ port->serio = NULL;
+ i8042_ctr |= port->disable;
+ return -EIO;
}
printk(KERN_INFO "serio: i8042 %s port at %#lx,%#lx irq %d\n",
- values->name,
+ port->name,
(unsigned long) I8042_DATA_REG,
(unsigned long) I8042_COMMAND_REG,
- values->irq);
+ port->irq);
- serio_register_port(port);
+ serio_register_port(port->serio);
return 0;
}
i8042_interrupt(0, NULL, NULL);
}
+static int i8042_ctl_test(void)
+{
+ unsigned char param;
+
+ if (!i8042_reset)
+ return 0;
+
+ if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
+ printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
+ return -1;
+ }
+
+ if (param != I8042_RET_CTL_TEST) {
+ printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
+ param, I8042_RET_CTL_TEST);
+ return -1;
+ }
+
+ return 0;
+}
/*
* i8042_controller init initializes the i8042 controller, and,
* before doing anything else.
*/
- i8042_flush();
-
- if (i8042_reset) {
-
- unsigned char param;
-
- if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
- printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
- return -1;
- }
-
- if (param != I8042_RET_CTL_TEST) {
- printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
- param, I8042_RET_CTL_TEST);
- return -1;
- }
+ if (i8042_flush() == I8042_BUFFER_SIZE) {
+ printk(KERN_ERR "i8042.c: No controller found.\n");
+ return -1;
}
+ if (i8042_ctl_test())
+ return -1;
+
/*
* Save the CTR for restoral on unload / reboot.
*/
/*
* Reset the controller.
*/
-void i8042_controller_reset(void)
+static void i8042_controller_reset(void)
{
- unsigned char param;
-
/*
* Reset the controller if requested.
*/
- if (i8042_reset)
- if (i8042_command(¶m, I8042_CMD_CTL_TEST))
- printk(KERN_ERR "i8042.c: i8042 controller reset timeout.\n");
+ i8042_ctl_test();
/*
* Disable MUX mode if present.
* able to talk to the hardware when rebooting.
*/
-void i8042_controller_cleanup(void)
+static void i8042_controller_cleanup(void)
{
int i;
* Reset anything that is connected to the ports.
*/
- if (i8042_kbd_values.exists)
- serio_cleanup(i8042_kbd_port);
-
- if (i8042_aux_values.exists)
- serio_cleanup(i8042_aux_port);
-
- for (i = 0; i < I8042_NUM_MUX_PORTS; i++)
- if (i8042_mux_values[i].exists)
- serio_cleanup(i8042_mux_port[i]);
+ for (i = 0; i < I8042_NUM_PORTS; i++)
+ if (i8042_ports[i].exists)
+ serio_cleanup(i8042_ports[i].serio);
i8042_controller_reset();
}
-static int blink_frequency = 500;
-module_param_named(panicblink, blink_frequency, int, 0600);
+/*
+ * i8042_panic_blink() will flash the keyboard LEDs and is called when
+ * kernel panics. Flashing LEDs is useful for users running X who may
+ * not see the console and will help distingushing panics from "real"
+ * lockups.
+ *
+ * Note that DELAY has a limit of 10ms so we will not get stuck here
+ * waiting for KBC to free up even if KBD interrupt is off
+ */
-/* Catch the case when the kbd interrupt is off */
#define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
-/* Tell the user who may be running in X and not see the console that we have
- panic'ed. This is to distingush panics from "real" lockups. */
static long i8042_panic_blink(long count)
{
long delay = 0;
static long last_blink;
static char led;
- /* Roughly 1/2s frequency. KDB uses about 1s. Make sure it is
- different. */
- if (!blink_frequency)
+
+ /*
+ * We expect frequency to be about 1/2s. KDB uses about 1s.
+ * Make sure they are different.
+ */
+ if (!i8042_blink_frequency)
return 0;
- if (count - last_blink < blink_frequency)
+ if (count - last_blink < i8042_blink_frequency)
return 0;
+
led ^= 0x01 | 0x04;
while (i8042_read_status() & I8042_STR_IBF)
DELAY;
* Here we try to restore the original BIOS settings
*/
-static int i8042_suspend(struct device *dev, u32 state, u32 level)
+static int i8042_suspend(struct platform_device *dev, pm_message_t state)
{
- if (level == SUSPEND_DISABLE) {
- del_timer_sync(&i8042_timer);
- i8042_controller_reset();
- }
+ del_timer_sync(&i8042_timer);
+ i8042_controller_reset();
return 0;
}
* Here we try to reset everything back to a state in which suspended
*/
-static int i8042_resume(struct device *dev, u32 level)
+static int i8042_resume(struct platform_device *dev)
{
int i;
- if (level != RESUME_ENABLE)
- return 0;
+ if (i8042_ctl_test())
+ return -1;
- if (i8042_controller_init()) {
- printk(KERN_ERR "i8042: resume failed\n");
+ if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
+ printk(KERN_ERR "i8042: Can't write CTR\n");
return -1;
}
if (i8042_mux_present)
- if (i8042_set_mux_mode(1, NULL) ||
- i8042_enable_mux_ports(&i8042_aux_values)) {
+ if (i8042_set_mux_mode(1, NULL) || i8042_enable_mux_ports())
printk(KERN_WARNING "i8042: failed to resume active multiplexor, mouse won't work.\n");
- }
/*
- * Reconnect anything that was connected to the ports.
+ * Activate all ports.
*/
- if (i8042_kbd_values.exists && i8042_activate_port(i8042_kbd_port) == 0)
- serio_reconnect(i8042_kbd_port);
+ for (i = 0; i < I8042_NUM_PORTS; i++)
+ i8042_activate_port(&i8042_ports[i]);
- if (i8042_aux_values.exists && i8042_activate_port(i8042_aux_port) == 0)
- serio_reconnect(i8042_aux_port);
-
- for (i = 0; i < I8042_NUM_MUX_PORTS; i++)
- if (i8042_mux_values[i].exists && i8042_activate_port(i8042_mux_port[i]) == 0)
- serio_reconnect(i8042_mux_port[i]);
/*
* Restart timer (for polling "stuck" data)
*/
panic_blink = i8042_panic_blink;
return 0;
-
}
/*
* because otherwise BIOSes will be confused.
*/
-static void i8042_shutdown(struct device *dev)
+static void i8042_shutdown(struct platform_device *dev)
{
i8042_controller_cleanup();
}
-static struct device_driver i8042_driver = {
- .name = "i8042",
- .bus = &platform_bus_type,
- .suspend = i8042_suspend,
- .resume = i8042_resume,
- .shutdown = i8042_shutdown,
-};
-
-static struct serio * __init i8042_allocate_kbd_port(void)
+static int __devinit i8042_create_kbd_port(void)
{
struct serio *serio;
-
- serio = kmalloc(sizeof(struct serio), GFP_KERNEL);
- if (serio) {
- memset(serio, 0, sizeof(struct serio));
- serio->type = i8042_direct ? SERIO_8042 : SERIO_8042_XL,
- serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write,
- serio->open = i8042_open,
- serio->close = i8042_close,
- serio->port_data = &i8042_kbd_values,
- serio->dev.parent = &i8042_platform_device->dev;
- strlcpy(serio->name, "i8042 Kbd Port", sizeof(serio->name));
- strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
- }
-
- return serio;
+ struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
+
+ serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
+ if (!serio)
+ return -ENOMEM;
+
+ serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
+ serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
+ serio->open = i8042_open;
+ serio->close = i8042_close;
+ serio->start = i8042_start;
+ serio->stop = i8042_stop;
+ serio->port_data = port;
+ serio->dev.parent = &i8042_platform_device->dev;
+ strlcpy(serio->name, "i8042 Kbd Port", sizeof(serio->name));
+ strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
+
+ port->serio = serio;
+
+ return i8042_port_register(port);
}
-static struct serio * __init i8042_allocate_aux_port(void)
+static int __devinit i8042_create_aux_port(void)
{
struct serio *serio;
-
- serio = kmalloc(sizeof(struct serio), GFP_KERNEL);
- if (serio) {
- memset(serio, 0, sizeof(struct serio));
- serio->type = SERIO_8042;
- serio->write = i8042_aux_write;
- serio->open = i8042_open;
- serio->close = i8042_close;
- serio->port_data = &i8042_aux_values,
- serio->dev.parent = &i8042_platform_device->dev;
- strlcpy(serio->name, "i8042 Aux Port", sizeof(serio->name));
- strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
- }
-
- return serio;
+ struct i8042_port *port = &i8042_ports[I8042_AUX_PORT_NO];
+
+ serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
+ if (!serio)
+ return -ENOMEM;
+
+ serio->id.type = SERIO_8042;
+ serio->write = i8042_aux_write;
+ serio->open = i8042_open;
+ serio->close = i8042_close;
+ serio->start = i8042_start;
+ serio->stop = i8042_stop;
+ serio->port_data = port;
+ serio->dev.parent = &i8042_platform_device->dev;
+ strlcpy(serio->name, "i8042 Aux Port", sizeof(serio->name));
+ strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
+
+ port->serio = serio;
+
+ return i8042_port_register(port);
}
-static struct serio * __init i8042_allocate_mux_port(int index)
+static int __devinit i8042_create_mux_port(int index)
{
struct serio *serio;
- struct i8042_values *values = &i8042_mux_values[index];
-
- serio = kmalloc(sizeof(struct serio), GFP_KERNEL);
- if (serio) {
- *values = i8042_aux_values;
- snprintf(values->name, sizeof(values->name), "AUX%d", index);
- values->mux = index;
-
- memset(serio, 0, sizeof(struct serio));
- serio->type = SERIO_8042;
- serio->write = i8042_aux_write;
- serio->open = i8042_open;
- serio->close = i8042_close;
- serio->port_data = values;
- serio->dev.parent = &i8042_platform_device->dev;
- snprintf(serio->name, sizeof(serio->name), "i8042 Aux-%d Port", index);
- snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, index + 1);
- }
-
- return serio;
+ struct i8042_port *port = &i8042_ports[I8042_MUX_PORT_NO + index];
+
+ serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
+ if (!serio)
+ return -ENOMEM;
+
+ serio->id.type = SERIO_8042;
+ serio->write = i8042_aux_write;
+ serio->open = i8042_open;
+ serio->close = i8042_close;
+ serio->start = i8042_start;
+ serio->stop = i8042_stop;
+ serio->port_data = port;
+ serio->dev.parent = &i8042_platform_device->dev;
+ snprintf(serio->name, sizeof(serio->name), "i8042 Aux-%d Port", index);
+ snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, index + 1);
+
+ *port = i8042_ports[I8042_AUX_PORT_NO];
+ port->exists = 0;
+ snprintf(port->name, sizeof(port->name), "AUX%d", index);
+ port->mux = index;
+ port->serio = serio;
+
+ return i8042_port_register(port);
}
-int __init i8042_init(void)
+static int __devinit i8042_probe(struct platform_device *dev)
{
- int i;
+ int i, have_ports = 0;
int err;
- dbg_init();
-
init_timer(&i8042_timer);
i8042_timer.function = i8042_timer_func;
- if (i8042_platform_init())
- return -EBUSY;
-
- i8042_aux_values.irq = I8042_AUX_IRQ;
- i8042_kbd_values.irq = I8042_KBD_IRQ;
-
if (i8042_controller_init())
return -ENODEV;
- err = driver_register(&i8042_driver);
- if (err)
- return err;
-
- i8042_platform_device = platform_device_register_simple("i8042", -1, NULL, 0);
- if (IS_ERR(i8042_platform_device)) {
- driver_unregister(&i8042_driver);
- return PTR_ERR(i8042_platform_device);
- }
-
- if (!i8042_noaux && !i8042_check_aux(&i8042_aux_values)) {
- if (!i8042_nomux && !i8042_check_mux(&i8042_aux_values))
+ if (!i8042_noaux && !i8042_check_aux()) {
+ if (!i8042_nomux && !i8042_check_mux()) {
for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
- i8042_mux_port[i] = i8042_allocate_mux_port(i);
- if (i8042_mux_port[i])
- i8042_port_register(i8042_mux_port[i]);
+ err = i8042_create_mux_port(i);
+ if (err)
+ goto err_unregister_ports;
}
- else {
- i8042_aux_port = i8042_allocate_aux_port();
- if (i8042_aux_port)
- i8042_port_register(i8042_aux_port);
+ } else {
+ err = i8042_create_aux_port();
+ if (err)
+ goto err_unregister_ports;
}
+ have_ports = 1;
}
- i8042_kbd_port = i8042_allocate_kbd_port();
- if (i8042_kbd_port)
- i8042_port_register(i8042_kbd_port);
+ if (!i8042_nokbd) {
+ err = i8042_create_kbd_port();
+ if (err)
+ goto err_unregister_ports;
+ have_ports = 1;
+ }
- mod_timer(&i8042_timer, jiffies + I8042_POLL_PERIOD);
+ if (!have_ports) {
+ err = -ENODEV;
+ goto err_controller_cleanup;
+ }
+ mod_timer(&i8042_timer, jiffies + I8042_POLL_PERIOD);
return 0;
+
+ err_unregister_ports:
+ for (i = 0; i < I8042_NUM_PORTS; i++)
+ if (i8042_ports[i].serio)
+ serio_unregister_port(i8042_ports[i].serio);
+ err_controller_cleanup:
+ i8042_controller_cleanup();
+
+ return err;
}
-void __exit i8042_exit(void)
+static int __devexit i8042_remove(struct platform_device *dev)
{
int i;
i8042_controller_cleanup();
- if (i8042_kbd_values.exists)
- serio_unregister_port(i8042_kbd_port);
+ for (i = 0; i < I8042_NUM_PORTS; i++)
+ if (i8042_ports[i].exists)
+ serio_unregister_port(i8042_ports[i].serio);
- if (i8042_aux_values.exists)
- serio_unregister_port(i8042_aux_port);
+ del_timer_sync(&i8042_timer);
- for (i = 0; i < I8042_NUM_MUX_PORTS; i++)
- if (i8042_mux_values[i].exists)
- serio_unregister_port(i8042_mux_port[i]);
+ return 0;
+}
- del_timer_sync(&i8042_timer);
+static struct platform_driver i8042_driver = {
+ .driver = {
+ .name = "i8042",
+ .owner = THIS_MODULE,
+ },
+ .probe = i8042_probe,
+ .remove = __devexit_p(i8042_remove),
+ .suspend = i8042_suspend,
+ .resume = i8042_resume,
+ .shutdown = i8042_shutdown,
+};
+static int __init i8042_init(void)
+{
+ int err;
+
+ dbg_init();
+
+ err = i8042_platform_init();
+ if (err)
+ return err;
+
+ i8042_ports[I8042_AUX_PORT_NO].irq = I8042_AUX_IRQ;
+ i8042_ports[I8042_KBD_PORT_NO].irq = I8042_KBD_IRQ;
+
+ err = platform_driver_register(&i8042_driver);
+ if (err)
+ goto err_platform_exit;
+
+ i8042_platform_device = platform_device_alloc("i8042", -1);
+ if (!i8042_platform_device) {
+ err = -ENOMEM;
+ goto err_unregister_driver;
+ }
+
+ err = platform_device_add(i8042_platform_device);
+ if (err)
+ goto err_free_device;
+
+ return 0;
+
+ err_free_device:
+ platform_device_put(i8042_platform_device);
+ err_unregister_driver:
+ platform_driver_unregister(&i8042_driver);
+ err_platform_exit:
+ i8042_platform_exit();
+
+ return err;
+}
+
+static void __exit i8042_exit(void)
+{
platform_device_unregister(i8042_platform_device);
- driver_unregister(&i8042_driver);
+ platform_driver_unregister(&i8042_driver);
i8042_platform_exit();
git://git.onelab.eu / linux-2.6.git / blobdiff