#include "ves1x93.h"
#include "tda8083.h"
+#include "bsru6.h"
+
#define budget_patch budget
static struct saa7146_extension budget_extension;
//MAKE_BUDGET_INFO(satel,"TT-Budget/Patch SATELCO PCI", BUDGET_TT_HW_DISEQC);
static struct pci_device_id pci_tbl[] = {
- MAKE_EXTENSION_PCI(ttbp,0x13c2, 0x0000),
+ MAKE_EXTENSION_PCI(ttbp,0x13c2, 0x0000),
// MAKE_EXTENSION_PCI(satel, 0x13c2, 0x1013),
- {
- .vendor = 0,
- }
+ {
+ .vendor = 0,
+ }
};
/* those lines are for budget-patch to be tried
static int budget_av7110_send_fw_cmd(struct budget_patch *budget, u16* buf, int length)
{
- int i;
-
- dprintk(2, "budget: %p\n", budget);
-
- for (i = 2; i < length; i++)
- {
- ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2*i, 2, (u32) buf[i], 0,0);
- msleep(5);
- }
- if (length)
- ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, (u32) buf[1], 0,0);
- else
- ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, 0, 0,0);
- msleep(5);
- ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND, 2, (u32) buf[0], 0,0);
- msleep(5);
- return 0;
+ int i;
+
+ dprintk(2, "budget: %p\n", budget);
+
+ for (i = 2; i < length; i++)
+ {
+ ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2*i, 2, (u32) buf[i], 0,0);
+ msleep(5);
+ }
+ if (length)
+ ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, (u32) buf[1], 0,0);
+ else
+ ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, 0, 0,0);
+ msleep(5);
+ ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND, 2, (u32) buf[0], 0,0);
+ msleep(5);
+ return 0;
}
static void av7110_set22k(struct budget_patch *budget, int state)
{
- u16 buf[2] = {( COMTYPE_AUDIODAC << 8) | (state ? ON22K : OFF22K), 0};
+ u16 buf[2] = {( COMTYPE_AUDIODAC << 8) | (state ? ON22K : OFF22K), 0};
- dprintk(2, "budget: %p\n", budget);
- budget_av7110_send_fw_cmd(budget, buf, 2);
+ dprintk(2, "budget: %p\n", budget);
+ budget_av7110_send_fw_cmd(budget, buf, 2);
}
static int av7110_send_diseqc_msg(struct budget_patch *budget, int len, u8 *msg, int burst)
{
- int i;
- u16 buf[18] = { ((COMTYPE_AUDIODAC << 8) | SendDiSEqC),
- 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
+ int i;
+ u16 buf[18] = { ((COMTYPE_AUDIODAC << 8) | SendDiSEqC),
+ 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
- dprintk(2, "budget: %p\n", budget);
+ dprintk(2, "budget: %p\n", budget);
- if (len>10)
- len=10;
+ if (len>10)
+ len=10;
- buf[1] = len+2;
- buf[2] = len;
+ buf[1] = len+2;
+ buf[2] = len;
- if (burst != -1)
- buf[3]=burst ? 0x01 : 0x00;
- else
- buf[3]=0xffff;
+ if (burst != -1)
+ buf[3]=burst ? 0x01 : 0x00;
+ else
+ buf[3]=0xffff;
- for (i=0; i<len; i++)
- buf[i+4]=msg[i];
+ for (i=0; i<len; i++)
+ buf[i+4]=msg[i];
- budget_av7110_send_fw_cmd(budget, buf, 18);
- return 0;
+ budget_av7110_send_fw_cmd(budget, buf, 18);
+ return 0;
}
static int budget_patch_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
buf[2] = ((div & 0x18000) >> 10) | 0x95;
buf[3] = (pwr << 6) | 0x30;
- // NOTE: since we're using a prescaler of 2, we set the
+ // NOTE: since we're using a prescaler of 2, we set the
// divisor frequency to 62.5kHz and divide by 125 above
if (i2c_transfer (&budget->i2c_adap, &msg, 1) != 1) return -EIO;
.pll_set = alps_bsrv2_pll_set,
};
-static u8 alps_bsru6_inittab[] = {
- 0x01, 0x15,
- 0x02, 0x00,
- 0x03, 0x00,
- 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
- 0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */
- 0x06, 0x40, /* DAC not used, set to high impendance mode */
- 0x07, 0x00, /* DAC LSB */
- 0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */
- 0x09, 0x00, /* FIFO */
- 0x0c, 0x51, /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
- 0x0d, 0x82, /* DC offset compensation = ON, beta_agc1 = 2 */
- 0x0e, 0x23, /* alpha_tmg = 2, beta_tmg = 3 */
- 0x10, 0x3f, // AGC2 0x3d
- 0x11, 0x84,
- 0x12, 0xb5, // Lock detect: -64 Carrier freq detect:on
- 0x15, 0xc9, // lock detector threshold
- 0x16, 0x00,
- 0x17, 0x00,
- 0x18, 0x00,
- 0x19, 0x00,
- 0x1a, 0x00,
- 0x1f, 0x50,
- 0x20, 0x00,
- 0x21, 0x00,
- 0x22, 0x00,
- 0x23, 0x00,
- 0x28, 0x00, // out imp: normal out type: parallel FEC mode:0
- 0x29, 0x1e, // 1/2 threshold
- 0x2a, 0x14, // 2/3 threshold
- 0x2b, 0x0f, // 3/4 threshold
- 0x2c, 0x09, // 5/6 threshold
- 0x2d, 0x05, // 7/8 threshold
- 0x2e, 0x01,
- 0x31, 0x1f, // test all FECs
- 0x32, 0x19, // viterbi and synchro search
- 0x33, 0xfc, // rs control
- 0x34, 0x93, // error control
- 0x0f, 0x52,
- 0xff, 0xff
-};
-
-static int alps_bsru6_set_symbol_rate(struct dvb_frontend* fe, u32 srate, u32 ratio)
-{
- u8 aclk = 0;
- u8 bclk = 0;
-
- if (srate < 1500000) { aclk = 0xb7; bclk = 0x47; }
- else if (srate < 3000000) { aclk = 0xb7; bclk = 0x4b; }
- else if (srate < 7000000) { aclk = 0xb7; bclk = 0x4f; }
- else if (srate < 14000000) { aclk = 0xb7; bclk = 0x53; }
- else if (srate < 30000000) { aclk = 0xb6; bclk = 0x53; }
- else if (srate < 45000000) { aclk = 0xb4; bclk = 0x51; }
-
- stv0299_writereg (fe, 0x13, aclk);
- stv0299_writereg (fe, 0x14, bclk);
- stv0299_writereg (fe, 0x1f, (ratio >> 16) & 0xff);
- stv0299_writereg (fe, 0x20, (ratio >> 8) & 0xff);
- stv0299_writereg (fe, 0x21, (ratio ) & 0xf0);
-
- return 0;
-}
-
-static int alps_bsru6_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
-{
- struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;
- u8 data[4];
- u32 div;
- struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
-
- if ((params->frequency < 950000) || (params->frequency > 2150000)) return -EINVAL;
-
- div = (params->frequency + (125 - 1)) / 125; // round correctly
- data[0] = (div >> 8) & 0x7f;
- data[1] = div & 0xff;
- data[2] = 0x80 | ((div & 0x18000) >> 10) | 4;
- data[3] = 0xC4;
-
- if (params->frequency > 1530000) data[3] = 0xc0;
-
- if (i2c_transfer (&budget->i2c_adap, &msg, 1) != 1) return -EIO;
- return 0;
-}
-
-static struct stv0299_config alps_bsru6_config = {
-
- .demod_address = 0x68,
- .inittab = alps_bsru6_inittab,
- .mclk = 88000000UL,
- .invert = 1,
- .enhanced_tuning = 0,
- .skip_reinit = 0,
- .lock_output = STV0229_LOCKOUTPUT_1,
- .volt13_op0_op1 = STV0299_VOLT13_OP1,
- .min_delay_ms = 100,
- .set_symbol_rate = alps_bsru6_set_symbol_rate,
- .pll_set = alps_bsru6_pll_set,
-};
-
static int grundig_29504_451_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
{
struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;
{
switch(budget->dev->pci->subsystem_device) {
case 0x0000: // Hauppauge/TT WinTV DVB-S rev1.X
- case 0x1013: // SATELCO Multimedia PCI
+ case 0x1013: // SATELCO Multimedia PCI
// try the ALPS BSRV2 first of all
budget->dvb_frontend = ves1x93_attach(&alps_bsrv2_config, &budget->i2c_adap);
/* written by Emard */
static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_extension_data *info)
{
- struct budget_patch *budget;
- int err;
+ struct budget_patch *budget;
+ int err;
int count = 0;
int detected = 0;
#define RPS_IRQ 0
#define HPS_SETUP 0
#if PATCH_RESET
- saa7146_write(dev, MC1, MASK_31);
- msleep(40);
+ saa7146_write(dev, MC1, MASK_31);
+ msleep(40);
#endif
#if HPS_SETUP
- // initialize registers. Better to have it like this
- // than leaving something unconfigured
+ // initialize registers. Better to have it like this
+ // than leaving something unconfigured
saa7146_write(dev, DD1_STREAM_B, 0);
// port B VSYNC at rising edge
saa7146_write(dev, DD1_INIT, 0x00000200); // have this in budget-core too!
// debi config
// saa7146_write(dev, DEBI_CONFIG, MASK_30|MASK_28|MASK_18);
- // zero all HPS registers
- saa7146_write(dev, HPS_H_PRESCALE, 0); // r68
- saa7146_write(dev, HPS_H_SCALE, 0); // r6c
- saa7146_write(dev, BCS_CTRL, 0); // r70
- saa7146_write(dev, HPS_V_SCALE, 0); // r60
- saa7146_write(dev, HPS_V_GAIN, 0); // r64
- saa7146_write(dev, CHROMA_KEY_RANGE, 0); // r74
- saa7146_write(dev, CLIP_FORMAT_CTRL, 0); // r78
- // Set HPS prescaler for port B input
- saa7146_write(dev, HPS_CTRL, (1<<30) | (0<<29) | (1<<28) | (0<<12) );
- saa7146_write(dev, MC2,
- 0 * (MASK_08 | MASK_24) | // BRS control
- 0 * (MASK_09 | MASK_25) | // a
- 0 * (MASK_10 | MASK_26) | // b
- 1 * (MASK_06 | MASK_22) | // HPS_CTRL1
- 1 * (MASK_05 | MASK_21) | // HPS_CTRL2
- 0 * (MASK_01 | MASK_15) // DEBI
- );
+ // zero all HPS registers
+ saa7146_write(dev, HPS_H_PRESCALE, 0); // r68
+ saa7146_write(dev, HPS_H_SCALE, 0); // r6c
+ saa7146_write(dev, BCS_CTRL, 0); // r70
+ saa7146_write(dev, HPS_V_SCALE, 0); // r60
+ saa7146_write(dev, HPS_V_GAIN, 0); // r64
+ saa7146_write(dev, CHROMA_KEY_RANGE, 0); // r74
+ saa7146_write(dev, CLIP_FORMAT_CTRL, 0); // r78
+ // Set HPS prescaler for port B input
+ saa7146_write(dev, HPS_CTRL, (1<<30) | (0<<29) | (1<<28) | (0<<12) );
+ saa7146_write(dev, MC2,
+ 0 * (MASK_08 | MASK_24) | // BRS control
+ 0 * (MASK_09 | MASK_25) | // a
+ 0 * (MASK_10 | MASK_26) | // b
+ 1 * (MASK_06 | MASK_22) | // HPS_CTRL1
+ 1 * (MASK_05 | MASK_21) | // HPS_CTRL2
+ 0 * (MASK_01 | MASK_15) // DEBI
+ );
#endif
// Disable RPS1 and RPS0
- saa7146_write(dev, MC1, ( MASK_29 | MASK_28));
- // RPS1 timeout disable
- saa7146_write(dev, RPS_TOV1, 0);
+ saa7146_write(dev, MC1, ( MASK_29 | MASK_28));
+ // RPS1 timeout disable
+ saa7146_write(dev, RPS_TOV1, 0);
// code for autodetection
// will wait for VBI_B event (vertical blank at port B)
WRITE_RPS1(cpu_to_le32(CMD_UPLOAD |
MASK_10 | MASK_09 | MASK_08 | MASK_06 | MASK_05 | MASK_04 | MASK_03 | MASK_02 ));
#endif
- WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_VBI_B));
- WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
- WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
- WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24));
+ WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_VBI_B));
+ WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
+ WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
+ WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24));
#if RPS_IRQ
- // issue RPS1 interrupt to increment counter
- WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
- // at least a NOP is neede between two interrupts
- WRITE_RPS1(cpu_to_le32(CMD_NOP));
- // interrupt again
- WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
+ // issue RPS1 interrupt to increment counter
+ WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
+ // at least a NOP is neede between two interrupts
+ WRITE_RPS1(cpu_to_le32(CMD_NOP));
+ // interrupt again
+ WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
#endif
- WRITE_RPS1(cpu_to_le32(CMD_STOP));
+ WRITE_RPS1(cpu_to_le32(CMD_STOP));
#if RPS_IRQ
- // set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
- // use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
- // use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
- saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );
- // set event counter 1 treshold to maximum allowed value (rEC p55)
- saa7146_write(dev, ECT1R, 0x3fff );
+ // set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
+ // use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
+ // use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
+ saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );
+ // set event counter 1 treshold to maximum allowed value (rEC p55)
+ saa7146_write(dev, ECT1R, 0x3fff );
#endif
- // Fix VSYNC level
- saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
- // Set RPS1 Address register to point to RPS code (r108 p42)
- saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
- // Enable RPS1, (rFC p33)
- saa7146_write(dev, MC1, (MASK_13 | MASK_29 ));
+ // Fix VSYNC level
+ saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
+ // Set RPS1 Address register to point to RPS code (r108 p42)
+ saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
+ // Enable RPS1, (rFC p33)
+ saa7146_write(dev, MC1, (MASK_13 | MASK_29 ));
- mdelay(50);
- saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);
+ mdelay(50);
+ saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);
mdelay(150);
detected = 1;
#if RPS_IRQ
- printk("Event Counter 1 0x%04x\n", saa7146_read(dev, EC1R) & 0x3fff );
+ printk("Event Counter 1 0x%04x\n", saa7146_read(dev, EC1R) & 0x3fff );
#endif
// Disable RPS1
- saa7146_write(dev, MC1, ( MASK_29 ));
+ saa7146_write(dev, MC1, ( MASK_29 ));
if(detected == 0)
- printk("budget-patch not detected or saa7146 in non-default state.\n"
- "try enabling ressetting of 7146 with MASK_31 in MC1 register\n");
+ printk("budget-patch not detected or saa7146 in non-default state.\n"
+ "try enabling ressetting of 7146 with MASK_31 in MC1 register\n");
else
- printk("BUDGET-PATCH DETECTED.\n");
+ printk("BUDGET-PATCH DETECTED.\n");
/* OLD (Original design by Roberto Deza):
*/
// Setup RPS1 "program" (p35)
- count = 0;
+ count = 0;
- // Wait Source Line Counter Threshold (p36)
- WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_HS));
- // Set GPIO3=1 (p42)
- WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
- WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
- WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTHI<<24));
+ // Wait Source Line Counter Threshold (p36)
+ WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_HS));
+ // Set GPIO3=1 (p42)
+ WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
+ WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
+ WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTHI<<24));
#if RPS_IRQ
- // issue RPS1 interrupt
- WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
+ // issue RPS1 interrupt
+ WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
#endif
- // Wait reset Source Line Counter Threshold (p36)
- WRITE_RPS1(cpu_to_le32(CMD_PAUSE | RPS_INV | EVT_HS));
- // Set GPIO3=0 (p42)
- WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
- WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
- WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24));
+ // Wait reset Source Line Counter Threshold (p36)
+ WRITE_RPS1(cpu_to_le32(CMD_PAUSE | RPS_INV | EVT_HS));
+ // Set GPIO3=0 (p42)
+ WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
+ WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
+ WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24));
#if RPS_IRQ
- // issue RPS1 interrupt
- WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
+ // issue RPS1 interrupt
+ WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
#endif
- // Jump to begin of RPS program (p37)
- WRITE_RPS1(cpu_to_le32(CMD_JUMP));
- WRITE_RPS1(cpu_to_le32(dev->d_rps1.dma_handle));
+ // Jump to begin of RPS program (p37)
+ WRITE_RPS1(cpu_to_le32(CMD_JUMP));
+ WRITE_RPS1(cpu_to_le32(dev->d_rps1.dma_handle));
- // Fix VSYNC level
- saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
- // Set RPS1 Address register to point to RPS code (r108 p42)
- saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
- // Set Source Line Counter Threshold, using BRS (rCC p43)
- // It generates HS event every TS_HEIGHT lines
- // this is related to TS_WIDTH set in register
- // NUM_LINE_BYTE3 in budget-core.c. If NUM_LINE_BYTE
- // low 16 bits are set to TS_WIDTH bytes (TS_WIDTH=2*188
- //,then RPS_THRESH1
- // should be set to trigger every TS_HEIGHT (512) lines.
- //
- saa7146_write(dev, RPS_THRESH1, (TS_HEIGHT*1) | MASK_12 );
+ // Fix VSYNC level
+ saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
+ // Set RPS1 Address register to point to RPS code (r108 p42)
+ saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
- // saa7146_write(dev, RPS_THRESH0, ((TS_HEIGHT/2)<<16) |MASK_28| (TS_HEIGHT/2) |MASK_12 );
- // Enable RPS1 (rFC p33)
- saa7146_write(dev, MC1, (MASK_13 | MASK_29));
+ if (!(budget = kmalloc (sizeof(struct budget_patch), GFP_KERNEL)))
+ return -ENOMEM;
+ dprintk(2, "budget: %p\n", budget);
- if (!(budget = kmalloc (sizeof(struct budget_patch), GFP_KERNEL)))
- return -ENOMEM;
+ if ((err = ttpci_budget_init (budget, dev, info, THIS_MODULE))) {
+ kfree (budget);
+ return err;
+ }
- dprintk(2, "budget: %p\n", budget);
+ // Set Source Line Counter Threshold, using BRS (rCC p43)
+ // It generates HS event every TS_HEIGHT lines
+ // this is related to TS_WIDTH set in register
+ // NUM_LINE_BYTE3 in budget-core.c. If NUM_LINE_BYTE
+ // low 16 bits are set to TS_WIDTH bytes (TS_WIDTH=2*188
+ //,then RPS_THRESH1
+ // should be set to trigger every TS_HEIGHT (512) lines.
+ //
+ saa7146_write(dev, RPS_THRESH1, budget->buffer_height | MASK_12 );
- if ((err = ttpci_budget_init (budget, dev, info, THIS_MODULE))) {
- kfree (budget);
- return err;
- }
+ // saa7146_write(dev, RPS_THRESH0, ((TS_HEIGHT/2)<<16) |MASK_28| (TS_HEIGHT/2) |MASK_12 );
+ // Enable RPS1 (rFC p33)
+ saa7146_write(dev, MC1, (MASK_13 | MASK_29));
- dev->ext_priv = budget;
+ dev->ext_priv = budget;
budget->dvb_adapter.priv = budget;
frontend_init(budget);
- return 0;
+ return 0;
}
static int budget_patch_detach (struct saa7146_dev* dev)
{
- struct budget_patch *budget = (struct budget_patch*) dev->ext_priv;
- int err;
+ struct budget_patch *budget = (struct budget_patch*) dev->ext_priv;
+ int err;
if (budget->dvb_frontend) dvb_unregister_frontend(budget->dvb_frontend);
- err = ttpci_budget_deinit (budget);
+ err = ttpci_budget_deinit (budget);
- kfree (budget);
+ kfree (budget);
- return err;
+ return err;
}
static int __init budget_patch_init(void)
static void __exit budget_patch_exit(void)
{
- saa7146_unregister_extension(&budget_extension);
+ saa7146_unregister_extension(&budget_extension);
}
static struct saa7146_extension budget_extension = {
- .name = "budget_patch dvb\0",
- .flags = 0,
+ .name = "budget_patch dvb",
+ .flags = 0,
- .module = THIS_MODULE,
- .pci_tbl = pci_tbl,
- .attach = budget_patch_attach,
- .detach = budget_patch_detach,
+ .module = THIS_MODULE,
+ .pci_tbl = pci_tbl,
+ .attach = budget_patch_attach,
+ .detach = budget_patch_detach,
- .irq_mask = MASK_10,
- .irq_func = ttpci_budget_irq10_handler,
+ .irq_mask = MASK_10,
+ .irq_func = ttpci_budget_irq10_handler,
};
module_init(budget_patch_init);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Emard, Roberto Deza, Holger Waechtler, Michael Hunold, others");
MODULE_DESCRIPTION("Driver for full TS modified DVB-S SAA7146+AV7110 "
- "based so-called Budget Patch cards");
+ "based so-called Budget Patch cards");
git://git.onelab.eu / linux-2.6.git / blobdiff