/*
- * Copyright (c) 2000-2003 LSI Logic Corporation.
+ * Copyright (c) 2000-2005 LSI Logic Corporation.
*
*
* Name: mpi_ioc.h
* Title: MPI IOC, Port, Event, FW Download, and FW Upload messages
* Creation Date: August 11, 2000
*
- * mpi_ioc.h Version: 01.05.xx
+ * mpi_ioc.h Version: 01.05.10
*
* Version History
* ---------------
* Added AliasIndex to EVENT_DATA_LOGOUT structure.
* 04-01-03 01.02.07 Added defines for MPI_FW_HEADER_SIGNATURE_.
* 06-26-03 01.02.08 Added new values to the product family defines.
+ * 04-29-04 01.02.09 Added IOCCapabilities field to MSG_IOC_FACTS_REPLY and
+ * added related defines.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Added four new fields to MSG_IOC_INIT.
+ * Added three new fields to MSG_IOC_FACTS_REPLY.
+ * Defined four new bits for the IOCCapabilities field of
+ * the IOCFacts reply.
+ * Added two new PortTypes for the PortFacts reply.
+ * Added six new events along with their EventData
+ * structures.
+ * Added a new MsgFlag to the FwDownload request to
+ * indicate last segment.
+ * Defined a new image type of boot loader.
+ * Added FW family codes for SAS product families.
+ * 10-05-04 01.05.02 Added ReplyFifoHostSignalingAddr field to
+ * MSG_IOC_FACTS_REPLY.
+ * 12-07-04 01.05.03 Added more defines for SAS Discovery Error event.
+ * 12-09-04 01.05.04 Added Unsupported device to SAS Device event.
+ * 01-15-05 01.05.05 Added event data for SAS SES Event.
+ * 02-09-05 01.05.06 Added MPI_FW_UPLOAD_ITYPE_FW_BACKUP define.
+ * 02-22-05 01.05.07 Added Host Page Buffer Persistent flag to IOC Facts
+ * Reply and IOC Init Request.
+ * 03-11-05 01.05.08 Added family code for 1068E family.
+ * Removed IOCFacts Reply EEDP Capability bit.
+ * 06-24-05 01.05.09 Added 5 new IOCFacts Reply IOCCapabilities bits.
+ * Added Max SATA Targets to SAS Discovery Error event.
+ * 08-30-05 01.05.10 Added 4 new events and their event data structures.
+ * Added new ReasonCode value for SAS Device Status Change
+ * event.
+ * Added new family code for FC949E.
* --------------------------------------------------------------------------
*/
U32 HostMfaHighAddr; /* 10h */
U32 SenseBufferHighAddr; /* 14h */
U32 ReplyFifoHostSignalingAddr; /* 18h */
+ SGE_SIMPLE_UNION HostPageBufferSGE; /* 1Ch */
+ U16 MsgVersion; /* 28h */
+ U16 HeaderVersion; /* 2Ah */
} MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT,
IOCInit_t, MPI_POINTER pIOCInit_t;
/* WhoInit values */
-#define MPI_WHOINIT_NO_ONE (0x00)
-#define MPI_WHOINIT_SYSTEM_BIOS (0x01)
-#define MPI_WHOINIT_ROM_BIOS (0x02)
-#define MPI_WHOINIT_PCI_PEER (0x03)
-#define MPI_WHOINIT_HOST_DRIVER (0x04)
-#define MPI_WHOINIT_MANUFACTURER (0x05)
+#define MPI_WHOINIT_NO_ONE (0x00)
+#define MPI_WHOINIT_SYSTEM_BIOS (0x01)
+#define MPI_WHOINIT_ROM_BIOS (0x02)
+#define MPI_WHOINIT_PCI_PEER (0x03)
+#define MPI_WHOINIT_HOST_DRIVER (0x04)
+#define MPI_WHOINIT_MANUFACTURER (0x05)
/* Flags values */
-#define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01)
-#define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
+#define MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
+#define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
+#define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01)
+
+/* MsgVersion */
+#define MPI_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00)
+#define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT (8)
+#define MPI_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF)
+#define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT (0)
+
+/* HeaderVersion */
+#define MPI_IOCINIT_HEADERVERSION_UNIT_MASK (0xFF00)
+#define MPI_IOCINIT_HEADERVERSION_UNIT_SHIFT (8)
+#define MPI_IOCINIT_HEADERVERSION_DEV_MASK (0x00FF)
+#define MPI_IOCINIT_HEADERVERSION_DEV_SHIFT (0)
+
typedef struct _MSG_IOC_INIT_REPLY
{
MPI_FW_VERSION FWVersion; /* 38h */
U16 HighPriorityQueueDepth; /* 3Ch */
U16 Reserved2; /* 3Eh */
+ SGE_SIMPLE_UNION HostPageBufferSGE; /* 40h */
+ U32 ReplyFifoHostSignalingAddr; /* 4Ch */
} MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY,
IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t;
-#define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00)
-#define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF)
-
-#define MPI_IOCFACTS_HEADERVERSION_UNIT_MASK (0xFF00)
-#define MPI_IOCFACTS_HEADERVERSION_DEV_MASK (0x00FF)
-
-#define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001)
-#define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002)
-#define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004)
-#define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL (0x0008)
-
-#define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01)
-
-#define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00)
-#define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01)
-
-#define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q (0x00000001)
-#define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL (0x00000002)
-#define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING (0x00000004)
-#define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008)
-#define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010)
-#define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020)
-#define MPI_IOCFACTS_CAPABILITY_EEDP (0x00000040)
-
+#define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00)
+#define MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT (8)
+#define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF)
+#define MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT (0)
+
+#define MPI_IOCFACTS_HDRVERSION_UNIT_MASK (0xFF00)
+#define MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT (8)
+#define MPI_IOCFACTS_HDRVERSION_DEV_MASK (0x00FF)
+#define MPI_IOCFACTS_HDRVERSION_DEV_SHIFT (0)
+
+#define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001)
+#define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002)
+#define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004)
+#define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL (0x0008)
+
+#define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01)
+#define MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
+#define MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
+
+#define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00)
+#define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01)
+
+#define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q (0x00000001)
+#define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL (0x00000002)
+#define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING (0x00000004)
+#define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008)
+#define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010)
+#define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020)
+#define MPI_IOCFACTS_CAPABILITY_EEDP (0x00000040)
+#define MPI_IOCFACTS_CAPABILITY_BIDIRECTIONAL (0x00000080)
+#define MPI_IOCFACTS_CAPABILITY_MULTICAST (0x00000100)
+#define MPI_IOCFACTS_CAPABILITY_SCSIIO32 (0x00000200)
+#define MPI_IOCFACTS_CAPABILITY_NO_SCSIIO16 (0x00000400)
/*****************************************************************************
#define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE (0x0000000F)
#define MPI_EVENT_SAS_SES (0x00000010)
#define MPI_EVENT_PERSISTENT_TABLE_FULL (0x00000011)
+#define MPI_EVENT_SAS_PHY_LINK_STATUS (0x00000012)
+#define MPI_EVENT_SAS_DISCOVERY_ERROR (0x00000013)
+#define MPI_EVENT_IR_RESYNC_UPDATE (0x00000014)
+#define MPI_EVENT_IR2 (0x00000015)
+#define MPI_EVENT_SAS_DISCOVERY (0x00000016)
+#define MPI_EVENT_LOG_ENTRY_ADDED (0x00000021)
/* AckRequired field values */
} EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE,
EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t;
+/* LogEntryAdded Event data */
+
+/* this structure matches MPI_LOG_0_ENTRY in mpi_cnfg.h */
+#define MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH (0x1C)
+typedef struct _EVENT_DATA_LOG_ENTRY
+{
+ U32 TimeStamp; /* 00h */
+ U32 Reserved1; /* 04h */
+ U16 LogSequence; /* 08h */
+ U16 LogEntryQualifier; /* 0Ah */
+ U8 LogData[MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH]; /* 0Ch */
+} EVENT_DATA_LOG_ENTRY, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY,
+ MpiEventDataLogEntry_t, MPI_POINTER pMpiEventDataLogEntry_t;
+
+typedef struct _EVENT_DATA_LOG_ENTRY_ADDED
+{
+ U16 LogSequence; /* 00h */
+ U16 Reserved1; /* 02h */
+ U32 Reserved2; /* 04h */
+ EVENT_DATA_LOG_ENTRY LogEntry; /* 08h */
+} EVENT_DATA_LOG_ENTRY_ADDED, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY_ADDED,
+ MpiEventDataLogEntryAdded_t, MPI_POINTER pMpiEventDataLogEntryAdded_t;
+
/* SCSI Event data for Port, Bus and Device forms */
typedef struct _EVENT_DATA_SCSI
U8 ASCQ; /* 05h */
U16 DevHandle; /* 06h */
U32 DeviceInfo; /* 08h */
+ U16 ParentDevHandle; /* 0Ch */
+ U8 PhyNum; /* 0Eh */
+ U8 Reserved1; /* 0Fh */
+ U64 SASAddress; /* 10h */
} EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
MpiEventDataSasDeviceStatusChange_t,
#define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING (0x04)
#define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05)
#define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED (0x06)
+#define MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED (0x07)
+#define MPI_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET (0x08)
+
/* SCSI Event data for Queue Full event */
} EVENT_DATA_QUEUE_FULL, MPI_POINTER PTR_EVENT_DATA_QUEUE_FULL,
EventDataQueueFull_t, MPI_POINTER pEventDataQueueFull_t;
+/* MPI Integrated RAID Event data */
+
+typedef struct _EVENT_DATA_RAID
+{
+ U8 VolumeID; /* 00h */
+ U8 VolumeBus; /* 01h */
+ U8 ReasonCode; /* 02h */
+ U8 PhysDiskNum; /* 03h */
+ U8 ASC; /* 04h */
+ U8 ASCQ; /* 05h */
+ U16 Reserved; /* 06h */
+ U32 SettingsStatus; /* 08h */
+} EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID,
+ MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t;
+
+/* MPI Integrated RAID Event data ReasonCode values */
+#define MPI_EVENT_RAID_RC_VOLUME_CREATED (0x00)
+#define MPI_EVENT_RAID_RC_VOLUME_DELETED (0x01)
+#define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED (0x02)
+#define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED (0x03)
+#define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED (0x04)
+#define MPI_EVENT_RAID_RC_PHYSDISK_CREATED (0x05)
+#define MPI_EVENT_RAID_RC_PHYSDISK_DELETED (0x06)
+#define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED (0x07)
+#define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED (0x08)
+#define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED (0x09)
+#define MPI_EVENT_RAID_RC_SMART_DATA (0x0A)
+#define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED (0x0B)
+
+
+/* MPI Integrated RAID Resync Update Event data */
+
+typedef struct _MPI_EVENT_DATA_IR_RESYNC_UPDATE
+{
+ U8 VolumeID; /* 00h */
+ U8 VolumeBus; /* 01h */
+ U8 ResyncComplete; /* 02h */
+ U8 Reserved1; /* 03h */
+ U32 Reserved2; /* 04h */
+} MPI_EVENT_DATA_IR_RESYNC_UPDATE,
+ MPI_POINTER PTR_MPI_EVENT_DATA_IR_RESYNC_UPDATE,
+ MpiEventDataIrResyncUpdate_t, MPI_POINTER pMpiEventDataIrResyncUpdate_t;
+
+/* MPI IR2 Event data */
+
+/* MPI_LD_STATE or MPI_PD_STATE */
+typedef struct _IR2_STATE_CHANGED
+{
+ U16 PreviousState; /* 00h */
+ U16 NewState; /* 02h */
+} IR2_STATE_CHANGED, MPI_POINTER PTR_IR2_STATE_CHANGED;
+
+typedef struct _IR2_PD_INFO
+{
+ U16 DeviceHandle; /* 00h */
+ U8 TruncEnclosureHandle; /* 02h */
+ U8 TruncatedSlot; /* 03h */
+} IR2_PD_INFO, MPI_POINTER PTR_IR2_PD_INFO;
+
+typedef union _MPI_IR2_RC_EVENT_DATA
+{
+ IR2_STATE_CHANGED StateChanged;
+ U32 Lba;
+ IR2_PD_INFO PdInfo;
+} MPI_IR2_RC_EVENT_DATA, MPI_POINTER PTR_MPI_IR2_RC_EVENT_DATA;
+
+typedef struct _MPI_EVENT_DATA_IR2
+{
+ U8 TargetID; /* 00h */
+ U8 Bus; /* 01h */
+ U8 ReasonCode; /* 02h */
+ U8 PhysDiskNum; /* 03h */
+ MPI_IR2_RC_EVENT_DATA IR2EventData; /* 04h */
+} MPI_EVENT_DATA_IR2, MPI_POINTER PTR_MPI_EVENT_DATA_IR2,
+ MpiEventDataIR2_t, MPI_POINTER pMpiEventDataIR2_t;
+
+/* MPI IR2 Event data ReasonCode values */
+#define MPI_EVENT_IR2_RC_LD_STATE_CHANGED (0x01)
+#define MPI_EVENT_IR2_RC_PD_STATE_CHANGED (0x02)
+#define MPI_EVENT_IR2_RC_BAD_BLOCK_TABLE_FULL (0x03)
+#define MPI_EVENT_IR2_RC_PD_INSERTED (0x04)
+#define MPI_EVENT_IR2_RC_PD_REMOVED (0x05)
+#define MPI_EVENT_IR2_RC_FOREIGN_CFG_DETECTED (0x06)
+#define MPI_EVENT_IR2_RC_REBUILD_MEDIUM_ERROR (0x07)
+
+/* defines for logical disk states */
+#define MPI_LD_STATE_OPTIMAL (0x00)
+#define MPI_LD_STATE_DEGRADED (0x01)
+#define MPI_LD_STATE_FAILED (0x02)
+#define MPI_LD_STATE_MISSING (0x03)
+#define MPI_LD_STATE_OFFLINE (0x04)
+
+/* defines for physical disk states */
+#define MPI_PD_STATE_ONLINE (0x00)
+#define MPI_PD_STATE_MISSING (0x01)
+#define MPI_PD_STATE_NOT_COMPATIBLE (0x02)
+#define MPI_PD_STATE_FAILED (0x03)
+#define MPI_PD_STATE_INITIALIZING (0x04)
+#define MPI_PD_STATE_OFFLINE_AT_HOST_REQUEST (0x05)
+#define MPI_PD_STATE_FAILED_AT_HOST_REQUEST (0x06)
+#define MPI_PD_STATE_OFFLINE_FOR_ANOTHER_REASON (0xFF)
+
/* MPI Link Status Change Event data */
typedef struct _EVENT_DATA_LINK_STATUS
#define MPI_EVENT_LOGOUT_ALL_ALIASES (0xFF)
+/* SAS SES Event data */
-/* MPI Integrated RAID Event data */
+typedef struct _EVENT_DATA_SAS_SES
+{
+ U8 PhyNum; /* 00h */
+ U8 Port; /* 01h */
+ U8 PortWidth; /* 02h */
+ U8 Reserved1; /* 04h */
+} EVENT_DATA_SAS_SES, MPI_POINTER PTR_EVENT_DATA_SAS_SES,
+ MpiEventDataSasSes_t, MPI_POINTER pMpiEventDataSasSes_t;
-typedef struct _EVENT_DATA_RAID
+/* SAS Phy Link Status Event data */
+
+typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS
{
- U8 VolumeID; /* 00h */
- U8 VolumeBus; /* 01h */
- U8 ReasonCode; /* 02h */
- U8 PhysDiskNum; /* 03h */
- U8 ASC; /* 04h */
- U8 ASCQ; /* 05h */
- U16 Reserved; /* 06h */
- U32 SettingsStatus; /* 08h */
-} EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID,
- MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t;
+ U8 PhyNum; /* 00h */
+ U8 LinkRates; /* 01h */
+ U16 DevHandle; /* 02h */
+ U64 SASAddress; /* 04h */
+} EVENT_DATA_SAS_PHY_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_SAS_PHY_LINK_STATUS,
+ MpiEventDataSasPhyLinkStatus_t, MPI_POINTER pMpiEventDataSasPhyLinkStatus_t;
+
+/* defines for the LinkRates field of the SAS PHY Link Status event */
+#define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK (0xF0)
+#define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT (4)
+#define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK (0x0F)
+#define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT (0)
+#define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN (0x00)
+#define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED (0x01)
+#define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION (0x02)
+#define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE (0x03)
+#define MPI_EVENT_SAS_PLS_LR_RATE_1_5 (0x08)
+#define MPI_EVENT_SAS_PLS_LR_RATE_3_0 (0x09)
+
+/* SAS Discovery Event data */
+
+typedef struct _EVENT_DATA_SAS_DISCOVERY
+{
+ U32 DiscoveryStatus; /* 00h */
+ U32 Reserved1; /* 04h */
+} EVENT_DATA_SAS_DISCOVERY, MPI_POINTER PTR_EVENT_DATA_SAS_DISCOVERY,
+ EventDataSasDiscovery_t, MPI_POINTER pEventDataSasDiscovery_t;
-/* MPI Integrated RAID Event data ReasonCode values */
-#define MPI_EVENT_RAID_RC_VOLUME_CREATED (0x00)
-#define MPI_EVENT_RAID_RC_VOLUME_DELETED (0x01)
-#define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED (0x02)
-#define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED (0x03)
-#define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED (0x04)
-#define MPI_EVENT_RAID_RC_PHYSDISK_CREATED (0x05)
-#define MPI_EVENT_RAID_RC_PHYSDISK_DELETED (0x06)
-#define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED (0x07)
-#define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED (0x08)
-#define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED (0x09)
-#define MPI_EVENT_RAID_RC_SMART_DATA (0x0A)
-#define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED (0x0B)
+#define MPI_EVENT_SAS_DSCVRY_COMPLETE (0x00000000)
+#define MPI_EVENT_SAS_DSCVRY_IN_PROGRESS (0x00000001)
+#define MPI_EVENT_SAS_DSCVRY_PHY_BITS_MASK (0xFFFF0000)
+#define MPI_EVENT_SAS_DSCVRY_PHY_BITS_SHIFT (16)
+
+/* SAS Discovery Errror Event data */
+
+typedef struct _EVENT_DATA_DISCOVERY_ERROR
+{
+ U32 DiscoveryStatus; /* 00h */
+ U8 Port; /* 04h */
+ U8 Reserved1; /* 05h */
+ U16 Reserved2; /* 06h */
+} EVENT_DATA_DISCOVERY_ERROR, MPI_POINTER PTR_EVENT_DATA_DISCOVERY_ERROR,
+ EventDataDiscoveryError_t, MPI_POINTER pEventDataDiscoveryError_t;
+
+#define MPI_EVENT_DSCVRY_ERR_DS_LOOP_DETECTED (0x00000001)
+#define MPI_EVENT_DSCVRY_ERR_DS_UNADDRESSABLE_DEVICE (0x00000002)
+#define MPI_EVENT_DSCVRY_ERR_DS_MULTIPLE_PORTS (0x00000004)
+#define MPI_EVENT_DSCVRY_ERR_DS_EXPANDER_ERR (0x00000008)
+#define MPI_EVENT_DSCVRY_ERR_DS_SMP_TIMEOUT (0x00000010)
+#define MPI_EVENT_DSCVRY_ERR_DS_OUT_ROUTE_ENTRIES (0x00000020)
+#define MPI_EVENT_DSCVRY_ERR_DS_INDEX_NOT_EXIST (0x00000040)
+#define MPI_EVENT_DSCVRY_ERR_DS_SMP_FUNCTION_FAILED (0x00000080)
+#define MPI_EVENT_DSCVRY_ERR_DS_SMP_CRC_ERROR (0x00000100)
+#define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_SUBTRACTIVE (0x00000200)
+#define MPI_EVENT_DSCVRY_ERR_DS_TABLE_TO_TABLE (0x00000400)
+#define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_PATHS (0x00000800)
+#define MPI_EVENT_DSCVRY_ERR_DS_MAX_SATA_TARGETS (0x00001000)
/*****************************************************************************
} MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD,
FWDownload_t, MPI_POINTER pFWDownload_t;
-#define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00)
-#define MPI_FW_DOWNLOAD_ITYPE_FW (0x01)
-#define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02)
-#define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03)
-#define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER (0x04)
+#define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT (0x01)
+
+#define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00)
+#define MPI_FW_DOWNLOAD_ITYPE_FW (0x01)
+#define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02)
+#define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03)
+#define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER (0x04)
typedef struct _FWDownloadTCSGE
#define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02)
#define MPI_FW_UPLOAD_ITYPE_NVDATA (0x03)
#define MPI_FW_UPLOAD_ITYPE_BOOTLOADER (0x04)
+#define MPI_FW_UPLOAD_ITYPE_FW_BACKUP (0x05)
typedef struct _FWUploadTCSGE
{
#define MPI_FW_HEADER_PID_PROD_IM_SCSI (0x0400)
#define MPI_FW_HEADER_PID_PROD_IS_SCSI (0x0500)
#define MPI_FW_HEADER_PID_PROD_CTX_SCSI (0x0600)
+#define MPI_FW_HEADER_PID_PROD_IR_SCSI (0x0700)
#define MPI_FW_HEADER_PID_FAMILY_MASK (0x00FF)
/* SCSI */
#define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI (0x000C)
/* Fibre Channel */
#define MPI_FW_HEADER_PID_FAMILY_909_FC (0x0000)
-#define MPI_FW_HEADER_PID_FAMILY_919_FC (0x0001)
-#define MPI_FW_HEADER_PID_FAMILY_919X_FC (0x0002)
-#define MPI_FW_HEADER_PID_FAMILY_919XL_FC (0x0003)
-#define MPI_FW_HEADER_PID_FAMILY_949_FC (0x0004)
+#define MPI_FW_HEADER_PID_FAMILY_919_FC (0x0001) /* 919 and 929 */
+#define MPI_FW_HEADER_PID_FAMILY_919X_FC (0x0002) /* 919X and 929X */
+#define MPI_FW_HEADER_PID_FAMILY_919XL_FC (0x0003) /* 919XL and 929XL */
+#define MPI_FW_HEADER_PID_FAMILY_939X_FC (0x0004) /* 939X and 949X */
#define MPI_FW_HEADER_PID_FAMILY_959_FC (0x0005)
+#define MPI_FW_HEADER_PID_FAMILY_949E_FC (0x0006)
/* SAS */
#define MPI_FW_HEADER_PID_FAMILY_1064_SAS (0x0001)
+#define MPI_FW_HEADER_PID_FAMILY_1068_SAS (0x0002)
+#define MPI_FW_HEADER_PID_FAMILY_1078_SAS (0x0003)
+#define MPI_FW_HEADER_PID_FAMILY_106xE_SAS (0x0004) /* 1068E, 1066E, and 1064E */
typedef struct _MPI_EXT_IMAGE_HEADER
{
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