*
* Copyright (C) 2002 David S. Miller (davem@redhat.com)
* Fixed by Pekka Pietikainen (pp@ee.oulu.fi)
- * Copyright (C) 2006 Broadcom Corporation.
*
* Distribute under GPL.
*/
#define DRV_MODULE_NAME "b44"
#define PFX DRV_MODULE_NAME ": "
-#define DRV_MODULE_VERSION "1.01"
-#define DRV_MODULE_RELDATE "Jun 16, 2006"
+#define DRV_MODULE_VERSION "0.97"
+#define DRV_MODULE_RELDATE "Nov 30, 2005"
#define B44_DEF_MSG_ENABLE \
(NETIF_MSG_DRV | \
/* minimum number of free TX descriptors required to wake up TX process */
#define B44_TX_WAKEUP_THRESH (B44_TX_RING_SIZE / 4)
-/* b44 internal pattern match filter info */
-#define B44_PATTERN_BASE 0x400
-#define B44_PATTERN_SIZE 0x80
-#define B44_PMASK_BASE 0x600
-#define B44_PMASK_SIZE 0x10
-#define B44_MAX_PATTERNS 16
-#define B44_ETHIPV6UDP_HLEN 62
-#define B44_ETHIPV4UDP_HLEN 42
-
static char version[] __devinitdata =
DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n";
static int b44_debug = -1; /* -1 == use B44_DEF_MSG_ENABLE as value */
module_param(b44_debug, int, 0);
MODULE_PARM_DESC(b44_debug, "B44 bitmapped debugging message enable value");
-MODULE_VERSION(DRV_MODULE_VERSION);
static struct pci_device_id b44_pci_tbl[] = {
{ PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_BCM4401,
static void b44_halt(struct b44 *);
static void b44_init_rings(struct b44 *);
-static void b44_init_hw(struct b44 *, int);
+static void b44_init_hw(struct b44 *);
static int dma_desc_align_mask;
static int dma_desc_sync_size;
return readl(bp->regs + reg);
}
-static inline void bw32(const struct b44 *bp,
+static inline void bw32(const struct b44 *bp,
unsigned long reg, unsigned long val)
{
writel(val, bp->regs + reg);
val |= ((u32) data[4]) << 8;
val |= ((u32) data[5]) << 0;
bw32(bp, B44_CAM_DATA_LO, val);
- val = (CAM_DATA_HI_VALID |
+ val = (CAM_DATA_HI_VALID |
(((u32) data[0]) << 8) |
(((u32) data[1]) << 0));
bw32(bp, B44_CAM_DATA_HI, val);
bw32(bp, B44_CAM_CTRL, (CAM_CTRL_WRITE |
(index << CAM_CTRL_INDEX_SHIFT)));
- b44_wait_bit(bp, B44_CAM_CTRL, CAM_CTRL_BUSY, 100, 1);
+ b44_wait_bit(bp, B44_CAM_CTRL, CAM_CTRL_BUSY, 100, 1);
}
static inline void __b44_disable_ints(struct b44 *bp)
static void b44_set_flow_ctrl(struct b44 *bp, u32 local, u32 remote)
{
- u32 pause_enab = 0;
+ u32 pause_enab = bp->flags & (B44_FLAG_TX_PAUSE |
+ B44_FLAG_RX_PAUSE);
- /* The driver supports only rx pause by default because
- the b44 mac tx pause mechanism generates excessive
- pause frames.
- Use ethtool to turn on b44 tx pause if necessary.
- */
- if ((local & ADVERTISE_PAUSE_CAP) &&
- (local & ADVERTISE_PAUSE_ASYM)){
- if ((remote & LPA_PAUSE_ASYM) &&
- !(remote & LPA_PAUSE_CAP))
- pause_enab |= B44_FLAG_RX_PAUSE;
+ if (local & ADVERTISE_PAUSE_CAP) {
+ if (local & ADVERTISE_PAUSE_ASYM) {
+ if (remote & LPA_PAUSE_CAP)
+ pause_enab |= (B44_FLAG_TX_PAUSE |
+ B44_FLAG_RX_PAUSE);
+ else if (remote & LPA_PAUSE_ASYM)
+ pause_enab |= B44_FLAG_RX_PAUSE;
+ } else {
+ if (remote & LPA_PAUSE_CAP)
+ pause_enab |= (B44_FLAG_TX_PAUSE |
+ B44_FLAG_RX_PAUSE);
+ }
+ } else if (local & ADVERTISE_PAUSE_ASYM) {
+ if ((remote & LPA_PAUSE_CAP) &&
+ (remote & LPA_PAUSE_ASYM))
+ pause_enab |= B44_FLAG_TX_PAUSE;
}
__b44_set_flow_ctrl(bp, pause_enab);
struct ring_info *rp = &bp->tx_buffers[cons];
struct sk_buff *skb = rp->skb;
- BUG_ON(skb == NULL);
+ if (unlikely(skb == NULL))
+ BUG();
pci_unmap_single(bp->pdev,
pci_unmap_addr(rp, mapping),
/* Hardware bug work-around, the chip is unable to do PCI DMA
to/from anything above 1GB :-( */
- if (dma_mapping_error(mapping) ||
- mapping + RX_PKT_BUF_SZ > B44_DMA_MASK) {
+ if (mapping + RX_PKT_BUF_SZ > B44_DMA_MASK) {
/* Sigh... */
- if (!dma_mapping_error(mapping))
- pci_unmap_single(bp->pdev, mapping, RX_PKT_BUF_SZ,PCI_DMA_FROMDEVICE);
+ pci_unmap_single(bp->pdev, mapping, RX_PKT_BUF_SZ,PCI_DMA_FROMDEVICE);
dev_kfree_skb_any(skb);
skb = __dev_alloc_skb(RX_PKT_BUF_SZ,GFP_DMA);
if (skb == NULL)
mapping = pci_map_single(bp->pdev, skb->data,
RX_PKT_BUF_SZ,
PCI_DMA_FROMDEVICE);
- if (dma_mapping_error(mapping) ||
- mapping + RX_PKT_BUF_SZ > B44_DMA_MASK) {
- if (!dma_mapping_error(mapping))
- pci_unmap_single(bp->pdev, mapping, RX_PKT_BUF_SZ,PCI_DMA_FROMDEVICE);
+ if (mapping + RX_PKT_BUF_SZ > B44_DMA_MASK) {
+ pci_unmap_single(bp->pdev, mapping, RX_PKT_BUF_SZ,PCI_DMA_FROMDEVICE);
dev_kfree_skb_any(skb);
return -ENOMEM;
}
spin_lock_irq(&bp->lock);
b44_halt(bp);
b44_init_rings(bp);
- b44_init_hw(bp, 1);
+ b44_init_hw(bp);
netif_wake_queue(bp->dev);
spin_unlock_irq(&bp->lock);
done = 1;
b44_halt(bp);
b44_init_rings(bp);
- b44_init_hw(bp, 1);
+ b44_init_hw(bp);
spin_unlock_irq(&bp->lock);
}
mapping = pci_map_single(bp->pdev, skb->data, len, PCI_DMA_TODEVICE);
- if (dma_mapping_error(mapping) || mapping + len > B44_DMA_MASK) {
+ if (mapping + len > B44_DMA_MASK) {
/* Chip can't handle DMA to/from >1GB, use bounce buffer */
- if (!dma_mapping_error(mapping))
- pci_unmap_single(bp->pdev, mapping, len, PCI_DMA_TODEVICE);
+ pci_unmap_single(bp->pdev, mapping, len, PCI_DMA_TODEVICE);
bounce_skb = __dev_alloc_skb(TX_PKT_BUF_SZ,
GFP_ATOMIC|GFP_DMA);
mapping = pci_map_single(bp->pdev, bounce_skb->data,
len, PCI_DMA_TODEVICE);
- if (dma_mapping_error(mapping) || mapping + len > B44_DMA_MASK) {
- if (!dma_mapping_error(mapping))
- pci_unmap_single(bp->pdev, mapping,
+ if (mapping + len > B44_DMA_MASK) {
+ pci_unmap_single(bp->pdev, mapping,
len, PCI_DMA_TODEVICE);
dev_kfree_skb_any(bounce_skb);
goto err_out;
b44_halt(bp);
dev->mtu = new_mtu;
b44_init_rings(bp);
- b44_init_hw(bp, 1);
+ b44_init_hw(bp);
spin_unlock_irq(&bp->lock);
b44_enable_ints(bp);
-
+
return 0;
}
DMA_TABLE_BYTES,
DMA_BIDIRECTIONAL);
- if (dma_mapping_error(rx_ring_dma) ||
- rx_ring_dma + size > B44_DMA_MASK) {
+ if (rx_ring_dma + size > B44_DMA_MASK) {
kfree(rx_ring);
goto out_err;
}
DMA_TABLE_BYTES,
DMA_TO_DEVICE);
- if (dma_mapping_error(tx_ring_dma) ||
- tx_ring_dma + size > B44_DMA_MASK) {
+ if (tx_ring_dma + size > B44_DMA_MASK) {
kfree(tx_ring);
goto out_err;
}
if (netif_running(dev))
return -EBUSY;
- if (!is_valid_ether_addr(addr->sa_data))
- return -EINVAL;
-
memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
spin_lock_irq(&bp->lock);
* packet processing. Invoked with bp->lock held.
*/
static void __b44_set_rx_mode(struct net_device *);
-static void b44_init_hw(struct b44 *bp, int full_reset)
+static void b44_init_hw(struct b44 *bp)
{
u32 val;
b44_chip_reset(bp);
- if (full_reset) {
- b44_phy_reset(bp);
- b44_setup_phy(bp);
- }
+ b44_phy_reset(bp);
+ b44_setup_phy(bp);
/* Enable CRC32, set proper LED modes and power on PHY */
bw32(bp, B44_MAC_CTRL, MAC_CTRL_CRC32_ENAB | MAC_CTRL_PHY_LEDCTRL);
bw32(bp, B44_TXMAXLEN, bp->dev->mtu + ETH_HLEN + 8 + RX_HEADER_LEN);
bw32(bp, B44_TX_WMARK, 56); /* XXX magic */
- if (full_reset) {
- bw32(bp, B44_DMATX_CTRL, DMATX_CTRL_ENABLE);
- bw32(bp, B44_DMATX_ADDR, bp->tx_ring_dma + bp->dma_offset);
- bw32(bp, B44_DMARX_CTRL, (DMARX_CTRL_ENABLE |
- (bp->rx_offset << DMARX_CTRL_ROSHIFT)));
- bw32(bp, B44_DMARX_ADDR, bp->rx_ring_dma + bp->dma_offset);
+ bw32(bp, B44_DMATX_CTRL, DMATX_CTRL_ENABLE);
+ bw32(bp, B44_DMATX_ADDR, bp->tx_ring_dma + bp->dma_offset);
+ bw32(bp, B44_DMARX_CTRL, (DMARX_CTRL_ENABLE |
+ (bp->rx_offset << DMARX_CTRL_ROSHIFT)));
+ bw32(bp, B44_DMARX_ADDR, bp->rx_ring_dma + bp->dma_offset);
- bw32(bp, B44_DMARX_PTR, bp->rx_pending);
- bp->rx_prod = bp->rx_pending;
+ bw32(bp, B44_DMARX_PTR, bp->rx_pending);
+ bp->rx_prod = bp->rx_pending;
- bw32(bp, B44_MIB_CTRL, MIB_CTRL_CLR_ON_READ);
- } else {
- bw32(bp, B44_DMARX_CTRL, (DMARX_CTRL_ENABLE |
- (bp->rx_offset << DMARX_CTRL_ROSHIFT)));
- }
+ bw32(bp, B44_MIB_CTRL, MIB_CTRL_CLR_ON_READ);
val = br32(bp, B44_ENET_CTRL);
bw32(bp, B44_ENET_CTRL, (val | ENET_CTRL_ENABLE));
goto out;
b44_init_rings(bp);
- b44_init_hw(bp, 1);
+ b44_init_hw(bp);
b44_check_phy(bp);
- err = request_irq(dev->irq, b44_interrupt, IRQF_SHARED, dev->name, dev);
+ err = request_irq(dev->irq, b44_interrupt, SA_SHIRQ, dev->name, dev);
if (unlikely(err < 0)) {
b44_chip_reset(bp);
b44_free_rings(bp);
}
#endif
-static void bwfilter_table(struct b44 *bp, u8 *pp, u32 bytes, u32 table_offset)
-{
- u32 i;
- u32 *pattern = (u32 *) pp;
-
- for (i = 0; i < bytes; i += sizeof(u32)) {
- bw32(bp, B44_FILT_ADDR, table_offset + i);
- bw32(bp, B44_FILT_DATA, pattern[i / sizeof(u32)]);
- }
-}
-
-static int b44_magic_pattern(u8 *macaddr, u8 *ppattern, u8 *pmask, int offset)
-{
- int magicsync = 6;
- int k, j, len = offset;
- int ethaddr_bytes = ETH_ALEN;
-
- memset(ppattern + offset, 0xff, magicsync);
- for (j = 0; j < magicsync; j++)
- set_bit(len++, (unsigned long *) pmask);
-
- for (j = 0; j < B44_MAX_PATTERNS; j++) {
- if ((B44_PATTERN_SIZE - len) >= ETH_ALEN)
- ethaddr_bytes = ETH_ALEN;
- else
- ethaddr_bytes = B44_PATTERN_SIZE - len;
- if (ethaddr_bytes <=0)
- break;
- for (k = 0; k< ethaddr_bytes; k++) {
- ppattern[offset + magicsync +
- (j * ETH_ALEN) + k] = macaddr[k];
- len++;
- set_bit(len, (unsigned long *) pmask);
- }
- }
- return len - 1;
-}
-
-/* Setup magic packet patterns in the b44 WOL
- * pattern matching filter.
- */
-static void b44_setup_pseudo_magicp(struct b44 *bp)
-{
-
- u32 val;
- int plen0, plen1, plen2;
- u8 *pwol_pattern;
- u8 pwol_mask[B44_PMASK_SIZE];
-
- pwol_pattern = kmalloc(B44_PATTERN_SIZE, GFP_KERNEL);
- if (!pwol_pattern) {
- printk(KERN_ERR PFX "Memory not available for WOL\n");
- return;
- }
-
- /* Ipv4 magic packet pattern - pattern 0.*/
- memset(pwol_pattern, 0, B44_PATTERN_SIZE);
- memset(pwol_mask, 0, B44_PMASK_SIZE);
- plen0 = b44_magic_pattern(bp->dev->dev_addr, pwol_pattern, pwol_mask,
- B44_ETHIPV4UDP_HLEN);
-
- bwfilter_table(bp, pwol_pattern, B44_PATTERN_SIZE, B44_PATTERN_BASE);
- bwfilter_table(bp, pwol_mask, B44_PMASK_SIZE, B44_PMASK_BASE);
-
- /* Raw ethernet II magic packet pattern - pattern 1 */
- memset(pwol_pattern, 0, B44_PATTERN_SIZE);
- memset(pwol_mask, 0, B44_PMASK_SIZE);
- plen1 = b44_magic_pattern(bp->dev->dev_addr, pwol_pattern, pwol_mask,
- ETH_HLEN);
-
- bwfilter_table(bp, pwol_pattern, B44_PATTERN_SIZE,
- B44_PATTERN_BASE + B44_PATTERN_SIZE);
- bwfilter_table(bp, pwol_mask, B44_PMASK_SIZE,
- B44_PMASK_BASE + B44_PMASK_SIZE);
-
- /* Ipv6 magic packet pattern - pattern 2 */
- memset(pwol_pattern, 0, B44_PATTERN_SIZE);
- memset(pwol_mask, 0, B44_PMASK_SIZE);
- plen2 = b44_magic_pattern(bp->dev->dev_addr, pwol_pattern, pwol_mask,
- B44_ETHIPV6UDP_HLEN);
-
- bwfilter_table(bp, pwol_pattern, B44_PATTERN_SIZE,
- B44_PATTERN_BASE + B44_PATTERN_SIZE + B44_PATTERN_SIZE);
- bwfilter_table(bp, pwol_mask, B44_PMASK_SIZE,
- B44_PMASK_BASE + B44_PMASK_SIZE + B44_PMASK_SIZE);
-
- kfree(pwol_pattern);
-
- /* set these pattern's lengths: one less than each real length */
- val = plen0 | (plen1 << 8) | (plen2 << 16) | WKUP_LEN_ENABLE_THREE;
- bw32(bp, B44_WKUP_LEN, val);
-
- /* enable wakeup pattern matching */
- val = br32(bp, B44_DEVCTRL);
- bw32(bp, B44_DEVCTRL, val | DEVCTRL_PFE);
-
-}
-
-static void b44_setup_wol(struct b44 *bp)
-{
- u32 val;
- u16 pmval;
-
- bw32(bp, B44_RXCONFIG, RXCONFIG_ALLMULTI);
-
- if (bp->flags & B44_FLAG_B0_ANDLATER) {
-
- bw32(bp, B44_WKUP_LEN, WKUP_LEN_DISABLE);
-
- val = bp->dev->dev_addr[2] << 24 |
- bp->dev->dev_addr[3] << 16 |
- bp->dev->dev_addr[4] << 8 |
- bp->dev->dev_addr[5];
- bw32(bp, B44_ADDR_LO, val);
-
- val = bp->dev->dev_addr[0] << 8 |
- bp->dev->dev_addr[1];
- bw32(bp, B44_ADDR_HI, val);
-
- val = br32(bp, B44_DEVCTRL);
- bw32(bp, B44_DEVCTRL, val | DEVCTRL_MPM | DEVCTRL_PFE);
-
- } else {
- b44_setup_pseudo_magicp(bp);
- }
-
- val = br32(bp, B44_SBTMSLOW);
- bw32(bp, B44_SBTMSLOW, val | SBTMSLOW_PE);
-
- pci_read_config_word(bp->pdev, SSB_PMCSR, &pmval);
- pci_write_config_word(bp->pdev, SSB_PMCSR, pmval | SSB_PE);
-
-}
-
static int b44_close(struct net_device *dev)
{
struct b44 *bp = netdev_priv(dev);
netif_poll_enable(dev);
- if (bp->flags & B44_FLAG_WOL_ENABLE) {
- b44_init_hw(bp, 0);
- b44_setup_wol(bp);
- }
-
b44_free_consistent(bp);
return 0;
val |= RXCONFIG_ALLMULTI;
else
i = __b44_load_mcast(bp, dev);
-
+
for (; i < 64; i++) {
- __b44_cam_write(bp, zero, i);
+ __b44_cam_write(bp, zero, i);
}
bw32(bp, B44_RXCONFIG, val);
val = br32(bp, B44_CAM_CTRL);
{
struct b44 *bp = netdev_priv(dev);
+ if (!netif_running(dev))
+ return -EAGAIN;
cmd->supported = (SUPPORTED_Autoneg);
cmd->supported |= (SUPPORTED_100baseT_Half |
SUPPORTED_100baseT_Full |
XCVR_INTERNAL : XCVR_EXTERNAL;
cmd->autoneg = (bp->flags & B44_FLAG_FORCE_LINK) ?
AUTONEG_DISABLE : AUTONEG_ENABLE;
- if (cmd->autoneg == AUTONEG_ENABLE)
- cmd->advertising |= ADVERTISED_Autoneg;
- if (!netif_running(dev)){
- cmd->speed = 0;
- cmd->duplex = 0xff;
- }
cmd->maxtxpkt = 0;
cmd->maxrxpkt = 0;
return 0;
{
struct b44 *bp = netdev_priv(dev);
+ if (!netif_running(dev))
+ return -EAGAIN;
+
/* We do not support gigabit. */
if (cmd->autoneg == AUTONEG_ENABLE) {
if (cmd->advertising &
spin_lock_irq(&bp->lock);
if (cmd->autoneg == AUTONEG_ENABLE) {
- bp->flags &= ~(B44_FLAG_FORCE_LINK |
- B44_FLAG_100_BASE_T |
- B44_FLAG_FULL_DUPLEX |
- B44_FLAG_ADV_10HALF |
+ bp->flags &= ~B44_FLAG_FORCE_LINK;
+ bp->flags &= ~(B44_FLAG_ADV_10HALF |
B44_FLAG_ADV_10FULL |
B44_FLAG_ADV_100HALF |
B44_FLAG_ADV_100FULL);
- if (cmd->advertising == 0) {
- bp->flags |= (B44_FLAG_ADV_10HALF |
- B44_FLAG_ADV_10FULL |
- B44_FLAG_ADV_100HALF |
- B44_FLAG_ADV_100FULL);
- } else {
- if (cmd->advertising & ADVERTISED_10baseT_Half)
- bp->flags |= B44_FLAG_ADV_10HALF;
- if (cmd->advertising & ADVERTISED_10baseT_Full)
- bp->flags |= B44_FLAG_ADV_10FULL;
- if (cmd->advertising & ADVERTISED_100baseT_Half)
- bp->flags |= B44_FLAG_ADV_100HALF;
- if (cmd->advertising & ADVERTISED_100baseT_Full)
- bp->flags |= B44_FLAG_ADV_100FULL;
- }
+ if (cmd->advertising & ADVERTISE_10HALF)
+ bp->flags |= B44_FLAG_ADV_10HALF;
+ if (cmd->advertising & ADVERTISE_10FULL)
+ bp->flags |= B44_FLAG_ADV_10FULL;
+ if (cmd->advertising & ADVERTISE_100HALF)
+ bp->flags |= B44_FLAG_ADV_100HALF;
+ if (cmd->advertising & ADVERTISE_100FULL)
+ bp->flags |= B44_FLAG_ADV_100FULL;
} else {
bp->flags |= B44_FLAG_FORCE_LINK;
- bp->flags &= ~(B44_FLAG_100_BASE_T | B44_FLAG_FULL_DUPLEX);
if (cmd->speed == SPEED_100)
bp->flags |= B44_FLAG_100_BASE_T;
if (cmd->duplex == DUPLEX_FULL)
bp->flags |= B44_FLAG_FULL_DUPLEX;
}
- if (netif_running(dev))
- b44_setup_phy(bp);
+ b44_setup_phy(bp);
spin_unlock_irq(&bp->lock);
b44_halt(bp);
b44_init_rings(bp);
- b44_init_hw(bp, 1);
+ b44_init_hw(bp);
netif_wake_queue(bp->dev);
spin_unlock_irq(&bp->lock);
b44_enable_ints(bp);
-
+
return 0;
}
if (bp->flags & B44_FLAG_PAUSE_AUTO) {
b44_halt(bp);
b44_init_rings(bp);
- b44_init_hw(bp, 1);
+ b44_init_hw(bp);
} else {
__b44_set_flow_ctrl(bp, bp->flags);
}
spin_unlock_irq(&bp->lock);
b44_enable_ints(bp);
-
+
return 0;
}
spin_unlock_irq(&bp->lock);
}
-static void b44_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
-{
- struct b44 *bp = netdev_priv(dev);
-
- wol->supported = WAKE_MAGIC;
- if (bp->flags & B44_FLAG_WOL_ENABLE)
- wol->wolopts = WAKE_MAGIC;
- else
- wol->wolopts = 0;
- memset(&wol->sopass, 0, sizeof(wol->sopass));
-}
-
-static int b44_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
-{
- struct b44 *bp = netdev_priv(dev);
-
- spin_lock_irq(&bp->lock);
- if (wol->wolopts & WAKE_MAGIC)
- bp->flags |= B44_FLAG_WOL_ENABLE;
- else
- bp->flags &= ~B44_FLAG_WOL_ENABLE;
- spin_unlock_irq(&bp->lock);
-
- return 0;
-}
-
static struct ethtool_ops b44_ethtool_ops = {
.get_drvinfo = b44_get_drvinfo,
.get_settings = b44_get_settings,
.set_settings = b44_set_settings,
.nway_reset = b44_nway_reset,
.get_link = ethtool_op_get_link,
- .get_wol = b44_get_wol,
- .set_wol = b44_set_wol,
.get_ringparam = b44_get_ringparam,
.set_ringparam = b44_set_ringparam,
.get_pauseparam = b44_get_pauseparam,
bp->dev->dev_addr[3] = eeprom[80];
bp->dev->dev_addr[4] = eeprom[83];
bp->dev->dev_addr[5] = eeprom[82];
-
- if (!is_valid_ether_addr(&bp->dev->dev_addr[0])){
- printk(KERN_ERR PFX "Invalid MAC address found in EEPROM\n");
- return -EINVAL;
- }
-
memcpy(bp->dev->perm_addr, bp->dev->dev_addr, bp->dev->addr_len);
bp->phy_addr = eeprom[90] & 0x1f;
bp->core_unit = ssb_core_unit(bp);
bp->dma_offset = SB_PCI_DMA;
- /* XXX - really required?
+ /* XXX - really required?
bp->flags |= B44_FLAG_BUGGY_TXPTR;
*/
-
- if (ssb_get_core_rev(bp) >= 7)
- bp->flags |= B44_FLAG_B0_ANDLATER;
-
out:
return err;
}
err = pci_enable_device(pdev);
if (err) {
- dev_err(&pdev->dev, "Cannot enable PCI device, "
+ printk(KERN_ERR PFX "Cannot enable PCI device, "
"aborting.\n");
return err;
}
if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
- dev_err(&pdev->dev,
- "Cannot find proper PCI device "
+ printk(KERN_ERR PFX "Cannot find proper PCI device "
"base address, aborting.\n");
err = -ENODEV;
goto err_out_disable_pdev;
err = pci_request_regions(pdev, DRV_MODULE_NAME);
if (err) {
- dev_err(&pdev->dev,
- "Cannot obtain PCI resources, aborting.\n");
+ printk(KERN_ERR PFX "Cannot obtain PCI resources, "
+ "aborting.\n");
goto err_out_disable_pdev;
}
err = pci_set_dma_mask(pdev, (u64) B44_DMA_MASK);
if (err) {
- dev_err(&pdev->dev, "No usable DMA configuration, aborting.\n");
+ printk(KERN_ERR PFX "No usable DMA configuration, "
+ "aborting.\n");
goto err_out_free_res;
}
-
+
err = pci_set_consistent_dma_mask(pdev, (u64) B44_DMA_MASK);
if (err) {
- dev_err(&pdev->dev, "No usable DMA configuration, aborting.\n");
+ printk(KERN_ERR PFX "No usable DMA configuration, "
+ "aborting.\n");
goto err_out_free_res;
}
dev = alloc_etherdev(sizeof(*bp));
if (!dev) {
- dev_err(&pdev->dev, "Etherdev alloc failed, aborting.\n");
+ printk(KERN_ERR PFX "Etherdev alloc failed, aborting.\n");
err = -ENOMEM;
goto err_out_free_res;
}
bp->regs = ioremap(b44reg_base, b44reg_len);
if (bp->regs == 0UL) {
- dev_err(&pdev->dev, "Cannot map device registers, aborting.\n");
+ printk(KERN_ERR PFX "Cannot map device registers, "
+ "aborting.\n");
err = -ENOMEM;
goto err_out_free_dev;
}
err = b44_get_invariants(bp);
if (err) {
- dev_err(&pdev->dev,
- "Problem fetching invariants of chip, aborting.\n");
+ printk(KERN_ERR PFX "Problem fetching invariants of chip, "
+ "aborting.\n");
goto err_out_iounmap;
}
err = register_netdev(dev);
if (err) {
- dev_err(&pdev->dev, "Cannot register net device, aborting.\n");
+ printk(KERN_ERR PFX "Cannot register net device, "
+ "aborting.\n");
goto err_out_iounmap;
}
pci_save_state(bp->pdev);
- /* Chip reset provides power to the b44 MAC & PCI cores, which
- * is necessary for MAC register access.
- */
- b44_chip_reset(bp);
-
printk(KERN_INFO "%s: Broadcom 4400 10/100BaseT Ethernet ", dev->name);
for (i = 0; i < 6; i++)
printk("%2.2x%c", dev->dev_addr[i],
del_timer_sync(&bp->timer);
- spin_lock_irq(&bp->lock);
+ spin_lock_irq(&bp->lock);
b44_halt(bp);
- netif_carrier_off(bp->dev);
+ netif_carrier_off(bp->dev);
netif_device_detach(bp->dev);
b44_free_rings(bp);
spin_unlock_irq(&bp->lock);
free_irq(dev->irq, dev);
- if (bp->flags & B44_FLAG_WOL_ENABLE) {
- b44_init_hw(bp, 0);
- b44_setup_wol(bp);
- }
pci_disable_device(pdev);
return 0;
}
if (!netif_running(dev))
return 0;
- if (request_irq(dev->irq, b44_interrupt, IRQF_SHARED, dev->name, dev))
+ if (request_irq(dev->irq, b44_interrupt, SA_SHIRQ, dev->name, dev))
printk(KERN_ERR PFX "%s: request_irq failed\n", dev->name);
spin_lock_irq(&bp->lock);
b44_init_rings(bp);
- b44_init_hw(bp, 1);
+ b44_init_hw(bp);
netif_device_attach(bp->dev);
spin_unlock_irq(&bp->lock);
git://git.onelab.eu / linux-2.6.git / blobdiff