#include <linux/ctype.h>
#include <linux/dma-mapping.h>
#include <linux/moduleparam.h>
+#include <linux/bitops.h>
-#include <asm/bitops.h>
#include <asm/io.h>
#include <asm/dma.h>
#include <asm/byteorder.h>
lp->asBitValid = TRUE;
lp->timeout = -1;
lp->gendev = gendev;
- lp->lock = SPIN_LOCK_UNLOCKED;
+ spin_lock_init(&lp->lock);
init_timer(&lp->timer);
de4x5_parse_params(dev);
** Re-initialize the DE4X5...
*/
status = de4x5_init(dev);
- lp->lock = SPIN_LOCK_UNLOCKED;
+ spin_lock_init(&lp->lock);
lp->state = OPEN;
de4x5_dbg_open(dev);
return -ENODEV;
/* Ok, the device seems to be for us. */
- if (pci_enable_device (pdev))
- return -ENODEV;
+ if ((error = pci_enable_device (pdev)))
+ return error;
if (!(dev = alloc_etherdev (sizeof (struct de4x5_private)))) {
error = -ENOMEM;
lp->useMII = TRUE;
/* Search the MII address space for possible PHY devices */
- for (n=0, lp->mii_cnt=0, i=1; !((i==1) && (n==1)); i=(++i)%DE4X5_MAX_MII) {
+ for (n=0, lp->mii_cnt=0, i=1; !((i==1) && (n==1)); i=(i+1)%DE4X5_MAX_MII) {
lp->phy[lp->active].addr = i;
if (i==0) n++; /* Count cycles */
while (de4x5_reset_phy(dev)<0) udelay(100);/* Wait for reset */