Fedora kernel-2.6.17-1.2142_FC4 patched with stable patch-2.6.17.4-vs2.0.2-rc26.diff

[linux-2.6.git] / drivers / scsi / aic7xxx / aicasm / aicasm_insformat.h

diff --git a/drivers/scsi/aic7xxx/aicasm/aicasm_insformat.h b/drivers/scsi/aic7xxx/aicasm/aicasm_insformat.h
index 3e80f07..9df9e2c 100644 (file)
--- a/drivers/scsi/aic7xxx/aicasm/aicasm_insformat.h
+++ b/drivers/scsi/aic7xxx/aicasm/aicasm_insformat.h
@@ -37,13 +37,16 @@
  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGES.
  *
- * $Id: //depot/aic7xxx/aic7xxx/aicasm/aicasm_insformat.h#11 $
+ * $Id: //depot/aic7xxx/aic7xxx/aicasm/aicasm_insformat.h#12 $
  *
  * $FreeBSD$
  */
 
+#include <asm/byteorder.h>
+
+/* 8bit ALU logic operations */
 struct ins_format1 {
-#if BYTE_ORDER == LITTLE_ENDIAN
+#ifdef __LITTLE_ENDIAN
        uint32_t        immediate       : 8,
                        source          : 9,
                        destination     : 9,
@@ -60,8 +63,9 @@ struct ins_format1 {
 #endif
 };
 
+/* 8bit ALU shift/rotate operations */
 struct ins_format2 {
-#if BYTE_ORDER == LITTLE_ENDIAN
+#ifdef __LITTLE_ENDIAN
        uint32_t        shift_control   : 8,
                        source          : 9,
                        destination     : 9,
@@ -78,8 +82,9 @@ struct ins_format2 {
 #endif
 };
 
+/* 8bit branch control operations */
 struct ins_format3 {
-#if BYTE_ORDER == LITTLE_ENDIAN
+#ifdef __LITTLE_ENDIAN
        uint32_t        immediate       : 8,
                        source          : 9,
                        address         : 10,
@@ -94,10 +99,68 @@ struct ins_format3 {
 #endif
 };
 
+/* 16bit ALU logic operations */
+struct ins_format4 {
+#ifdef __LITTLE_ENDIAN
+       uint32_t        opcode_ext      : 8,
+                       source          : 9,
+                       destination     : 9,
+                       ret             : 1,
+                       opcode          : 4,
+                       parity          : 1;
+#else
+       uint32_t        parity          : 1,
+                       opcode          : 4,
+                       ret             : 1,
+                       destination     : 9,
+                       source          : 9,
+                       opcode_ext      : 8;
+#endif
+};
+
+/* 16bit branch control operations */
+struct ins_format5 {
+#ifdef __LITTLE_ENDIAN
+       uint32_t        opcode_ext      : 8,
+                       source          : 9,
+                       address         : 10,
+                       opcode          : 4,
+                       parity          : 1;
+#else
+       uint32_t        parity          : 1,
+                       opcode          : 4,
+                       address         : 10,
+                       source          : 9,
+                       opcode_ext      : 8;
+#endif
+};
+
+/*  Far branch operations */
+struct ins_format6 {
+#ifdef __LITTLE_ENDIAN
+       uint32_t        page            : 3,
+                       opcode_ext      : 5,
+                       source          : 9,
+                       address         : 10,
+                       opcode          : 4,
+                       parity          : 1;
+#else
+       uint32_t        parity          : 1,
+                       opcode          : 4,
+                       address         : 10,
+                       source          : 9,
+                       opcode_ext      : 5,
+                       page            : 3;
+#endif
+};
+
 union ins_formats {
                struct ins_format1 format1;
                struct ins_format2 format2;
                struct ins_format3 format3;
+               struct ins_format4 format4;
+               struct ins_format5 format5;
+               struct ins_format6 format6;
                uint8_t            bytes[4];
                uint32_t           integer;
 };
@@ -116,6 +179,8 @@ struct instruction {
 #define        AIC_OP_ROL      0x5
 #define        AIC_OP_BMOV     0x6
 
+#define        AIC_OP_MVI16    0x7
+
 #define        AIC_OP_JMP      0x8
 #define AIC_OP_JC      0x9
 #define AIC_OP_JNC     0xa
@@ -129,3 +194,26 @@ struct instruction {
 #define        AIC_OP_SHL      0x10
 #define        AIC_OP_SHR      0x20
 #define        AIC_OP_ROR      0x30
+
+/* 16bit Ops. Low byte main opcode.  High byte extended opcode. */ 
+#define        AIC_OP_OR16     0x8005
+#define        AIC_OP_AND16    0x8105
+#define        AIC_OP_XOR16    0x8205
+#define        AIC_OP_ADD16    0x8305
+#define        AIC_OP_ADC16    0x8405
+#define AIC_OP_JNE16   0x8805
+#define AIC_OP_JNZ16   0x8905
+#define AIC_OP_JE16    0x8C05
+#define AIC_OP_JZ16    0x8B05
+#define AIC_OP_JMP16   0x9005
+#define AIC_OP_JC16    0x9105
+#define AIC_OP_JNC16   0x9205
+#define AIC_OP_CALL16  0x9305
+#define AIC_OP_CALL16  0x9305
+
+/* Page extension is low three bits of second opcode byte. */
+#define AIC_OP_JMPF    0xA005
+#define AIC_OP_CALLF   0xB005
+#define AIC_OP_JCF     0xC005
+#define AIC_OP_JNCF    0xD005
+#define AIC_OP_CMPXCHG 0xE005