#include <linux/libata.h>
#define DRV_NAME "ata_piix"
-#define DRV_VERSION "1.02"
+#define DRV_VERSION "1.03"
enum {
PIIX_IOCFG = 0x54, /* IDE I/O configuration register */
piix4_pata = 2,
ich6_sata = 3,
ich6_sata_rm = 4,
+ ich7_sata = 5,
};
static int piix_init_one (struct pci_dev *pdev,
{ 0x8086, 0x2651, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
{ 0x8086, 0x2652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_rm },
{ 0x8086, 0x2653, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_rm },
+ { 0x8086, 0x27c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich7_sata },
+ { 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich7_sata },
{ } /* terminate list */
};
.bmdma_setup = ata_bmdma_setup,
.bmdma_start = ata_bmdma_start,
+ .bmdma_stop = ata_bmdma_stop,
+ .bmdma_status = ata_bmdma_status,
.qc_prep = ata_qc_prep,
.qc_issue = ata_qc_issue_prot,
.bmdma_setup = ata_bmdma_setup,
.bmdma_start = ata_bmdma_start,
+ .bmdma_stop = ata_bmdma_stop,
+ .bmdma_status = ata_bmdma_status,
.qc_prep = ata_qc_prep,
.qc_issue = ata_qc_issue_prot,
#else
.mwdma_mask = 0x00, /* mwdma broken */
#endif
- .udma_mask = ATA_UDMA_MASK_40C, /* FIXME: cbl det */
+ .udma_mask = 0x3f, /* udma0-5 */
.port_ops = &piix_pata_ops,
},
#else
.mwdma_mask = 0x00, /* mwdma broken */
#endif
- .udma_mask = ATA_UDMA_MASK_40C, /* FIXME: cbl det */
+ .udma_mask = ATA_UDMA_MASK_40C,
.port_ops = &piix_pata_ops,
},
.udma_mask = 0x7f, /* udma0-6 */
.port_ops = &piix_sata_ops,
},
+
+ /* ich7_sata */
+ {
+ .sht = &piix_sht,
+ .host_flags = ATA_FLAG_SATA | ATA_FLAG_SRST |
+ PIIX_FLAG_COMBINED | PIIX_FLAG_CHECKINTR |
+ ATA_FLAG_SLAVE_POSS | PIIX_FLAG_AHCI,
+ .pio_mask = 0x1f, /* pio0-4 */
+ .mwdma_mask = 0x07, /* mwdma0-2 */
+ .udma_mask = 0x7f, /* udma0-6 */
+ .port_ops = &piix_sata_ops,
+ },
};
static struct pci_bits piix_enable_bits[] = {
MODULE_DESCRIPTION("SCSI low-level driver for Intel PIIX/ICH ATA controllers");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, piix_pci_tbl);
+MODULE_VERSION(DRV_VERSION);
/**
* piix_pata_cbl_detect - Probe host controller cable detect info
* @ap: Port for which cable detect info is desired
*
- * Read 80c cable indicator from SATA PCI device's PCI config
+ * Read 80c cable indicator from ATA PCI device's PCI config
* register. This register is normally set by firmware (BIOS).
*
* LOCKING:
*/
static void piix_pata_cbl_detect(struct ata_port *ap)
{
- struct pci_dev *pdev = ap->host_set->pdev;
+ struct pci_dev *pdev = to_pci_dev(ap->host_set->dev);
u8 tmp, mask;
/* no 80c support in host controller? */
goto cbl40;
/* check BIOS cable detect results */
- mask = ap->port_no == 0 ? PIIX_80C_PRI : PIIX_80C_SEC;
+ mask = ap->hard_port_no == 0 ? PIIX_80C_PRI : PIIX_80C_SEC;
pci_read_config_byte(pdev, PIIX_IOCFG, &tmp);
if ((tmp & mask) == 0)
goto cbl40;
static void piix_pata_phy_reset(struct ata_port *ap)
{
- if (!pci_test_config_bits(ap->host_set->pdev,
- &piix_enable_bits[ap->port_no])) {
+ struct pci_dev *pdev = to_pci_dev(ap->host_set->dev);
+
+ if (!pci_test_config_bits(pdev, &piix_enable_bits[ap->hard_port_no])) {
ata_port_disable(ap);
printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id);
return;
*/
static int piix_sata_probe (struct ata_port *ap)
{
- struct pci_dev *pdev = ap->host_set->pdev;
+ struct pci_dev *pdev = to_pci_dev(ap->host_set->dev);
int combined = (ap->flags & ATA_FLAG_SLAVE_POSS);
int orig_mask, mask, i;
u8 pcs;
- mask = (PIIX_PORT_PRESENT << ap->port_no) |
- (PIIX_PORT_ENABLED << ap->port_no);
+ mask = (PIIX_PORT_PRESENT << ap->hard_port_no) |
+ (PIIX_PORT_ENABLED << ap->hard_port_no);
pci_read_config_byte(pdev, ICH5_PCS, &pcs);
orig_mask = (int) pcs & 0xff;
mask = (PIIX_PORT_PRESENT << i) | (PIIX_PORT_ENABLED << i);
if ((orig_mask & mask) == mask)
- if (combined || (i == ap->port_no))
+ if (combined || (i == ap->hard_port_no))
return 1;
}
static void piix_set_piomode (struct ata_port *ap, struct ata_device *adev)
{
unsigned int pio = adev->pio_mode - XFER_PIO_0;
- struct pci_dev *dev = ap->host_set->pdev;
+ struct pci_dev *dev = to_pci_dev(ap->host_set->dev);
unsigned int is_slave = (adev->devno != 0);
- unsigned int master_port= ap->port_no ? 0x42 : 0x40;
+ unsigned int master_port= ap->hard_port_no ? 0x42 : 0x40;
unsigned int slave_port = 0x44;
u16 master_data;
u8 slave_data;
/* enable PPE, IE and TIME */
master_data |= 0x0070;
pci_read_config_byte(dev, slave_port, &slave_data);
- slave_data &= (ap->port_no ? 0x0f : 0xf0);
+ slave_data &= (ap->hard_port_no ? 0x0f : 0xf0);
slave_data |=
(timings[pio][0] << 2) |
- (timings[pio][1] << (ap->port_no ? 4 : 0));
+ (timings[pio][1] << (ap->hard_port_no ? 4 : 0));
} else {
master_data &= 0xccf8;
/* enable PPE, IE and TIME */
static void piix_set_dmamode (struct ata_port *ap, struct ata_device *adev)
{
unsigned int udma = adev->dma_mode; /* FIXME: MWDMA too */
- struct pci_dev *dev = ap->host_set->pdev;
- u8 maslave = ap->port_no ? 0x42 : 0x40;
+ struct pci_dev *dev = to_pci_dev(ap->host_set->dev);
+ u8 maslave = ap->hard_port_no ? 0x42 : 0x40;
u8 speed = udma;
- unsigned int drive_dn = (ap->port_no ? 2 : 0) + adev->devno;
+ unsigned int drive_dn = (ap->hard_port_no ? 2 : 0) + adev->devno;
int a_speed = 3 << (drive_dn * 4);
int u_flag = 1 << drive_dn;
int v_flag = 0x01 << drive_dn;