/*
* Literals
*/
-#define IPR_DRIVER_VERSION "2.0.12"
-#define IPR_DRIVER_DATE "(December 14, 2004)"
+#define IPR_DRIVER_VERSION "2.0.13"
+#define IPR_DRIVER_DATE "(February 21, 2005)"
/*
* IPR_DBG_TRACE: Setting this to 1 will turn on some general function tracing
#define IPR_SUBS_DEV_ID_2780 0x0264
#define IPR_SUBS_DEV_ID_5702 0x0266
#define IPR_SUBS_DEV_ID_5703 0x0278
-#define IPR_SUBS_DEV_ID_572E 0x02D3
+#define IPR_SUBS_DEV_ID_572E 0x028D
+#define IPR_SUBS_DEV_ID_573E 0x02D3
#define IPR_SUBS_DEV_ID_573D 0x02D4
-#define IPR_SUBS_DEV_ID_570F 0x02BD
+#define IPR_SUBS_DEV_ID_571A 0x02C0
#define IPR_SUBS_DEV_ID_571B 0x02BE
+#define IPR_SUBS_DEV_ID_571E 0x02BF
#define IPR_NAME "ipr"
#define IPR_MAX_PHYSICAL_DEVS 192
#define IPR_MAX_SGLIST 64
-#define IPR_MAX_SECTORS 512
+#define IPR_IOA_MAX_SECTORS 32767
+#define IPR_VSET_MAX_SECTORS 512
#define IPR_MAX_CDB_LEN 16
#define IPR_DEFAULT_BUS_WIDTH 16
/*
* Timeouts
*/
-#define IPR_SHUTDOWN_TIMEOUT (10 * 60 * HZ)
-#define IPR_VSET_RW_TIMEOUT (2 * 60 * HZ)
+#define IPR_SHUTDOWN_TIMEOUT (ipr_fastfail ? 60 * HZ : 10 * 60 * HZ)
+#define IPR_VSET_RW_TIMEOUT (ipr_fastfail ? 30 * HZ : 2 * 60 * HZ)
#define IPR_ABBREV_SHUTDOWN_TIMEOUT (10 * HZ)
-#define IPR_DEVICE_RESET_TIMEOUT (30 * HZ)
-#define IPR_CANCEL_ALL_TIMEOUT (30 * HZ)
-#define IPR_ABORT_TASK_TIMEOUT (30 * HZ)
-#define IPR_INTERNAL_TIMEOUT (30 * HZ)
+#define IPR_DEVICE_RESET_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
+#define IPR_CANCEL_ALL_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
+#define IPR_ABORT_TASK_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
+#define IPR_INTERNAL_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
#define IPR_WRITE_BUFFER_TIMEOUT (10 * 60 * HZ)
#define IPR_SET_SUP_DEVICE_TIMEOUT (2 * 60 * HZ)
#define IPR_REQUEST_SENSE_TIMEOUT (10 * HZ)
-#define IPR_OPERATIONAL_TIMEOUT (5 * 60 * HZ)
+#define IPR_OPERATIONAL_TIMEOUT (5 * 60)
#define IPR_WAIT_FOR_RESET_TIMEOUT (2 * HZ)
#define IPR_CHECK_FOR_RESET_TIMEOUT (HZ / 10)
#define IPR_WAIT_FOR_BIST_TIMEOUT (2 * HZ)
#define IPR_SUBTYPE_VOLUME_SET 2
struct ipr_res_addr res_addr;
- u32 res_handle;
- u32 reserved4[2];
+ __be32 res_handle;
+ __be32 reserved4[2];
struct ipr_std_inq_data std_inq_data;
}__attribute__ ((packed, aligned (4)));
u8 num_entries;
u8 flags;
#define IPR_UCODE_DOWNLOAD_REQ 0x10
- u16 reserved;
+ __be16 reserved;
}__attribute__((packed, aligned (4)));
struct ipr_config_table {
}__attribute__((packed, aligned (4)));
struct ipr_supported_device {
- u16 data_length;
+ __be16 data_length;
u8 reserved;
u8 num_records;
struct ipr_std_inq_vpids vpids;
/* Command packet structure */
struct ipr_cmd_pkt {
- u16 reserved; /* Reserved by IOA */
+ __be16 reserved; /* Reserved by IOA */
u8 request_type;
#define IPR_RQTYPE_SCSICDB 0x00
#define IPR_RQTYPE_IOACMD 0x01
#define IPR_FLAGS_LO_ACA_TASK 0x08
u8 cdb[16];
- u16 timeout;
+ __be16 timeout;
}__attribute__ ((packed, aligned(4)));
/* IOA Request Control Block 128 bytes */
struct ipr_ioarcb {
- u32 ioarcb_host_pci_addr;
- u32 reserved;
- u32 res_handle;
- u32 host_response_handle;
- u32 reserved1;
- u32 reserved2;
- u32 reserved3;
-
- u32 write_data_transfer_length;
- u32 read_data_transfer_length;
- u32 write_ioadl_addr;
- u32 write_ioadl_len;
- u32 read_ioadl_addr;
- u32 read_ioadl_len;
-
- u32 ioasa_host_pci_addr;
- u16 ioasa_len;
- u16 reserved4;
+ __be32 ioarcb_host_pci_addr;
+ __be32 reserved;
+ __be32 res_handle;
+ __be32 host_response_handle;
+ __be32 reserved1;
+ __be32 reserved2;
+ __be32 reserved3;
+
+ __be32 write_data_transfer_length;
+ __be32 read_data_transfer_length;
+ __be32 write_ioadl_addr;
+ __be32 write_ioadl_len;
+ __be32 read_ioadl_addr;
+ __be32 read_ioadl_len;
+
+ __be32 ioasa_host_pci_addr;
+ __be16 ioasa_len;
+ __be16 reserved4;
struct ipr_cmd_pkt cmd_pkt;
- u32 add_cmd_parms_len;
- u32 add_cmd_parms[10];
+ __be32 add_cmd_parms_len;
+ __be32 add_cmd_parms[10];
}__attribute__((packed, aligned (4)));
struct ipr_ioadl_desc {
- u32 flags_and_data_len;
+ __be32 flags_and_data_len;
#define IPR_IOADL_FLAGS_MASK 0xff000000
#define IPR_IOADL_GET_FLAGS(x) (be32_to_cpu(x) & IPR_IOADL_FLAGS_MASK)
#define IPR_IOADL_DATA_LEN_MASK 0x00ffffff
#define IPR_IOADL_FLAGS_WRITE_LAST 0x69000000
#define IPR_IOADL_FLAGS_LAST 0x01000000
- u32 address;
+ __be32 address;
}__attribute__((packed, aligned (8)));
struct ipr_ioasa_vset {
- u32 failing_lba_hi;
- u32 failing_lba_lo;
- u32 ioa_data[22];
+ __be32 failing_lba_hi;
+ __be32 failing_lba_lo;
+ __be32 ioa_data[22];
}__attribute__((packed, aligned (4)));
struct ipr_ioasa_af_dasd {
- u32 failing_lba;
+ __be32 failing_lba;
}__attribute__((packed, aligned (4)));
struct ipr_ioasa_gpdd {
u8 end_state;
u8 bus_phase;
- u16 reserved;
- u32 ioa_data[23];
+ __be16 reserved;
+ __be32 ioa_data[23];
}__attribute__((packed, aligned (4)));
struct ipr_ioasa_raw {
- u32 ioa_data[24];
+ __be32 ioa_data[24];
}__attribute__((packed, aligned (4)));
struct ipr_ioasa {
- u32 ioasc;
+ __be32 ioasc;
#define IPR_IOASC_SENSE_KEY(ioasc) ((ioasc) >> 24)
#define IPR_IOASC_SENSE_CODE(ioasc) (((ioasc) & 0x00ff0000) >> 16)
#define IPR_IOASC_SENSE_QUAL(ioasc) (((ioasc) & 0x0000ff00) >> 8)
#define IPR_IOASC_SENSE_STATUS(ioasc) ((ioasc) & 0x000000ff)
- u16 ret_stat_len; /* Length of the returned IOASA */
+ __be16 ret_stat_len; /* Length of the returned IOASA */
- u16 avail_stat_len; /* Total Length of status available. */
+ __be16 avail_stat_len; /* Total Length of status available. */
- u32 residual_data_len; /* number of bytes in the host data */
+ __be32 residual_data_len; /* number of bytes in the host data */
/* buffers that were not used by the IOARCB command. */
- u32 ilid;
+ __be32 ilid;
#define IPR_NO_ILID 0
#define IPR_DRIVER_ILID 0xffffffff
- u32 fd_ioasc;
+ __be32 fd_ioasc;
- u32 fd_phys_locator;
+ __be32 fd_phys_locator;
- u32 fd_res_handle;
+ __be32 fd_res_handle;
- u32 ioasc_specific; /* status code specific field */
+ __be32 ioasc_specific; /* status code specific field */
#define IPR_IOASC_SPECIFIC_MASK 0x00ffffff
#define IPR_FIELD_POINTER_VALID (0x80000000 >> 8)
#define IPR_FIELD_POINTER_MASK 0x0000ffff
u8 extended_reset_delay;
#define IPR_EXTENDED_RESET_DELAY 7
- u32 max_xfer_rate;
+ __be32 max_xfer_rate;
u8 spinup_delay;
u8 reserved3;
- u16 reserved4;
+ __be16 reserved4;
}__attribute__((packed, aligned (4)));
struct ipr_mode_page28 {
u8 ioa_last_with_dev_sn[IPR_SERIAL_NUM_LEN];
struct ipr_std_inq_vpids cfc_last_with_dev_vpids;
u8 cfc_last_with_dev_sn[IPR_SERIAL_NUM_LEN];
- u32 ioa_data[5];
+ __be32 ioa_data[5];
}__attribute__((packed, aligned (4)));
struct ipr_hostrcb_array_data_entry {
}__attribute__((packed, aligned (4)));
struct ipr_hostrcb_type_ff_error {
- u32 ioa_data[246];
+ __be32 ioa_data[246];
}__attribute__((packed, aligned (4)));
struct ipr_hostrcb_type_01_error {
- u32 seek_counter;
- u32 read_counter;
+ __be32 seek_counter;
+ __be32 read_counter;
u8 sense_data[32];
- u32 ioa_data[236];
+ __be32 ioa_data[236];
}__attribute__((packed, aligned (4)));
struct ipr_hostrcb_type_02_error {
u8 ioa_last_attached_to_cfc_sn[IPR_SERIAL_NUM_LEN];
struct ipr_std_inq_vpids cfc_last_attached_to_ioa_vpids;
u8 cfc_last_attached_to_ioa_sn[IPR_SERIAL_NUM_LEN];
- u32 ioa_data[3];
+ __be32 ioa_data[3];
u8 reserved[844];
}__attribute__((packed, aligned (4)));
u8 ioa_sn[IPR_SERIAL_NUM_LEN];
struct ipr_std_inq_vpids cfc_vpids;
u8 cfc_sn[IPR_SERIAL_NUM_LEN];
- u32 errors_detected;
- u32 errors_logged;
+ __be32 errors_detected;
+ __be32 errors_logged;
u8 ioa_data[12];
struct ipr_hostrcb_device_data_entry dev_entry[3];
u8 reserved[444];
u8 cfc_sn[IPR_SERIAL_NUM_LEN];
u8 ioa_data[12];
struct ipr_hostrcb_array_data_entry array_member[10];
- u32 exposed_mode_adn;
- u32 array_id;
+ __be32 exposed_mode_adn;
+ __be32 array_id;
struct ipr_std_inq_vpids incomp_dev_vpids;
u8 incomp_dev_sn[IPR_SERIAL_NUM_LEN];
- u32 ioa_data2;
+ __be32 ioa_data2;
struct ipr_hostrcb_array_data_entry array_member2[8];
struct ipr_res_addr last_func_vset_res_addr;
u8 vset_serial_num[IPR_SERIAL_NUM_LEN];
}__attribute__((packed, aligned (4)));
struct ipr_hostrcb_error {
- u32 failing_dev_ioasc;
+ __be32 failing_dev_ioasc;
struct ipr_res_addr failing_dev_res_addr;
- u32 failing_dev_res_handle;
- u32 prc;
+ __be32 failing_dev_res_handle;
+ __be32 prc;
union {
struct ipr_hostrcb_type_ff_error type_ff_error;
struct ipr_hostrcb_type_01_error type_01_error;
}__attribute__((packed, aligned (4)));
struct ipr_hostrcb_raw {
- u32 data[sizeof(struct ipr_hostrcb_error)/sizeof(u32)];
+ __be32 data[sizeof(struct ipr_hostrcb_error)/sizeof(__be32)];
}__attribute__((packed, aligned (4)));
struct ipr_hcam {
#define IPR_HOST_RCB_OVERLAY_ID_DEFAULT 0xFF
u8 reserved1[3];
- u32 ilid;
- u32 time_since_last_ioa_reset;
- u32 reserved2;
- u32 length;
+ __be32 ilid;
+ __be32 time_since_last_ioa_reset;
+ __be32 reserved2;
+ __be32 length;
union {
struct ipr_hostrcb_error error;
/* IPR smart dump table structures */
struct ipr_sdt_entry {
- u32 bar_str_offset;
- u32 end_offset;
+ __be32 bar_str_offset;
+ __be32 end_offset;
u8 entry_byte;
u8 reserved[3];
#define IPR_SDT_VALID_ENTRY 0x20
u8 resv;
- u16 priority;
+ __be16 priority;
}__attribute__((packed, aligned (4)));
struct ipr_sdt_header {
- u32 state;
- u32 num_entries;
- u32 num_entries_used;
- u32 dump_size;
+ __be32 state;
+ __be32 num_entries;
+ __be32 num_entries_used;
+ __be32 dump_size;
}__attribute__((packed, aligned (4)));
struct ipr_sdt {
u8 add_to_ml:1;
u8 del_from_ml:1;
u8 resetting_device:1;
- u8 tcq_active:1;
- int qdepth;
struct scsi_device *sdev;
struct list_head queue;
};
struct ipr_interrupt_offsets regs;
};
+struct ipr_chip_t {
+ u16 vendor;
+ u16 device;
+ const struct ipr_chip_cfg_t *cfg;
+};
+
enum ipr_shutdown_type {
IPR_SHUTDOWN_NORMAL = 0x00,
IPR_SHUTDOWN_PREPARE_FOR_NORMAL = 0x40,
#define IPR_TRACE_FINISH 0xff
u16 cmd_index;
- u32 res_handle;
+ __be32 res_handle;
union {
u32 ioasc;
u32 add_data;
struct list_head hostrcb_free_q;
struct list_head hostrcb_pending_q;
- u32 *host_rrq;
+ __be32 *host_rrq;
dma_addr_t host_rrq_dma;
#define IPR_HRRQ_REQ_RESP_HANDLE_MASK 0xfffffffc
#define IPR_HRRQ_RESP_BIT_SET 0x00000002
#define IPR_HRRQ_TOGGLE_BIT 0x00000001
#define IPR_HRRQ_REQ_RESP_HANDLE_SHIFT 2
- volatile u32 *hrrq_start;
- volatile u32 *hrrq_end;
- volatile u32 *hrrq_curr;
+ volatile __be32 *hrrq_start;
+ volatile __be32 *hrrq_end;
+ volatile __be32 *hrrq_curr;
volatile u32 toggle_bit;
struct ipr_bus_attributes bus_attr[IPR_MAX_NUM_BUSES];
struct ipr_ioa_dump {
struct ipr_dump_entry_header hdr;
struct ipr_sdt sdt;
- u32 *ioa_data[IPR_MAX_NUM_DUMP_PAGES];
+ __be32 *ioa_data[IPR_MAX_NUM_DUMP_PAGES];
u32 reserved;
u32 next_page_index;
u32 page_offset;
};
struct ipr_software_inq_lid_info {
- u32 load_id;
- u32 timestamp[3];
+ __be32 load_id;
+ __be32 timestamp[3];
}__attribute__((packed, aligned (4)));
struct ipr_ucode_image_header {
- u32 header_length;
- u32 lid_table_offset;
+ __be32 header_length;
+ __be32 lid_table_offset;
u8 major_release;
u8 card_type;
u8 minor_release[2];
u8 reserved[20];
char eyecatcher[16];
- u32 num_lids;
+ __be32 num_lids;
struct ipr_software_inq_lid_info lid[1];
}__attribute__((packed, aligned (4)));
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