#include <linux/blkdev.h>
#include <linux/types.h>
-#include <linux/dma-mapping.h>
#include <scsi/sg.h>
#include <linux/module.h>
#include <linux/stat.h>
+#include <linux/config.h>
#include <linux/spinlock.h>
#include <linux/init.h>
* We now have key/value pairs.
* Update the variables
*/
- for (i = 0; i < ARRAY_SIZE(options); i++) {
+ for (i = 0; i < (sizeof (options) / sizeof (options[0])); i++) {
if (strnicmp
(key, options[i].option_name,
strlen(options[i].option_name)) == 0) {
return (0);
}
ha->ioctl_reset = 1; /* This reset request is from an IOCTL */
- __ips_eh_reset(SC);
+ ips_eh_reset(SC);
SC->result = DID_OK << 16;
SC->scsi_done(SC);
return (0);
METHOD_TRACE("ips_rdcap", 1);
- if (scb->scsi_cmd->request_bufflen < 8)
+ if (scb->scsi_cmd->bufflen < 8)
return (0);
cap.lba =
break;
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
}
if (j >= 45)
break;
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
}
if (j >= 240)
break;
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
}
if (i >= 240)
break;
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
}
if (j >= 45)
break;
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
}
if (j >= 240)
break;
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
}
if (i >= 240)
break;
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
}
if (i >= 45) {
if (Post != 0x4F00)
break;
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
}
if (i >= 120) {
break;
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
}
if (i >= 240) {
outb(IPS_BIT_RST, ha->io_addr + IPS_REG_SCPR);
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
outb(0, ha->io_addr + IPS_REG_SCPR);
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
if ((*ha->func.init) (ha))
break;
writeb(IPS_BIT_RST, ha->mem_ptr + IPS_REG_SCPR);
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
writeb(0, ha->mem_ptr + IPS_REG_SCPR);
/* Delay for 1 Second */
- MDELAY(IPS_ONE_SEC);
+ msleep(IPS_ONE_SEC);
if ((*ha->func.init) (ha))
break;
writel(0x80000000, ha->mem_ptr + IPS_REG_I960_IDR);
/* Delay for 5 Seconds */
- MDELAY(5 * IPS_ONE_SEC);
+ msleep(5 * IPS_ONE_SEC);
/* Do a PCI config read to wait for adapter */
pci_read_config_byte(ha->pcidev, 4, &junk);
/* VPP failure */
return (1);
- /* check for successful flash */
+ /* check for succesful flash */
if (status & 0x30)
/* sequence error */
return (1);
/* VPP failure */
return (1);
- /* check for successful flash */
+ /* check for succesful flash */
if (status & 0x30)
/* sequence error */
return (1);
memcpy(ha, oldha, sizeof (ips_ha_t));
free_irq(oldha->irq, oldha);
/* Install the interrupt handler with the new ha */
- if (request_irq(ha->irq, do_ipsintr, IRQF_SHARED, ips_name, ha)) {
+ if (request_irq(ha->irq, do_ipsintr, SA_SHIRQ, ips_name, ha)) {
IPS_PRINTK(KERN_WARNING, ha->pcidev,
"Unable to install interrupt handler\n");
scsi_host_put(sh);
* are guaranteed to be < 4G.
*/
if (IPS_ENABLE_DMA64 && IPS_HAS_ENH_SGLIST(ha) &&
- !pci_set_dma_mask(ha->pcidev, DMA_64BIT_MASK)) {
+ !pci_set_dma_mask(ha->pcidev, 0xffffffffffffffffULL)) {
(ha)->flags |= IPS_HA_ENH_SG;
} else {
- if (pci_set_dma_mask(ha->pcidev, DMA_32BIT_MASK) != 0) {
+ if (pci_set_dma_mask(ha->pcidev, 0xffffffffULL) != 0) {
printk(KERN_WARNING "Unable to set DMA Mask\n");
return ips_abort_init(ha, index);
}
}
/* Install the interrupt handler */
- if (request_irq(ha->irq, do_ipsintr, IRQF_SHARED, ips_name, ha)) {
+ if (request_irq(ha->irq, do_ipsintr, SA_SHIRQ, ips_name, ha)) {
IPS_PRINTK(KERN_WARNING, ha->pcidev,
"Unable to install interrupt handler\n");
return ips_abort_init(ha, index);