/*******************************************************************
* This file is part of the Emulex Linux Device Driver for *
* Fibre Channel Host Bus Adapters. *
- * Copyright (C) 2004-2005 Emulex. All rights reserved. *
+ * Copyright (C) 2004-2006 Emulex. All rights reserved. *
* EMULEX and SLI are trademarks of Emulex. *
* www.emulex.com *
* Portions Copyright (C) 2004-2005 Christoph Hellwig *
#include "lpfc_crtn.h"
#include "lpfc_version.h"
-static int lpfc_parse_vpd(struct lpfc_hba *, uint8_t *);
+static int lpfc_parse_vpd(struct lpfc_hba *, uint8_t *, int);
static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
static int lpfc_post_rcv_buf(struct lpfc_hba *);
uint16_t offset = 0;
static char licensed[56] =
"key unlock for use with gnu public licensed code only\0";
+ static int init_key = 1;
pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
if (!pmb) {
phba->hba_state = LPFC_INIT_MBX_CMDS;
if (lpfc_is_LC_HBA(phba->pcidev->device)) {
- uint32_t *ptext = (uint32_t *) licensed;
+ if (init_key) {
+ uint32_t *ptext = (uint32_t *) licensed;
- for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
- *ptext = cpu_to_be32(*ptext);
+ for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
+ *ptext = cpu_to_be32(*ptext);
+ init_key = 0;
+ }
lpfc_read_nv(phba, pmb);
memset((char*)mb->un.varRDnvp.rsvd3, 0,
memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
sizeof (phba->RandomData));
- /* Get the default values for Model Name and Description */
- lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
-
/* Get adapter VPD information */
pmb->context2 = kmalloc(DMP_RSP_SIZE, GFP_KERNEL);
if (!pmb->context2)
"mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
phba->brd_no,
mb->mbxCommand, mb->mbxStatus);
- kfree(lpfc_vpd_data);
- lpfc_vpd_data = NULL;
- break;
+ mb->un.varDmp.word_cnt = 0;
}
-
+ if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
+ mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
lpfc_sli_pcimem_bcopy(pmb->context2, lpfc_vpd_data + offset,
mb->un.varDmp.word_cnt);
offset += mb->un.varDmp.word_cnt;
- } while (mb->un.varDmp.word_cnt);
- lpfc_parse_vpd(phba, lpfc_vpd_data);
+ } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
+ lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
kfree(lpfc_vpd_data);
out_free_context2:
kfree(mp);
pmb->context1 = NULL;
+ if (phba->cfg_soft_wwnn)
+ u64_to_wwn(phba->cfg_soft_wwnn, phba->fc_sparam.nodeName.u.wwn);
+ if (phba->cfg_soft_wwpn)
+ u64_to_wwn(phba->cfg_soft_wwpn, phba->fc_sparam.portName.u.wwn);
memcpy(&phba->fc_nodename, &phba->fc_sparam.nodeName,
sizeof (struct lpfc_name));
memcpy(&phba->fc_portname, &phba->fc_sparam.portName,
}
}
- /* This should turn on DELAYED ABTS for ELS timeouts */
- lpfc_set_slim(phba, pmb, 0x052198, 0x1);
- if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
- phba->hba_state = LPFC_HBA_ERROR;
- mempool_free( pmb, phba->mbox_mem_pool);
- return -EIO;
- }
-
-
lpfc_read_config(phba, pmb);
if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
lpfc_printf_log(phba,
mb->un.varRdConfig.max_xri + 1;
phba->lmt = mb->un.varRdConfig.lmt;
- /* HBA is not 4GB capable, or HBA is not 2GB capable,
- don't let link speed ask for it */
- if ((((phba->lmt & LMT_4250_10bit) != LMT_4250_10bit) &&
- (phba->cfg_link_speed > LINK_SPEED_2G)) ||
- (((phba->lmt & LMT_2125_10bit) != LMT_2125_10bit) &&
- (phba->cfg_link_speed > LINK_SPEED_1G))) {
- /* Reset link speed to auto. 1G/2GB HBA cfg'd for 4G */
+
+ /* Get the default values for Model Name and Description */
+ lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
+
+ if ((phba->cfg_link_speed > LINK_SPEED_10G)
+ || ((phba->cfg_link_speed == LINK_SPEED_1G)
+ && !(phba->lmt & LMT_1Gb))
+ || ((phba->cfg_link_speed == LINK_SPEED_2G)
+ && !(phba->lmt & LMT_2Gb))
+ || ((phba->cfg_link_speed == LINK_SPEED_4G)
+ && !(phba->lmt & LMT_4Gb))
+ || ((phba->cfg_link_speed == LINK_SPEED_8G)
+ && !(phba->lmt & LMT_8Gb))
+ || ((phba->cfg_link_speed == LINK_SPEED_10G)
+ && !(phba->lmt & LMT_10Gb))) {
+ /* Reset link speed to auto */
lpfc_printf_log(phba,
KERN_WARNING,
LOG_LINK_EVENT,
phba->hba_state = LPFC_LINK_DOWN;
/* Only process IOCBs on ring 0 till hba_state is READY */
- if (psli->ring[psli->ip_ring].cmdringaddr)
- psli->ring[psli->ip_ring].flag |= LPFC_STOP_IOCB_EVENT;
+ if (psli->ring[psli->extra_ring].cmdringaddr)
+ psli->ring[psli->extra_ring].flag |= LPFC_STOP_IOCB_EVENT;
if (psli->ring[psli->fcp_ring].cmdringaddr)
psli->ring[psli->fcp_ring].flag |= LPFC_STOP_IOCB_EVENT;
if (psli->ring[psli->next_ring].cmdringaddr)
lpfc_init_link(phba, pmb, phba->cfg_topology, phba->cfg_link_speed);
pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
- if (lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT) != MBX_SUCCESS) {
+ rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
+ if (rc != MBX_SUCCESS) {
lpfc_printf_log(phba,
KERN_ERR,
LOG_INIT,
readl(phba->HAregaddr); /* flush */
phba->hba_state = LPFC_HBA_ERROR;
- mempool_free(pmb, phba->mbox_mem_pool);
+ if (rc != MBX_BUSY)
+ mempool_free(pmb, phba->mbox_mem_pool);
return -EIO;
}
/* MBOX buffer will be freed in mbox compl */
- i = 0;
+ return (0);
+}
+
+static int
+lpfc_discovery_wait(struct lpfc_hba *phba)
+{
+ int i = 0;
+
while ((phba->hba_state != LPFC_HBA_READY) ||
(phba->num_disc_nodes) || (phba->fc_prli_sent) ||
((phba->fc_map_cnt == 0) && (i<2)) ||
- (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) {
+ (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE)) {
/* Check every second for 30 retries. */
i++;
if (i > 30) {
- break;
+ return -ETIMEDOUT;
}
if ((i >= 15) && (phba->hba_state <= LPFC_LINK_DOWN)) {
/* The link is down. Set linkdown timeout */
- break;
+ return -ETIMEDOUT;
}
/* Delay for 1 second to give discovery time to complete. */
}
- /* Since num_disc_nodes keys off of PLOGI, delay a bit to let
- * any potential PRLIs to flush thru the SLI sub-system.
- */
- msleep(50);
-
- return (0);
+ return 0;
}
/************************************************************************/
return (0);
}
+/************************************************************************/
+/* */
+/* lpfc_hba_down_post */
+/* This routine will do uninitialization after the HBA is reset */
+/* when bringing down the SLI Layer. */
+/* This routine returns 0 on success. Any other return value */
+/* indicates an error. */
+/* */
+/************************************************************************/
+int
+lpfc_hba_down_post(struct lpfc_hba * phba)
+{
+ struct lpfc_sli *psli = &phba->sli;
+ struct lpfc_sli_ring *pring;
+ struct lpfc_dmabuf *mp, *next_mp;
+ int i;
+
+ /* Cleanup preposted buffers on the ELS ring */
+ pring = &psli->ring[LPFC_ELS_RING];
+ list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
+ list_del(&mp->list);
+ pring->postbufq_cnt--;
+ lpfc_mbuf_free(phba, mp->virt, mp->phys);
+ kfree(mp);
+ }
+
+ for (i = 0; i < psli->num_rings; i++) {
+ pring = &psli->ring[i];
+ lpfc_sli_abort_iocb_ring(phba, pring);
+ }
+
+ return 0;
+}
+
/************************************************************************/
/* */
/* lpfc_handle_eratt */
{
struct lpfc_sli *psli = &phba->sli;
struct lpfc_sli_ring *pring;
+ uint32_t event_data;
- /*
- * If a reset is sent to the HBA restore PCI configuration registers.
- */
- if ( phba->hba_state == LPFC_INIT_START ) {
- mdelay(1);
- readl(phba->HCregaddr); /* flush */
- writel(0, phba->HCregaddr);
- readl(phba->HCregaddr); /* flush */
-
- /* Restore PCI cmd register */
- pci_write_config_word(phba->pcidev,
- PCI_COMMAND, phba->pci_cfg_value);
- }
-
- if (phba->work_hs & HS_FFER6) {
+ if (phba->work_hs & HS_FFER6 ||
+ phba->work_hs & HS_FFER5) {
/* Re-establishing Link */
lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
"%d:1301 Re-establishing Link "
phba->work_status[0], phba->work_status[1]);
spin_lock_irq(phba->host->host_lock);
phba->fc_flag |= FC_ESTABLISH_LINK;
+ psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
spin_unlock_irq(phba->host->host_lock);
/*
* attempt to restart it.
*/
lpfc_offline(phba);
+ lpfc_sli_brdrestart(phba);
if (lpfc_online(phba) == 0) { /* Initialize the HBA */
mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
return;
phba->brd_no, phba->work_hs,
phba->work_status[0], phba->work_status[1]);
- lpfc_offline(phba);
+ event_data = FC_REG_DUMP_EVENT;
+ fc_host_post_vendor_event(phba->host, fc_get_event_number(),
+ sizeof(event_data), (char *) &event_data,
+ SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
+ psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
+ lpfc_offline(phba);
+ phba->hba_state = LPFC_HBA_ERROR;
+ lpfc_hba_down_post(phba);
}
}
pmb->mbox_cmpl = lpfc_mbx_cmpl_read_la;
rc = lpfc_sli_issue_mbox (phba, pmb, (MBX_NOWAIT | MBX_STOP_IOCB));
if (rc == MBX_NOT_FINISHED)
- goto lpfc_handle_latt_free_mp;
+ goto lpfc_handle_latt_free_mbuf;
/* Clear Link Attention in HA REG */
spin_lock_irq(phba->host->host_lock);
return;
+lpfc_handle_latt_free_mbuf:
+ lpfc_mbuf_free(phba, mp->virt, mp->phys);
lpfc_handle_latt_free_mp:
kfree(mp);
lpfc_handle_latt_free_pmb:
/* */
/************************************************************************/
static int
-lpfc_parse_vpd(struct lpfc_hba * phba, uint8_t * vpd)
+lpfc_parse_vpd(struct lpfc_hba * phba, uint8_t * vpd, int len)
{
uint8_t lenlo, lenhi;
uint32_t Length;
phba->brd_no,
(uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
(uint32_t) vpd[3]);
- do {
+ while (!finished && (index < (len - 4))) {
switch (vpd[index]) {
case 0x82:
+ case 0x91:
index += 1;
lenlo = vpd[index];
index += 1;
lenhi = vpd[index];
index += 1;
Length = ((((unsigned short)lenhi) << 8) + lenlo);
-
+ if (Length > len - index)
+ Length = len - index;
while (Length > 0) {
/* Look for Serial Number */
if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
index ++;
break;
}
- } while (!finished && (index < 108));
+ }
return(1);
}
{
lpfc_vpd_t *vp;
uint16_t dev_id = phba->pcidev->device;
- uint16_t dev_subid = phba->pcidev->subsystem_device;
- uint8_t hdrtype = phba->pcidev->hdr_type;
- char *model_str = "";
+ int max_speed;
+ struct {
+ char * name;
+ int max_speed;
+ char * bus;
+ } m = {"<Unknown>", 0, ""};
+
+ if (mdp && mdp[0] != '\0'
+ && descp && descp[0] != '\0')
+ return;
+
+ if (phba->lmt & LMT_10Gb)
+ max_speed = 10;
+ else if (phba->lmt & LMT_8Gb)
+ max_speed = 8;
+ else if (phba->lmt & LMT_4Gb)
+ max_speed = 4;
+ else if (phba->lmt & LMT_2Gb)
+ max_speed = 2;
+ else
+ max_speed = 1;
vp = &phba->vpd;
switch (dev_id) {
case PCI_DEVICE_ID_FIREFLY:
- model_str = "LP6000 1Gb PCI";
+ m = (typeof(m)){"LP6000", max_speed, "PCI"};
break;
case PCI_DEVICE_ID_SUPERFLY:
if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
- model_str = "LP7000 1Gb PCI";
+ m = (typeof(m)){"LP7000", max_speed, "PCI"};
else
- model_str = "LP7000E 1Gb PCI";
+ m = (typeof(m)){"LP7000E", max_speed, "PCI"};
break;
case PCI_DEVICE_ID_DRAGONFLY:
- model_str = "LP8000 1Gb PCI";
+ m = (typeof(m)){"LP8000", max_speed, "PCI"};
break;
case PCI_DEVICE_ID_CENTAUR:
if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
- model_str = "LP9002 2Gb PCI";
+ m = (typeof(m)){"LP9002", max_speed, "PCI"};
else
- model_str = "LP9000 1Gb PCI";
+ m = (typeof(m)){"LP9000", max_speed, "PCI"};
break;
case PCI_DEVICE_ID_RFLY:
- model_str = "LP952 2Gb PCI";
+ m = (typeof(m)){"LP952", max_speed, "PCI"};
break;
case PCI_DEVICE_ID_PEGASUS:
- model_str = "LP9802 2Gb PCI-X";
+ m = (typeof(m)){"LP9802", max_speed, "PCI-X"};
break;
case PCI_DEVICE_ID_THOR:
- if (hdrtype == 0x80)
- model_str = "LP10000DC 2Gb 2-port PCI-X";
- else
- model_str = "LP10000 2Gb PCI-X";
+ m = (typeof(m)){"LP10000", max_speed, "PCI-X"};
break;
case PCI_DEVICE_ID_VIPER:
- model_str = "LPX1000 10Gb PCI-X";
+ m = (typeof(m)){"LPX1000", max_speed, "PCI-X"};
break;
case PCI_DEVICE_ID_PFLY:
- model_str = "LP982 2Gb PCI-X";
+ m = (typeof(m)){"LP982", max_speed, "PCI-X"};
break;
case PCI_DEVICE_ID_TFLY:
- if (hdrtype == 0x80)
- model_str = "LP1050DC 2Gb 2-port PCI-X";
- else
- model_str = "LP1050 2Gb PCI-X";
+ m = (typeof(m)){"LP1050", max_speed, "PCI-X"};
break;
case PCI_DEVICE_ID_HELIOS:
- if (hdrtype == 0x80)
- model_str = "LP11002 4Gb 2-port PCI-X2";
- else
- model_str = "LP11000 4Gb PCI-X2";
+ m = (typeof(m)){"LP11000", max_speed, "PCI-X2"};
break;
case PCI_DEVICE_ID_HELIOS_SCSP:
- model_str = "LP11000-SP 4Gb PCI-X2";
+ m = (typeof(m)){"LP11000-SP", max_speed, "PCI-X2"};
break;
case PCI_DEVICE_ID_HELIOS_DCSP:
- model_str = "LP11002-SP 4Gb 2-port PCI-X2";
+ m = (typeof(m)){"LP11002-SP", max_speed, "PCI-X2"};
break;
case PCI_DEVICE_ID_NEPTUNE:
- if (hdrtype == 0x80)
- model_str = "LPe1002 4Gb 2-port";
- else
- model_str = "LPe1000 4Gb PCIe";
+ m = (typeof(m)){"LPe1000", max_speed, "PCIe"};
break;
case PCI_DEVICE_ID_NEPTUNE_SCSP:
- model_str = "LPe1000-SP 4Gb PCIe";
+ m = (typeof(m)){"LPe1000-SP", max_speed, "PCIe"};
break;
case PCI_DEVICE_ID_NEPTUNE_DCSP:
- model_str = "LPe1002-SP 4Gb 2-port PCIe";
+ m = (typeof(m)){"LPe1002-SP", max_speed, "PCIe"};
break;
case PCI_DEVICE_ID_BMID:
- model_str = "LP1150 4Gb PCI-X2";
+ m = (typeof(m)){"LP1150", max_speed, "PCI-X2"};
break;
case PCI_DEVICE_ID_BSMB:
- model_str = "LP111 4Gb PCI-X2";
+ m = (typeof(m)){"LP111", max_speed, "PCI-X2"};
break;
case PCI_DEVICE_ID_ZEPHYR:
- if (hdrtype == 0x80)
- model_str = "LPe11002 4Gb 2-port PCIe";
- else
- model_str = "LPe11000 4Gb PCIe";
+ m = (typeof(m)){"LPe11000", max_speed, "PCIe"};
break;
case PCI_DEVICE_ID_ZEPHYR_SCSP:
- model_str = "LPe11000-SP 4Gb PCIe";
+ m = (typeof(m)){"LPe11000", max_speed, "PCIe"};
break;
case PCI_DEVICE_ID_ZEPHYR_DCSP:
- model_str = "LPe11002-SP 4Gb 2-port PCIe";
+ m = (typeof(m)){"LPe11002-SP", max_speed, "PCIe"};
break;
case PCI_DEVICE_ID_ZMID:
- model_str = "LPe1150 4Gb PCIe";
+ m = (typeof(m)){"LPe1150", max_speed, "PCIe"};
break;
case PCI_DEVICE_ID_ZSMB:
- model_str = "LPe111 4Gb PCIe";
+ m = (typeof(m)){"LPe111", max_speed, "PCIe"};
break;
case PCI_DEVICE_ID_LP101:
- model_str = "LP101 2Gb PCI-X";
+ m = (typeof(m)){"LP101", max_speed, "PCI-X"};
break;
case PCI_DEVICE_ID_LP10000S:
- model_str = "LP10000-S 2Gb PCI";
+ m = (typeof(m)){"LP10000-S", max_speed, "PCI"};
break;
case PCI_DEVICE_ID_LP11000S:
+ m = (typeof(m)){"LP11000-S", max_speed,
+ "PCI-X2"};
+ break;
case PCI_DEVICE_ID_LPE11000S:
- switch (dev_subid) {
- case PCI_SUBSYSTEM_ID_LP11000S:
- model_str = "LP11002-S 4Gb PCI-X2";
- break;
- case PCI_SUBSYSTEM_ID_LP11002S:
- model_str = "LP11000-S 4Gb 2-port PCI-X2";
- break;
- case PCI_SUBSYSTEM_ID_LPE11000S:
- model_str = "LPe11002-S 4Gb PCIe";
- break;
- case PCI_SUBSYSTEM_ID_LPE11002S:
- model_str = "LPe11002-S 4Gb 2-port PCIe";
- break;
- case PCI_SUBSYSTEM_ID_LPE11010S:
- model_str = "LPe11010-S 4Gb 10-port PCIe";
- break;
- default:
- break;
- }
+ m = (typeof(m)){"LPe11000-S", max_speed,
+ "PCIe"};
break;
default:
+ m = (typeof(m)){ NULL };
break;
}
- if (mdp)
- sscanf(model_str, "%s", mdp);
- if (descp)
- sprintf(descp, "Emulex %s Fibre Channel Adapter", model_str);
+
+ if (mdp && mdp[0] == '\0')
+ snprintf(mdp, 79,"%s", m.name);
+ if (descp && descp[0] == '\0')
+ snprintf(descp, 255,
+ "Emulex %s %dGb %s Fibre Channel Adapter",
+ m.name, m.max_speed, m.bus);
}
/**************************************************/
struct lpfc_sli_ring *pring;
struct lpfc_sli *psli;
unsigned long iflag;
- int i = 0;
+ int i;
+ int cnt = 0;
if (!phba)
return 0;
return 0;
psli = &phba->sli;
- pring = &psli->ring[psli->fcp_ring];
lpfc_linkdown(phba);
-
- /* The linkdown event takes 30 seconds to timeout. */
- while (pring->txcmplq_cnt) {
- mdelay(10);
- if (i++ > 3000)
- break;
+ lpfc_sli_flush_mbox_queue(phba);
+
+ for (i = 0; i < psli->num_rings; i++) {
+ pring = &psli->ring[i];
+ /* The linkdown event takes 30 seconds to timeout. */
+ while (pring->txcmplq_cnt) {
+ mdelay(10);
+ if (cnt++ > 3000) {
+ lpfc_printf_log(phba,
+ KERN_WARNING, LOG_INIT,
+ "%d:0466 Outstanding IO when "
+ "bringing Adapter offline\n",
+ phba->brd_no);
+ break;
+ }
+ }
}
+
/* stop all timers associated with this hba */
lpfc_stop_timer(phba);
phba->work_hba_events = 0;
+ phba->work_ha = 0;
lpfc_printf_log(phba,
KERN_WARNING,
goto out_put_host;
host->unique_id = phba->brd_no;
- init_MUTEX(&phba->hba_can_block);
INIT_LIST_HEAD(&phba->ctrspbuflist);
INIT_LIST_HEAD(&phba->rnidrspbuflist);
INIT_LIST_HEAD(&phba->freebufList);
phba->pci_bar2_map = pci_resource_start(phba->pcidev, 2);
bar2map_len = pci_resource_len(phba->pcidev, 2);
- /* Map HBA SLIM and Control Registers to a kernel virtual address. */
+ /* Map HBA SLIM to a kernel virtual address. */
phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
+ if (!phba->slim_memmap_p) {
+ error = -ENODEV;
+ dev_printk(KERN_ERR, &pdev->dev,
+ "ioremap failed for SLIM memory.\n");
+ goto out_idr_remove;
+ }
+
+ /* Map HBA Control Registers to a kernel virtual address. */
phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
+ if (!phba->ctrl_regs_memmap_p) {
+ error = -ENODEV;
+ dev_printk(KERN_ERR, &pdev->dev,
+ "ioremap failed for HBA control registers.\n");
+ goto out_iounmap_slim;
+ }
/* Allocate memory for SLI-2 structures */
phba->slim2p = dma_alloc_coherent(&phba->pcidev->dev, SLI2_SLIM_SIZE,
goto out_free_iocbq;
}
- /* We can rely on a queue depth attribute only after SLI HBA setup */
+ /*
+ * Set initial can_queue value since 0 is no longer supported and
+ * scsi_add_host will fail. This will be adjusted later based on the
+ * max xri value determined in hba setup.
+ */
host->can_queue = phba->cfg_hba_queue_depth - 10;
/* Tell the midlayer we support 16 byte commands */
INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list);
host->transportt = lpfc_transport_template;
- host->hostdata[0] = (unsigned long)phba;
pci_set_drvdata(pdev, host);
error = scsi_add_host(host, &pdev->dev);
if (error)
error = lpfc_alloc_sysfs_attr(phba);
if (error)
- goto out_kthread_stop;
+ goto out_remove_host;
+
+ if (phba->cfg_use_msi) {
+ error = pci_enable_msi(phba->pcidev);
+ if (error)
+ lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "%d:0452 "
+ "Enable MSI failed, continuing with "
+ "IRQ\n", phba->brd_no);
+ }
- error = request_irq(phba->pcidev->irq, lpfc_intr_handler, SA_SHIRQ,
+ error = request_irq(phba->pcidev->irq, lpfc_intr_handler, IRQF_SHARED,
LPFC_DRIVER_NAME, phba);
if (error) {
lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
error = lpfc_sli_hba_setup(phba);
- if (error)
+ if (error) {
+ error = -ENODEV;
goto out_free_irq;
+ }
+
+ /*
+ * hba setup may have changed the hba_queue_depth so we need to adjust
+ * the value of can_queue.
+ */
+ host->can_queue = phba->cfg_hba_queue_depth - 10;
+
+ lpfc_discovery_wait(phba);
if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
spin_lock_irq(phba->host->host_lock);
lpfc_get_hba_sym_node_name(phba, fc_host_symbolic_name(host));
fc_host_supported_speeds(host) = 0;
- switch (FC_JEDEC_ID(phba->vpd.rev.biuRev)) {
- case VIPER_JEDEC_ID:
+ if (phba->lmt & LMT_10Gb)
fc_host_supported_speeds(host) |= FC_PORTSPEED_10GBIT;
- break;
- case HELIOS_JEDEC_ID:
+ if (phba->lmt & LMT_4Gb)
fc_host_supported_speeds(host) |= FC_PORTSPEED_4GBIT;
- /* Fall through */
- case CENTAUR_2G_JEDEC_ID:
- case PEGASUS_JEDEC_ID:
- case THOR_JEDEC_ID:
+ if (phba->lmt & LMT_2Gb)
fc_host_supported_speeds(host) |= FC_PORTSPEED_2GBIT;
- /* Fall through */
- default:
- fc_host_supported_speeds(host) = FC_PORTSPEED_1GBIT;
- }
+ if (phba->lmt & LMT_1Gb)
+ fc_host_supported_speeds(host) |= FC_PORTSPEED_1GBIT;
fc_host_maxframe_size(host) =
((((uint32_t) phba->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
lpfc_stop_timer(phba);
phba->work_hba_events = 0;
free_irq(phba->pcidev->irq, phba);
+ pci_disable_msi(phba->pcidev);
out_free_sysfs_attr:
lpfc_free_sysfs_attr(phba);
+out_remove_host:
+ fc_remove_host(phba->host);
+ scsi_remove_host(phba->host);
out_kthread_stop:
kthread_stop(phba->worker_thread);
out_free_iocbq:
phba->slim2p_mapping);
out_iounmap:
iounmap(phba->ctrl_regs_memmap_p);
+out_iounmap_slim:
iounmap(phba->slim_memmap_p);
out_idr_remove:
idr_remove(&lpfc_hba_index, phba->brd_no);
out_put_host:
+ phba->host = NULL;
scsi_host_put(host);
out_release_regions:
pci_release_regions(pdev);
out_disable_device:
pci_disable_device(pdev);
out:
+ pci_set_drvdata(pdev, NULL);
return error;
}
lpfc_pci_remove_one(struct pci_dev *pdev)
{
struct Scsi_Host *host = pci_get_drvdata(pdev);
- struct lpfc_hba *phba = (struct lpfc_hba *)host->hostdata[0];
+ struct lpfc_hba *phba = (struct lpfc_hba *)host->hostdata;
unsigned long iflag;
lpfc_free_sysfs_attr(phba);
* the HBA.
*/
lpfc_sli_hba_down(phba);
+ lpfc_sli_brdrestart(phba);
/* Release the irq reservation */
free_irq(phba->pcidev->irq, phba);
+ pci_disable_msi(phba->pcidev);
lpfc_cleanup(phba, 0);
lpfc_stop_timer(phba);
git://git.onelab.eu / linux-2.6.git / blobdiff