* (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
* support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
* (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
- * (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu
+ * (C) Copyright 2004-2005 Alan Stern, stern@rowland.harvard.edu
*
* Intel documents this fairly well, and as far as I know there
* are no royalties or anything like that, but even so there are
* people who decided that they want to do the same thing in a
* completely different way.
*
- * WARNING! The USB documentation is downright evil. Most of it
- * is just crap, written by a committee. You're better off ignoring
- * most of it, the important stuff is:
- * - the low-level protocol (fairly simple but lots of small details)
- * - working around the horridness of the rest
*/
#include <linux/config.h>
-#ifdef CONFIG_USB_DEBUG
-#define DEBUG
-#else
-#undef DEBUG
-#endif
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include "../core/hcd.h"
#include "uhci-hcd.h"
+#include "pci-quirks.h"
/*
* Version Information
*/
-#define DRIVER_VERSION "v2.2"
+#define DRIVER_VERSION "v3.0"
#define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
Alan Stern"
/*
* debug = 0, no debugging messages
- * debug = 1, dump failed URB's except for stalls
- * debug = 2, dump all failed URB's (including stalls)
+ * debug = 1, dump failed URBs except for stalls
+ * debug = 2, dump all failed URBs (including stalls)
* show all queues in /debug/uhci/[pci_addr]
- * debug = 3, show all TD's in URB's when dumping
+ * debug = 3, show all TDs in URBs when dumping
*/
#ifdef DEBUG
+#define DEBUG_CONFIGURED 1
static int debug = 1;
-#else
-static int debug = 0;
-#endif
module_param(debug, int, S_IRUGO | S_IWUSR);
MODULE_PARM_DESC(debug, "Debug level");
+
+#else
+#define DEBUG_CONFIGURED 0
+#define debug 0
+#endif
+
static char *errbuf;
#define ERRBUF_LEN (32 * 1024)
static kmem_cache_t *uhci_up_cachep; /* urb_priv */
+static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state);
+static void wakeup_rh(struct uhci_hcd *uhci);
static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
-static void hc_state_transitions(struct uhci_hcd *uhci);
/* If a transfer is still active after this much time, turn off FSBR */
#define IDLE_TIMEOUT msecs_to_jiffies(50)
#define FSBR_DELAY msecs_to_jiffies(50)
/* When we timeout an idle transfer for FSBR, we'll switch it over to */
-/* depth first traversal. We'll do it in groups of this number of TD's */
+/* depth first traversal. We'll do it in groups of this number of TDs */
/* to make sure it doesn't hog all of the bandwidth */
#define DEPTH_INTERVAL 5
-#include "uhci-hub.c"
#include "uhci-debug.c"
#include "uhci-q.c"
+#include "uhci-hub.c"
-static int init_stall_timer(struct usb_hcd *hcd);
-
-static void stall_callback(unsigned long ptr)
+/*
+ * Finish up a host controller reset and update the recorded state.
+ */
+static void finish_reset(struct uhci_hcd *uhci)
{
- struct usb_hcd *hcd = (struct usb_hcd *)ptr;
- struct uhci_hcd *uhci = hcd_to_uhci(hcd);
- struct urb_priv *up;
- unsigned long flags;
-
- spin_lock_irqsave(&uhci->lock, flags);
- uhci_scan_schedule(uhci, NULL);
-
- list_for_each_entry(up, &uhci->urb_list, urb_list) {
- struct urb *u = up->urb;
-
- spin_lock(&u->lock);
+ int port;
- /* Check if the FSBR timed out */
- if (up->fsbr && !up->fsbr_timeout && time_after_eq(jiffies, up->fsbrtime + IDLE_TIMEOUT))
- uhci_fsbr_timeout(uhci, u);
-
- spin_unlock(&u->lock);
- }
-
- /* Really disable FSBR */
- if (!uhci->fsbr && uhci->fsbrtimeout && time_after_eq(jiffies, uhci->fsbrtimeout)) {
- uhci->fsbrtimeout = 0;
- uhci->skel_term_qh->link = UHCI_PTR_TERM;
- }
-
- /* Poll for and perform state transitions */
- hc_state_transitions(uhci);
- if (unlikely(uhci->suspended_ports && uhci->state != UHCI_SUSPENDED))
- uhci_check_ports(uhci);
+ /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
+ * bits in the port status and control registers.
+ * We have to clear them by hand.
+ */
+ for (port = 0; port < uhci->rh_numports; ++port)
+ outw(0, uhci->io_addr + USBPORTSC1 + (port * 2));
- init_stall_timer(hcd);
- spin_unlock_irqrestore(&uhci->lock, flags);
+ uhci->port_c_suspend = uhci->resuming_ports = 0;
+ uhci->rh_state = UHCI_RH_RESET;
+ uhci->is_stopped = UHCI_IS_STOPPED;
+ uhci_to_hcd(uhci)->state = HC_STATE_HALT;
+ uhci_to_hcd(uhci)->poll_rh = 0;
}
-static int init_stall_timer(struct usb_hcd *hcd)
+/*
+ * Last rites for a defunct/nonfunctional controller
+ * or one we don't want to use any more.
+ */
+static void hc_died(struct uhci_hcd *uhci)
{
- struct uhci_hcd *uhci = hcd_to_uhci(hcd);
-
- init_timer(&uhci->stall_timer);
- uhci->stall_timer.function = stall_callback;
- uhci->stall_timer.data = (unsigned long)hcd;
- uhci->stall_timer.expires = jiffies + msecs_to_jiffies(100);
- add_timer(&uhci->stall_timer);
-
- return 0;
+ uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
+ finish_reset(uhci);
+ uhci->hc_inaccessible = 1;
}
-static irqreturn_t uhci_irq(struct usb_hcd *hcd, struct pt_regs *regs)
+/*
+ * Initialize a controller that was newly discovered or has just been
+ * resumed. In either case we can't be sure of its previous state.
+ */
+static void check_and_reset_hc(struct uhci_hcd *uhci)
{
- struct uhci_hcd *uhci = hcd_to_uhci(hcd);
- unsigned long io_addr = uhci->io_addr;
- unsigned short status;
+ if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr))
+ finish_reset(uhci);
+}
- /*
- * Read the interrupt status, and write it back to clear the
- * interrupt cause. Contrary to the UHCI specification, the
- * "HC Halted" status bit is persistent: it is RO, not R/WC.
- */
- status = inw(io_addr + USBSTS);
- if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */
- return IRQ_NONE;
- outw(status, io_addr + USBSTS); /* Clear it */
+/*
+ * Store the basic register settings needed by the controller.
+ */
+static void configure_hc(struct uhci_hcd *uhci)
+{
+ /* Set the frame length to the default: 1 ms exactly */
+ outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF);
- if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
- if (status & USBSTS_HSE)
- dev_err(uhci_dev(uhci), "host system error, "
- "PCI problems?\n");
- if (status & USBSTS_HCPE)
- dev_err(uhci_dev(uhci), "host controller process "
- "error, something bad happened!\n");
- if ((status & USBSTS_HCH) && uhci->state > 0) {
- dev_err(uhci_dev(uhci), "host controller halted, "
- "very bad!\n");
- /* FIXME: Reset the controller, fix the offending TD */
- }
- }
+ /* Store the frame list base address */
+ outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD);
- if (status & USBSTS_RD)
- uhci->resume_detect = 1;
+ /* Set the current frame number */
+ outw(uhci->frame_number, uhci->io_addr + USBFRNUM);
- spin_lock(&uhci->lock);
- uhci_scan_schedule(uhci, regs);
- spin_unlock(&uhci->lock);
+ /* Mark controller as not halted before we enable interrupts */
+ uhci_to_hcd(uhci)->state = HC_STATE_SUSPENDED;
+ mb();
- return IRQ_HANDLED;
+ /* Enable PIRQ */
+ pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
+ USBLEGSUP_DEFAULT);
}
-static void reset_hc(struct uhci_hcd *uhci)
+
+static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
{
- unsigned long io_addr = uhci->io_addr;
+ int port;
- /* Turn off PIRQ, SMI, and all interrupts. This also turns off
- * the BIOS's USB Legacy Support.
- */
- pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
- outw(0, uhci->io_addr + USBINTR);
+ switch (to_pci_dev(uhci_dev(uhci))->vendor) {
+ default:
+ break;
- /* Global reset for 50ms */
- uhci->state = UHCI_RESET;
- outw(USBCMD_GRESET, io_addr + USBCMD);
- msleep(50);
- outw(0, io_addr + USBCMD);
+ case PCI_VENDOR_ID_GENESYS:
+ /* Genesys Logic's GL880S controllers don't generate
+ * resume-detect interrupts.
+ */
+ return 1;
- /* Another 10ms delay */
- msleep(10);
- uhci->resume_detect = 0;
- uhci->is_stopped = UHCI_IS_STOPPED;
+ case PCI_VENDOR_ID_INTEL:
+ /* Some of Intel's USB controllers have a bug that causes
+ * resume-detect interrupts if any port has an over-current
+ * condition. To make matters worse, some motherboards
+ * hardwire unused USB ports' over-current inputs active!
+ * To prevent problems, we will not enable resume-detect
+ * interrupts if any ports are OC.
+ */
+ for (port = 0; port < uhci->rh_numports; ++port) {
+ if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
+ USBPORTSC_OC)
+ return 1;
+ }
+ break;
+ }
+ return 0;
}
-static void suspend_hc(struct uhci_hcd *uhci)
+static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
+__releases(uhci->lock)
+__acquires(uhci->lock)
{
- unsigned long io_addr = uhci->io_addr;
-
- dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
- uhci->state = UHCI_SUSPENDED;
- uhci->resume_detect = 0;
- outw(USBCMD_EGSM, io_addr + USBCMD);
-
- /* FIXME: Wait for the controller to actually stop */
- uhci_get_current_frame_number(uhci);
- uhci->is_stopped = UHCI_IS_STOPPED;
+ int auto_stop;
+ int int_enable;
- uhci_scan_schedule(uhci, NULL);
-}
+ auto_stop = (new_state == UHCI_RH_AUTO_STOPPED);
+ dev_dbg(uhci_dev(uhci), "%s%s\n", __FUNCTION__,
+ (auto_stop ? " (auto-stop)" : ""));
-static void wakeup_hc(struct uhci_hcd *uhci)
-{
- unsigned long io_addr = uhci->io_addr;
+ /* If we get a suspend request when we're already auto-stopped
+ * then there's nothing to do.
+ */
+ if (uhci->rh_state == UHCI_RH_AUTO_STOPPED) {
+ uhci->rh_state = new_state;
+ return;
+ }
- switch (uhci->state) {
- case UHCI_SUSPENDED: /* Start the resume */
- dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
+ /* Enable resume-detect interrupts if they work.
+ * Then enter Global Suspend mode, still configured.
+ */
+ uhci->working_RD = 1;
+ int_enable = USBINTR_RESUME;
+ if (resume_detect_interrupts_are_broken(uhci)) {
+ uhci->working_RD = int_enable = 0;
+ }
+ outw(int_enable, uhci->io_addr + USBINTR);
+ outw(USBCMD_EGSM | USBCMD_CF, uhci->io_addr + USBCMD);
+ mb();
+ udelay(5);
- /* Global resume for >= 20ms */
- outw(USBCMD_FGR | USBCMD_EGSM, io_addr + USBCMD);
- uhci->state = UHCI_RESUMING_1;
- uhci->state_end = jiffies + msecs_to_jiffies(20);
- uhci->is_stopped = 0;
- break;
+ /* If we're auto-stopping then no devices have been attached
+ * for a while, so there shouldn't be any active URBs and the
+ * controller should stop after a few microseconds. Otherwise
+ * we will give the controller one frame to stop.
+ */
+ if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) {
+ uhci->rh_state = UHCI_RH_SUSPENDING;
+ spin_unlock_irq(&uhci->lock);
+ msleep(1);
+ spin_lock_irq(&uhci->lock);
+ if (uhci->hc_inaccessible) /* Died */
+ return;
+ }
+ if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH))
+ dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n");
- case UHCI_RESUMING_1: /* End global resume */
- uhci->state = UHCI_RESUMING_2;
- outw(0, io_addr + USBCMD);
- /* Falls through */
-
- case UHCI_RESUMING_2: /* Wait for EOP to be sent */
- if (inw(io_addr + USBCMD) & USBCMD_FGR)
- break;
-
- /* Run for at least 1 second, and
- * mark it configured with a 64-byte max packet */
- uhci->state = UHCI_RUNNING_GRACE;
- uhci->state_end = jiffies + HZ;
- outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP,
- io_addr + USBCMD);
- break;
+ uhci_get_current_frame_number(uhci);
+ smp_wmb();
- case UHCI_RUNNING_GRACE: /* Now allowed to suspend */
- uhci->state = UHCI_RUNNING;
- break;
+ uhci->rh_state = new_state;
+ uhci->is_stopped = UHCI_IS_STOPPED;
+ uhci_to_hcd(uhci)->poll_rh = !int_enable;
- default:
- break;
- }
+ uhci_scan_schedule(uhci, NULL);
}
-static int ports_active(struct uhci_hcd *uhci)
+static void start_rh(struct uhci_hcd *uhci)
{
- unsigned long io_addr = uhci->io_addr;
- int connection = 0;
- int i;
-
- for (i = 0; i < uhci->rh_numports; i++)
- connection |= (inw(io_addr + USBPORTSC1 + i * 2) & USBPORTSC_CCS);
+ uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
+ uhci->is_stopped = 0;
+ smp_wmb();
- return connection;
+ /* Mark it configured and running with a 64-byte max packet.
+ * All interrupts are enabled, even though RESUME won't do anything.
+ */
+ outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD);
+ outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
+ uhci->io_addr + USBINTR);
+ mb();
+ uhci->rh_state = UHCI_RH_RUNNING;
+ uhci_to_hcd(uhci)->poll_rh = 1;
}
-static int suspend_allowed(struct uhci_hcd *uhci)
+static void wakeup_rh(struct uhci_hcd *uhci)
+__releases(uhci->lock)
+__acquires(uhci->lock)
{
- unsigned long io_addr = uhci->io_addr;
- int i;
+ dev_dbg(uhci_dev(uhci), "%s%s\n", __FUNCTION__,
+ uhci->rh_state == UHCI_RH_AUTO_STOPPED ?
+ " (auto-start)" : "");
- if (to_pci_dev(uhci_dev(uhci))->vendor != PCI_VENDOR_ID_INTEL)
- return 1;
-
- /* Some of Intel's USB controllers have a bug that causes false
- * resume indications if any port has an over current condition.
- * To prevent problems, we will not allow a global suspend if
- * any ports are OC.
- *
- * Some motherboards using Intel's chipsets (but not using all
- * the USB ports) appear to hardwire the over current inputs active
- * to disable the USB ports.
+ /* If we are auto-stopped then no devices are attached so there's
+ * no need for wakeup signals. Otherwise we send Global Resume
+ * for 20 ms.
*/
-
- /* check for over current condition on any port */
- for (i = 0; i < uhci->rh_numports; i++) {
- if (inw(io_addr + USBPORTSC1 + i * 2) & USBPORTSC_OC)
- return 0;
+ if (uhci->rh_state == UHCI_RH_SUSPENDED) {
+ uhci->rh_state = UHCI_RH_RESUMING;
+ outw(USBCMD_FGR | USBCMD_EGSM | USBCMD_CF,
+ uhci->io_addr + USBCMD);
+ spin_unlock_irq(&uhci->lock);
+ msleep(20);
+ spin_lock_irq(&uhci->lock);
+ if (uhci->hc_inaccessible) /* Died */
+ return;
+
+ /* End Global Resume and wait for EOP to be sent */
+ outw(USBCMD_CF, uhci->io_addr + USBCMD);
+ mb();
+ udelay(4);
+ if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR)
+ dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
}
- return 1;
+ start_rh(uhci);
+
+ /* Restart root hub polling */
+ mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
}
-static void hc_state_transitions(struct uhci_hcd *uhci)
+static irqreturn_t uhci_irq(struct usb_hcd *hcd, struct pt_regs *regs)
{
- switch (uhci->state) {
- case UHCI_RUNNING:
-
- /* global suspend if nothing connected for 1 second */
- if (!ports_active(uhci) && suspend_allowed(uhci)) {
- uhci->state = UHCI_SUSPENDING_GRACE;
- uhci->state_end = jiffies + HZ;
- }
- break;
-
- case UHCI_SUSPENDING_GRACE:
- if (ports_active(uhci))
- uhci->state = UHCI_RUNNING;
- else if (time_after_eq(jiffies, uhci->state_end))
- suspend_hc(uhci);
- break;
-
- case UHCI_SUSPENDED:
+ struct uhci_hcd *uhci = hcd_to_uhci(hcd);
+ unsigned short status;
+ unsigned long flags;
- /* wakeup if requested by a device */
- if (uhci->resume_detect)
- wakeup_hc(uhci);
- break;
+ /*
+ * Read the interrupt status, and write it back to clear the
+ * interrupt cause. Contrary to the UHCI specification, the
+ * "HC Halted" status bit is persistent: it is RO, not R/WC.
+ */
+ status = inw(uhci->io_addr + USBSTS);
+ if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */
+ return IRQ_NONE;
+ outw(status, uhci->io_addr + USBSTS); /* Clear it */
- case UHCI_RESUMING_1:
- case UHCI_RESUMING_2:
- case UHCI_RUNNING_GRACE:
- if (time_after_eq(jiffies, uhci->state_end))
- wakeup_hc(uhci);
- break;
+ if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
+ if (status & USBSTS_HSE)
+ dev_err(uhci_dev(uhci), "host system error, "
+ "PCI problems?\n");
+ if (status & USBSTS_HCPE)
+ dev_err(uhci_dev(uhci), "host controller process "
+ "error, something bad happened!\n");
+ if (status & USBSTS_HCH) {
+ spin_lock_irqsave(&uhci->lock, flags);
+ if (uhci->rh_state >= UHCI_RH_RUNNING) {
+ dev_err(uhci_dev(uhci),
+ "host controller halted, "
+ "very bad!\n");
+ if (debug > 1 && errbuf) {
+ /* Print the schedule for debugging */
+ uhci_sprint_schedule(uhci,
+ errbuf, ERRBUF_LEN);
+ lprintk(errbuf);
+ }
+ hc_died(uhci);
+
+ /* Force a callback in case there are
+ * pending unlinks */
+ mod_timer(&hcd->rh_timer, jiffies);
+ }
+ spin_unlock_irqrestore(&uhci->lock, flags);
+ }
+ }
- default:
- break;
+ if (status & USBSTS_RD)
+ usb_hcd_poll_rh_status(hcd);
+ else {
+ spin_lock_irqsave(&uhci->lock, flags);
+ uhci_scan_schedule(uhci, regs);
+ spin_unlock_irqrestore(&uhci->lock, flags);
}
+
+ return IRQ_HANDLED;
}
/*
uhci->frame_number = inw(uhci->io_addr + USBFRNUM);
}
-static int start_hc(struct uhci_hcd *uhci)
-{
- unsigned long io_addr = uhci->io_addr;
- int timeout = 10;
-
- /*
- * Reset the HC - this will force us to get a
- * new notification of any already connected
- * ports due to the virtual disconnect that it
- * implies.
- */
- outw(USBCMD_HCRESET, io_addr + USBCMD);
- while (inw(io_addr + USBCMD) & USBCMD_HCRESET) {
- if (--timeout < 0) {
- dev_err(uhci_dev(uhci), "USBCMD_HCRESET timed out!\n");
- return -ETIMEDOUT;
- }
- msleep(1);
- }
-
- /* Mark controller as running before we enable interrupts */
- uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
-
- /* Turn on PIRQ and all interrupts */
- pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
- USBLEGSUP_DEFAULT);
- outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
- io_addr + USBINTR);
-
- /* Start at frame 0 */
- outw(0, io_addr + USBFRNUM);
- outl(uhci->fl->dma_handle, io_addr + USBFLBASEADD);
-
- /* Run and mark it configured with a 64-byte max packet */
- uhci->state = UHCI_RUNNING_GRACE;
- uhci->state_end = jiffies + HZ;
- outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, io_addr + USBCMD);
- uhci->is_stopped = 0;
-
- return 0;
-}
-
/*
* De-allocate all resources
*/
{
int i;
- for (i = 0; i < UHCI_NUM_SKELQH; i++)
- if (uhci->skelqh[i]) {
- uhci_free_qh(uhci, uhci->skelqh[i]);
- uhci->skelqh[i] = NULL;
- }
+ if (DEBUG_CONFIGURED) {
+ spin_lock_irq(&uhci->lock);
+ uhci->is_initialized = 0;
+ spin_unlock_irq(&uhci->lock);
- if (uhci->term_td) {
- uhci_free_td(uhci, uhci->term_td);
- uhci->term_td = NULL;
+ debugfs_remove(uhci->dentry);
}
- if (uhci->qh_pool) {
- dma_pool_destroy(uhci->qh_pool);
- uhci->qh_pool = NULL;
- }
+ for (i = 0; i < UHCI_NUM_SKELQH; i++)
+ uhci_free_qh(uhci, uhci->skelqh[i]);
- if (uhci->td_pool) {
- dma_pool_destroy(uhci->td_pool);
- uhci->td_pool = NULL;
- }
+ uhci_free_td(uhci, uhci->term_td);
- if (uhci->fl) {
- dma_free_coherent(uhci_dev(uhci), sizeof(*uhci->fl),
- uhci->fl, uhci->fl->dma_handle);
- uhci->fl = NULL;
- }
+ dma_pool_destroy(uhci->qh_pool);
- if (uhci->dentry) {
- debugfs_remove(uhci->dentry);
- uhci->dentry = NULL;
- }
+ dma_pool_destroy(uhci->td_pool);
+
+ kfree(uhci->frame_cpu);
+
+ dma_free_coherent(uhci_dev(uhci),
+ UHCI_NUMFRAMES * sizeof(*uhci->frame),
+ uhci->frame, uhci->frame_dma_handle);
}
static int uhci_reset(struct usb_hcd *hcd)
{
struct uhci_hcd *uhci = hcd_to_uhci(hcd);
+ unsigned io_size = (unsigned) hcd->rsrc_len;
+ int port;
uhci->io_addr = (unsigned long) hcd->rsrc_start;
- /* Kick BIOS off this hardware and reset, so we won't get
- * interrupts from any previous setup.
+ /* The UHCI spec says devices must have 2 ports, and goes on to say
+ * they may have more but gives no way to determine how many there
+ * are. However according to the UHCI spec, Bit 7 of the port
+ * status and control register is always set to 1. So we try to
+ * use this to our advantage. Another common failure mode when
+ * a nonexistent register is addressed is to return all ones, so
+ * we test for that also.
+ */
+ for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
+ unsigned int portstatus;
+
+ portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2));
+ if (!(portstatus & 0x0080) || portstatus == 0xffff)
+ break;
+ }
+ if (debug)
+ dev_info(uhci_dev(uhci), "detected %d ports\n", port);
+
+ /* Anything greater than 7 is weird so we'll ignore it. */
+ if (port > UHCI_RH_MAXCHILD) {
+ dev_info(uhci_dev(uhci), "port count misdetected? "
+ "forcing to 2 ports\n");
+ port = 2;
+ }
+ uhci->rh_numports = port;
+
+ /* Kick BIOS off this hardware and reset if the controller
+ * isn't already safely quiescent.
*/
- reset_hc(uhci);
+ check_and_reset_hc(uhci);
return 0;
}
+/* Make sure the controller is quiescent and that we're not using it
+ * any more. This is mainly for the benefit of programs which, like kexec,
+ * expect the hardware to be idle: not doing DMA or generating IRQs.
+ *
+ * This routine may be called in a damaged or failing kernel. Hence we
+ * do not acquire the spinlock before shutting down the controller.
+ */
+static void uhci_shutdown(struct pci_dev *pdev)
+{
+ struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev);
+
+ hc_died(hcd_to_uhci(hcd));
+}
+
/*
* Allocate a frame list, and then setup the skeleton
*
{
struct uhci_hcd *uhci = hcd_to_uhci(hcd);
int retval = -EBUSY;
- int i, port;
- unsigned io_size;
- dma_addr_t dma_handle;
- struct usb_device *udev;
+ int i;
struct dentry *dentry;
- io_size = (unsigned) hcd->rsrc_len;
-
- dentry = debugfs_create_file(hcd->self.bus_name, S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root, uhci, &uhci_debug_operations);
- if (!dentry) {
- dev_err(uhci_dev(uhci), "couldn't create uhci debugfs entry\n");
- retval = -ENOMEM;
- goto err_create_debug_entry;
- }
- uhci->dentry = dentry;
+ hcd->uses_new_polling = 1;
uhci->fsbr = 0;
uhci->fsbrtimeout = 0;
spin_lock_init(&uhci->lock);
- INIT_LIST_HEAD(&uhci->qh_remove_list);
INIT_LIST_HEAD(&uhci->td_remove_list);
-
- INIT_LIST_HEAD(&uhci->urb_remove_list);
-
- INIT_LIST_HEAD(&uhci->urb_list);
-
- INIT_LIST_HEAD(&uhci->complete_list);
+ INIT_LIST_HEAD(&uhci->idle_qh_list);
init_waitqueue_head(&uhci->waitqh);
- uhci->fl = dma_alloc_coherent(uhci_dev(uhci), sizeof(*uhci->fl),
- &dma_handle, 0);
- if (!uhci->fl) {
+ if (DEBUG_CONFIGURED) {
+ dentry = debugfs_create_file(hcd->self.bus_name,
+ S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root,
+ uhci, &uhci_debug_operations);
+ if (!dentry) {
+ dev_err(uhci_dev(uhci), "couldn't create uhci "
+ "debugfs entry\n");
+ retval = -ENOMEM;
+ goto err_create_debug_entry;
+ }
+ uhci->dentry = dentry;
+ }
+
+ uhci->frame = dma_alloc_coherent(uhci_dev(uhci),
+ UHCI_NUMFRAMES * sizeof(*uhci->frame),
+ &uhci->frame_dma_handle, 0);
+ if (!uhci->frame) {
dev_err(uhci_dev(uhci), "unable to allocate "
"consistent memory for frame list\n");
- goto err_alloc_fl;
+ goto err_alloc_frame;
}
+ memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame));
- memset((void *)uhci->fl, 0, sizeof(*uhci->fl));
-
- uhci->fl->dma_handle = dma_handle;
+ uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu),
+ GFP_KERNEL);
+ if (!uhci->frame_cpu) {
+ dev_err(uhci_dev(uhci), "unable to allocate "
+ "memory for frame pointers\n");
+ goto err_alloc_frame_cpu;
+ }
uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),
sizeof(struct uhci_td), 16, 0);
goto err_create_qh_pool;
}
- /* Initialize the root hub */
-
- /* UHCI specs says devices must have 2 ports, but goes on to say */
- /* they may have more but give no way to determine how many they */
- /* have. However, according to the UHCI spec, Bit 7 is always set */
- /* to 1. So we try to use this to our advantage */
- for (port = 0; port < (io_size - 0x10) / 2; port++) {
- unsigned int portstatus;
-
- portstatus = inw(uhci->io_addr + 0x10 + (port * 2));
- if (!(portstatus & 0x0080))
- break;
- }
- if (debug)
- dev_info(uhci_dev(uhci), "detected %d ports\n", port);
-
- /* This is experimental so anything less than 2 or greater than 8 is */
- /* something weird and we'll ignore it */
- if (port < 2 || port > UHCI_RH_MAXCHILD) {
- dev_info(uhci_dev(uhci), "port count misdetected? "
- "forcing to 2 ports\n");
- port = 2;
- }
-
- uhci->rh_numports = port;
-
- udev = usb_alloc_dev(NULL, &hcd->self, 0);
- if (!udev) {
- dev_err(uhci_dev(uhci), "unable to allocate root hub\n");
- goto err_alloc_root_hub;
- }
-
- uhci->term_td = uhci_alloc_td(uhci, udev);
+ uhci->term_td = uhci_alloc_td(uhci);
if (!uhci->term_td) {
dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
goto err_alloc_term_td;
}
for (i = 0; i < UHCI_NUM_SKELQH; i++) {
- uhci->skelqh[i] = uhci_alloc_qh(uhci, udev);
+ uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL);
if (!uhci->skelqh[i]) {
dev_err(uhci_dev(uhci), "unable to allocate QH\n");
goto err_alloc_skelqh;
uhci->skel_int16_qh->link =
uhci->skel_int8_qh->link =
uhci->skel_int4_qh->link =
- uhci->skel_int2_qh->link =
- cpu_to_le32(uhci->skel_int1_qh->dma_handle) | UHCI_PTR_QH;
- uhci->skel_int1_qh->link = cpu_to_le32(uhci->skel_ls_control_qh->dma_handle) | UHCI_PTR_QH;
-
- uhci->skel_ls_control_qh->link = cpu_to_le32(uhci->skel_fs_control_qh->dma_handle) | UHCI_PTR_QH;
- uhci->skel_fs_control_qh->link = cpu_to_le32(uhci->skel_bulk_qh->dma_handle) | UHCI_PTR_QH;
- uhci->skel_bulk_qh->link = cpu_to_le32(uhci->skel_term_qh->dma_handle) | UHCI_PTR_QH;
+ uhci->skel_int2_qh->link = UHCI_PTR_QH |
+ cpu_to_le32(uhci->skel_int1_qh->dma_handle);
+
+ uhci->skel_int1_qh->link = UHCI_PTR_QH |
+ cpu_to_le32(uhci->skel_ls_control_qh->dma_handle);
+ uhci->skel_ls_control_qh->link = UHCI_PTR_QH |
+ cpu_to_le32(uhci->skel_fs_control_qh->dma_handle);
+ uhci->skel_fs_control_qh->link = UHCI_PTR_QH |
+ cpu_to_le32(uhci->skel_bulk_qh->dma_handle);
+ uhci->skel_bulk_qh->link = UHCI_PTR_QH |
+ cpu_to_le32(uhci->skel_term_qh->dma_handle);
/* This dummy TD is to work around a bug in Intel PIIX controllers */
- uhci_fill_td(uhci->term_td, 0, (UHCI_NULL_DATA_SIZE << 21) |
+ uhci_fill_td(uhci->term_td, 0, uhci_explen(0) |
(0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
uhci->term_td->link = cpu_to_le32(uhci->term_td->dma_handle);
/*
* ffs (Find First bit Set) does exactly what we need:
- * 1,3,5,... => ffs = 0 => use skel_int2_qh = skelqh[6],
- * 2,6,10,... => ffs = 1 => use skel_int4_qh = skelqh[5], etc.
- * ffs > 6 => not on any high-period queue, so use
- * skel_int1_qh = skelqh[7].
+ * 1,3,5,... => ffs = 0 => use skel_int2_qh = skelqh[8],
+ * 2,6,10,... => ffs = 1 => use skel_int4_qh = skelqh[7], etc.
+ * ffs >= 7 => not on any high-period queue, so use
+ * skel_int1_qh = skelqh[9].
* Add UHCI_NUMFRAMES to insure at least one bit is set.
*/
- irq = 6 - (int) __ffs(i + UHCI_NUMFRAMES);
- if (irq < 0)
- irq = 7;
+ irq = 8 - (int) __ffs(i + UHCI_NUMFRAMES);
+ if (irq <= 1)
+ irq = 9;
/* Only place we don't use the frame list routines */
- uhci->fl->frame[i] = UHCI_PTR_QH |
+ uhci->frame[i] = UHCI_PTR_QH |
cpu_to_le32(uhci->skelqh[irq]->dma_handle);
}
/*
* Some architectures require a full mb() to enforce completion of
- * the memory writes above before the I/O transfers in start_hc().
+ * the memory writes above before the I/O transfers in configure_hc().
*/
mb();
- if ((retval = start_hc(uhci)) != 0)
- goto err_alloc_skelqh;
-
- init_stall_timer(hcd);
-
- udev->speed = USB_SPEED_FULL;
-
- if (usb_hcd_register_root_hub(udev, hcd) != 0) {
- dev_err(uhci_dev(uhci), "unable to start root hub\n");
- retval = -ENOMEM;
- goto err_start_root_hub;
- }
+ configure_hc(uhci);
+ uhci->is_initialized = 1;
+ start_rh(uhci);
return 0;
/*
* error exits:
*/
-err_start_root_hub:
- reset_hc(uhci);
-
- del_timer_sync(&uhci->stall_timer);
-
err_alloc_skelqh:
- for (i = 0; i < UHCI_NUM_SKELQH; i++)
- if (uhci->skelqh[i]) {
+ for (i = 0; i < UHCI_NUM_SKELQH; i++) {
+ if (uhci->skelqh[i])
uhci_free_qh(uhci, uhci->skelqh[i]);
- uhci->skelqh[i] = NULL;
- }
+ }
uhci_free_td(uhci, uhci->term_td);
- uhci->term_td = NULL;
err_alloc_term_td:
- usb_put_dev(udev);
-
-err_alloc_root_hub:
dma_pool_destroy(uhci->qh_pool);
- uhci->qh_pool = NULL;
err_create_qh_pool:
dma_pool_destroy(uhci->td_pool);
- uhci->td_pool = NULL;
err_create_td_pool:
- dma_free_coherent(uhci_dev(uhci), sizeof(*uhci->fl),
- uhci->fl, uhci->fl->dma_handle);
- uhci->fl = NULL;
+ kfree(uhci->frame_cpu);
-err_alloc_fl:
+err_alloc_frame_cpu:
+ dma_free_coherent(uhci_dev(uhci),
+ UHCI_NUMFRAMES * sizeof(*uhci->frame),
+ uhci->frame, uhci->frame_dma_handle);
+
+err_alloc_frame:
debugfs_remove(uhci->dentry);
- uhci->dentry = NULL;
err_create_debug_entry:
return retval;
{
struct uhci_hcd *uhci = hcd_to_uhci(hcd);
- del_timer_sync(&uhci->stall_timer);
- reset_hc(uhci);
-
spin_lock_irq(&uhci->lock);
+ if (!uhci->hc_inaccessible)
+ hc_died(uhci);
uhci_scan_schedule(uhci, NULL);
spin_unlock_irq(&uhci->lock);
-
+
release_uhci(uhci);
}
#ifdef CONFIG_PM
+static int uhci_rh_suspend(struct usb_hcd *hcd)
+{
+ struct uhci_hcd *uhci = hcd_to_uhci(hcd);
+
+ spin_lock_irq(&uhci->lock);
+ if (!uhci->hc_inaccessible) /* Not dead */
+ suspend_rh(uhci, UHCI_RH_SUSPENDED);
+ spin_unlock_irq(&uhci->lock);
+ return 0;
+}
+
+static int uhci_rh_resume(struct usb_hcd *hcd)
+{
+ struct uhci_hcd *uhci = hcd_to_uhci(hcd);
+ int rc = 0;
+
+ spin_lock_irq(&uhci->lock);
+ if (uhci->hc_inaccessible) {
+ if (uhci->rh_state == UHCI_RH_SUSPENDED) {
+ dev_warn(uhci_dev(uhci), "HC isn't running!\n");
+ rc = -ENODEV;
+ }
+ /* Otherwise the HC is dead */
+ } else
+ wakeup_rh(uhci);
+ spin_unlock_irq(&uhci->lock);
+ return rc;
+}
+
static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message)
{
struct uhci_hcd *uhci = hcd_to_uhci(hcd);
+ int rc = 0;
+
+ dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
spin_lock_irq(&uhci->lock);
+ if (uhci->hc_inaccessible) /* Dead or already suspended */
+ goto done;
- /* Don't try to suspend broken motherboards, reset instead */
- if (suspend_allowed(uhci))
- suspend_hc(uhci);
- else {
- spin_unlock_irq(&uhci->lock);
- reset_hc(uhci);
- spin_lock_irq(&uhci->lock);
- uhci_scan_schedule(uhci, NULL);
- }
+ if (uhci->rh_state > UHCI_RH_SUSPENDED) {
+ dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
+ rc = -EBUSY;
+ goto done;
+ };
+ /* All PCI host controllers are required to disable IRQ generation
+ * at the source, so we must turn off PIRQ.
+ */
+ pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
+ mb();
+ clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
+ uhci->hc_inaccessible = 1;
+ hcd->poll_rh = 0;
+
+ /* FIXME: Enable non-PME# remote wakeup? */
+
+done:
spin_unlock_irq(&uhci->lock);
- return 0;
+ return rc;
}
static int uhci_resume(struct usb_hcd *hcd)
{
struct uhci_hcd *uhci = hcd_to_uhci(hcd);
- int rc;
- pci_set_master(to_pci_dev(uhci_dev(uhci)));
+ dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
+ /* Since we aren't in D3 any more, it's safe to set this flag
+ * even if the controller was dead. It might not even be dead
+ * any more, if the firmware or quirks code has reset it.
+ */
+ set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
+ mb();
+
+ if (uhci->rh_state == UHCI_RH_RESET) /* Dead */
+ return 0;
spin_lock_irq(&uhci->lock);
- if (uhci->state == UHCI_SUSPENDED) {
+ /* FIXME: Disable non-PME# remote wakeup? */
- /*
- * Some systems don't maintain the UHCI register values
- * during a PM suspend/resume cycle, so reinitialize
- * the Frame Number, Framelist Base Address, Interrupt
- * Enable, and Legacy Support registers.
- */
- pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
- 0);
- outw(uhci->frame_number, uhci->io_addr + USBFRNUM);
- outl(uhci->fl->dma_handle, uhci->io_addr + USBFLBASEADD);
- outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC |
- USBINTR_SP, uhci->io_addr + USBINTR);
- uhci->resume_detect = 1;
- pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
- USBLEGSUP_DEFAULT);
- } else {
- spin_unlock_irq(&uhci->lock);
- reset_hc(uhci);
- if ((rc = start_hc(uhci)) != 0)
- return rc;
- spin_lock_irq(&uhci->lock);
+ uhci->hc_inaccessible = 0;
+
+ /* The BIOS may have changed the controller settings during a
+ * system wakeup. Check it and reconfigure to avoid problems.
+ */
+ check_and_reset_hc(uhci);
+ configure_hc(uhci);
+
+ if (uhci->rh_state == UHCI_RH_RESET) {
+
+ /* The controller had to be reset */
+ usb_root_hub_lost_power(hcd->self.root_hub);
+ suspend_rh(uhci, UHCI_RH_SUSPENDED);
}
- hcd->state = HC_STATE_RUNNING;
spin_unlock_irq(&uhci->lock);
+
+ if (!uhci->working_RD) {
+ /* Suspended root hub needs to be polled */
+ hcd->poll_rh = 1;
+ usb_hcd_poll_rh_status(hcd);
+ }
return 0;
}
#endif
-/* Wait until all the URBs for a particular device/endpoint are gone */
+/* Wait until a particular device/endpoint's QH is idle, and free it */
static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd,
- struct usb_host_endpoint *ep)
+ struct usb_host_endpoint *hep)
{
struct uhci_hcd *uhci = hcd_to_uhci(hcd);
+ struct uhci_qh *qh;
+
+ spin_lock_irq(&uhci->lock);
+ qh = (struct uhci_qh *) hep->hcpriv;
+ if (qh == NULL)
+ goto done;
+
+ while (qh->state != QH_STATE_IDLE) {
+ ++uhci->num_waiting;
+ spin_unlock_irq(&uhci->lock);
+ wait_event_interruptible(uhci->waitqh,
+ qh->state == QH_STATE_IDLE);
+ spin_lock_irq(&uhci->lock);
+ --uhci->num_waiting;
+ }
- wait_event_interruptible(uhci->waitqh, list_empty(&ep->urb_list));
+ uhci_free_qh(uhci, qh);
+done:
+ spin_unlock_irq(&uhci->lock);
}
static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
{
struct uhci_hcd *uhci = hcd_to_uhci(hcd);
- int frame_number;
unsigned long flags;
+ int is_stopped;
+ int frame_number;
/* Minimize latency by avoiding the spinlock */
local_irq_save(flags);
- rmb();
- frame_number = (uhci->is_stopped ? uhci->frame_number :
+ is_stopped = uhci->is_stopped;
+ smp_rmb();
+ frame_number = (is_stopped ? uhci->frame_number :
inw(uhci->io_addr + USBFRNUM));
local_irq_restore(flags);
return frame_number;
#ifdef CONFIG_PM
.suspend = uhci_suspend,
.resume = uhci_resume,
+ .bus_suspend = uhci_rh_suspend,
+ .bus_resume = uhci_rh_resume,
#endif
.stop = uhci_stop,
static const struct pci_device_id uhci_pci_ids[] = { {
/* handle any USB UHCI controller */
- PCI_DEVICE_CLASS(((PCI_CLASS_SERIAL_USB << 8) | 0x00), ~0),
+ PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
.driver_data = (unsigned long) &uhci_driver,
}, { /* end: all zeroes */ }
};
.probe = usb_hcd_pci_probe,
.remove = usb_hcd_pci_remove,
+ .shutdown = uhci_shutdown,
#ifdef CONFIG_PM
.suspend = usb_hcd_pci_suspend,
if (usb_disabled())
return -ENODEV;
- if (debug) {
+ if (DEBUG_CONFIGURED) {
errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL);
if (!errbuf)
goto errbuf_failed;
+ uhci_debugfs_root = debugfs_create_dir("uhci", NULL);
+ if (!uhci_debugfs_root)
+ goto debug_failed;
}
- uhci_debugfs_root = debugfs_create_dir("uhci", NULL);
- if (!uhci_debugfs_root)
- goto debug_failed;
-
uhci_up_cachep = kmem_cache_create("uhci_urb_priv",
sizeof(struct urb_priv), 0, 0, NULL, NULL);
if (!uhci_up_cachep)
init_failed:
if (kmem_cache_destroy(uhci_up_cachep))
- warn("not all urb_priv's were freed!");
+ warn("not all urb_privs were freed!");
up_failed:
debugfs_remove(uhci_debugfs_root);
pci_unregister_driver(&uhci_pci_driver);
if (kmem_cache_destroy(uhci_up_cachep))
- warn("not all urb_priv's were freed!");
+ warn("not all urb_privs were freed!");
debugfs_remove(uhci_debugfs_root);
kfree(errbuf);
git://git.onelab.eu / linux-2.6.git / blobdiff