for(i=0;i<X;i++) count++; \
}
-u32 InitSDRAMRegisters(volatile STG4000REG * pSTGReg, u32 dwSubSysID,
+u32 InitSDRAMRegisters(volatile STG4000REG __iomem *pSTGReg, u32 dwSubSysID,
u32 dwRevID)
{
u32 adwSDRAMArgCfg0[] = { 0xa0, 0x80, 0xa0, 0xa0, 0xa0 };
return (ulBestClk);
}
-int SetCoreClockPLL(volatile STG4000REG * pSTGReg, struct pci_dev *pDev)
+int SetCoreClockPLL(volatile STG4000REG __iomem *pSTGReg, struct pci_dev *pDev)
{
u32 F, R, P;
u16 core_pll = 0, sub;