VServer 1.9.2 (patch-2.6.8.1-vs1.9.2.diff)

[linux-2.6.git] / drivers / video / riva / riva_hw.c

diff --git a/drivers/video/riva/riva_hw.c b/drivers/video/riva/riva_hw.c
index 03365f5..ac79134 100644 (file)
--- a/drivers/video/riva/riva_hw.c
+++ b/drivers/video/riva/riva_hw.c
@@ -46,6 +46,7 @@
 
 /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.c,v 1.33 2002/08/05 20:47:06 mvojkovi Exp $ */
 
+#include <linux/kernel.h>
 #include <linux/pci.h>
 #include <linux/pci_ids.h>
 #include "riva_hw.h"
@@ -147,7 +148,7 @@ static int ShowHideCursor
 #define GFIFO_SIZE_128 256
 #define MFIFO_SIZE     120
 #define VFIFO_SIZE     256
-#define        ABS(a)  (a>0?a:-a)
+
 typedef struct {
   int gdrain_rate;
   int vdrain_rate;
@@ -376,44 +377,44 @@ static int nv3_iterate(nv3_fifo_info *res_info, nv3_sim_state * state, nv3_arb_i
         }
         ns = 1000000*ainfo->gburst_size/(state->memory_width/8)/state->mclk_khz;
         tmp = ns * ainfo->gdrain_rate/1000000;
-        if (ABS(ainfo->gburst_size) + ((ABS(ainfo->wcglwm) + 16 ) & ~0x7) - tmp > max_gfsize)
+        if (abs(ainfo->gburst_size) + ((abs(ainfo->wcglwm) + 16 ) & ~0x7) - tmp > max_gfsize)
         {
             ainfo->converged = 0;
             return (1);
         }
         ns = 1000000*ainfo->vburst_size/(state->memory_width/8)/state->mclk_khz;
         tmp = ns * ainfo->vdrain_rate/1000000;
-        if (ABS(ainfo->vburst_size) + (ABS(ainfo->wcvlwm + 32) & ~0xf)  - tmp> VFIFO_SIZE)
+        if (abs(ainfo->vburst_size) + (abs(ainfo->wcvlwm + 32) & ~0xf)  - tmp> VFIFO_SIZE)
         {
             ainfo->converged = 0;
             return (1);
         }
-        if (ABS(ainfo->gocc) > max_gfsize)
+        if (abs(ainfo->gocc) > max_gfsize)
         {
             ainfo->converged = 0;
             return (1);
         }
-        if (ABS(ainfo->vocc) > VFIFO_SIZE)
+        if (abs(ainfo->vocc) > VFIFO_SIZE)
         {
             ainfo->converged = 0;
             return (1);
         }
-        if (ABS(ainfo->mocc) > MFIFO_SIZE)
+        if (abs(ainfo->mocc) > MFIFO_SIZE)
         {
             ainfo->converged = 0;
             return (1);
         }
-        if (ABS(vfsize) > VFIFO_SIZE)
+        if (abs(vfsize) > VFIFO_SIZE)
         {
             ainfo->converged = 0;
             return (1);
         }
-        if (ABS(gfsize) > max_gfsize)
+        if (abs(gfsize) > max_gfsize)
         {
             ainfo->converged = 0;
             return (1);
         }
-        if (ABS(mfsize) > MFIFO_SIZE)
+        if (abs(mfsize) > MFIFO_SIZE)
         {
             ainfo->converged = 0;
             return (1);
@@ -493,8 +494,8 @@ static char nv3_arb(nv3_fifo_info * res_info, nv3_sim_state * state,  nv3_arb_in
     }
     if (ainfo->converged)
     {
-        res_info->graphics_lwm = (int)ABS(ainfo->wcglwm) + 16;
-        res_info->video_lwm = (int)ABS(ainfo->wcvlwm) + 32;
+        res_info->graphics_lwm = (int)abs(ainfo->wcglwm) + 16;
+        res_info->video_lwm = (int)abs(ainfo->wcvlwm) + 32;
         res_info->graphics_burst_size = ainfo->gburst_size;
         res_info->video_burst_size = ainfo->vburst_size;
         res_info->graphics_hi_priority = (ainfo->priority == GRAPHICS);
@@ -1343,7 +1344,7 @@ static void UpdateFifoState
     {
         case NV_ARCH_04:
             LOAD_FIXED_STATE(nv4,FIFO);
-            chip->Tri03 = 0L;
+            chip->Tri03 = NULL;
             chip->Tri05 = (RivaTexturedTriangle05 *)&(chip->FIFO[0x0000E000/4]);
             break;
         case NV_ARCH_10:
@@ -1353,7 +1354,7 @@ static void UpdateFifoState
              */
             LOAD_FIXED_STATE(nv10tri05,PGRAPH);
             LOAD_FIXED_STATE(nv10,FIFO);
-            chip->Tri03 = 0L;
+            chip->Tri03 = NULL;
             chip->Tri05 = (RivaTexturedTriangle05 *)&(chip->FIFO[0x0000E000/4]);
             break;
     }
@@ -1393,13 +1394,13 @@ static void LoadStateExt
                 case 32:
                     LOAD_FIXED_STATE_32BPP(nv3,PRAMIN);
                     LOAD_FIXED_STATE_32BPP(nv3,PGRAPH);
-                    chip->Tri03 = 0L;
+                    chip->Tri03 = NULL;
                     break;
                 case 8:
                 default:
                     LOAD_FIXED_STATE_8BPP(nv3,PRAMIN);
                     LOAD_FIXED_STATE_8BPP(nv3,PGRAPH);
-                    chip->Tri03 = 0L;
+                    chip->Tri03 = NULL;
                     break;
             }
             for (i = 0x00000; i < 0x00800; i++)
@@ -1437,13 +1438,13 @@ static void LoadStateExt
                 case 32:
                     LOAD_FIXED_STATE_32BPP(nv4,PRAMIN);
                     LOAD_FIXED_STATE_32BPP(nv4,PGRAPH);
-                    chip->Tri03 = 0L;
+                    chip->Tri03 = NULL;
                     break;
                 case 8:
                 default:
                     LOAD_FIXED_STATE_8BPP(nv4,PRAMIN);
                     LOAD_FIXED_STATE_8BPP(nv4,PGRAPH);
-                    chip->Tri03 = 0L;
+                    chip->Tri03 = NULL;
                     break;
             }
             chip->PGRAPH[0x00000640/4] = state->offset0;
@@ -1482,13 +1483,13 @@ static void LoadStateExt
                 case 32:
                     LOAD_FIXED_STATE_32BPP(nv10,PRAMIN);
                     LOAD_FIXED_STATE_32BPP(nv10,PGRAPH);
-                    chip->Tri03 = 0L;
+                    chip->Tri03 = NULL;
                     break;
                 case 8:
                 default:
                     LOAD_FIXED_STATE_8BPP(nv10,PRAMIN);
                     LOAD_FIXED_STATE_8BPP(nv10,PGRAPH);
-                    chip->Tri03 = 0L;
+                    chip->Tri03 = NULL;
                     break;
             }