vserver 2.0 rc7

[linux-2.6.git] / include / asm-arm / arch-ixp2000 / platform.h

diff --git a/include/asm-arm/arch-ixp2000/platform.h b/include/asm-arm/arch-ixp2000/platform.h
index 16e4a24..901bba6 100644 (file)
--- a/include/asm-arm/arch-ixp2000/platform.h
+++ b/include/asm-arm/arch-ixp2000/platform.h
@@ -1,5 +1,5 @@
 /*
- * include/asm-arh/arch-ixp2000/platform.h
+ * include/asm-arm/arch-ixp2000/platform.h
  *
  * Various bits of code used by platform-level code.
  *
@@ -20,7 +20,7 @@
  * to on-chip I/O register to not complete fully. What this means is
  * that if you have a write to on-chip I/O followed by a back-to-back
  * read or write, the first write will happen twice. OR...if it's
- * not a back-to-back trasaction, the read or write will generate 
+ * not a back-to-back transaction, the read or write will generate
  * incorrect data.
  *
  * The official work around for this is to set the on-chip I/O regions
@@ -50,7 +50,7 @@ static inline void ixp2000_reg_write(volatile unsigned long *reg, unsigned long
  * Boards may multiplex different devices on the 2nd channel of 
  * the slowport interface that each need different configuration 
  * settings.  For example, the IXDP2400 uses channel 2 on the interface 
- * to access the CPLD, the switch fabric card, and te media card.  Each 
+ * to access the CPLD, the switch fabric card, and the media card.  Each
  * one needs a different mode so drivers must save/restore the mode 
  * before and after each operation.  
  *
@@ -121,6 +121,7 @@ unsigned long ixp2000_gettimeoffset(void);
 
 struct pci_sys_data;
 
+u32 *ixp2000_pci_config_addr(unsigned int bus, unsigned int devfn, int where);
 void ixp2000_pci_preinit(void);
 int ixp2000_pci_setup(int, struct pci_sys_data*);
 struct pci_bus* ixp2000_pci_scan_bus(int, struct pci_sys_data*);