linux 2.6.16.38 w/ vs2.0.3-rc1

[linux-2.6.git] / include / asm-arm / arch-s3c2410 / uncompress.h

diff --git a/include/asm-arm/arch-s3c2410/uncompress.h b/include/asm-arm/arch-s3c2410/uncompress.h
index 81b3e91..4367ec0 100644 (file)
--- a/include/asm-arm/arch-s3c2410/uncompress.h
+++ b/include/asm-arm/arch-s3c2410/uncompress.h
@@ -8,11 +8,21 @@
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
+ *
+ * Changelog:
+ *  22-May-2003 BJD  Created
+ *  08-Sep-2003 BJD  Moved to linux v2.6
+ *  12-Mar-2004 BJD  Updated header protection
+ *  12-Oct-2004 BJD  Take account of debug uart configuration
+ *  15-Nov-2004 BJD  Fixed uart configuration
+ *  22-Feb-2005 BJD  Added watchdog to uncompress
+ *  04-Apr-2005 LCVR Added support to S3C2400 (no cpuid at GSTATUS1)
 */
 
 #ifndef __ASM_ARCH_UNCOMPRESS_H
 #define __ASM_ARCH_UNCOMPRESS_H
 
+#include <linux/config.h>
 
 /* defines for UART registers */
 #include "asm/arch/regs-serial.h"
@@ -57,7 +67,8 @@ uart_rd(unsigned int reg)
  * waiting for tx to happen...
 */
 
-static void putc(int ch)
+static void
+putc(char ch)
 {
        int cpuid = S3C2410_GSTATUS1_2410;
 
@@ -66,14 +77,16 @@ static void putc(int ch)
        cpuid &= S3C2410_GSTATUS1_IDMASK;
 #endif
 
+       if (ch == '\n')
+               putc('\r');    /* expand newline to \r\n */
+
        if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) {
                int level;
 
                while (1) {
                        level = uart_rd(S3C2410_UFSTAT);
 
-                       if (cpuid == S3C2410_GSTATUS1_2440 ||
-                           cpuid == S3C2410_GSTATUS1_2442) {
+                       if (cpuid == S3C2410_GSTATUS1_2440) {
                                level &= S3C2440_UFSTAT_TXMASK;
                                level >>= S3C2440_UFSTAT_TXSHIFT;
                        } else {
@@ -88,16 +101,19 @@ static void putc(int ch)
        } else {
                /* not using fifos */
 
-               while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE)
-                       barrier();
+               while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE);
        }
 
        /* write byte to transmission register */
        uart_wr(S3C2410_UTXH, ch);
 }
 
-static inline void flush(void)
+static void
+putstr(const char *ptr)
 {
+       for (; *ptr != '\0'; ptr++) {
+               putc(*ptr);
+       }
 }
 
 #define __raw_writel(d,ad) do { *((volatile unsigned int *)(ad)) = (d); } while(0)
@@ -121,7 +137,7 @@ static void arch_decomp_wdog_start(void)
 {
        __raw_writel(WDOG_COUNT, S3C2410_WTDAT);
        __raw_writel(WDOG_COUNT, S3C2410_WTCNT);
-       __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x80), S3C2410_WTCON);
+       __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x40), S3C2410_WTCON);
 }
 
 #else