fedora core 6 1.2949 + vserver 2.2.0
[linux-2.6.git] / include / asm-frv / cpu-irqs.h
index 5cd691e..478f349 100644 (file)
 
 #ifndef __ASSEMBLY__
 
-#include <asm/irq-routing.h>
-
-#define IRQ_BASE_CPU           (NR_IRQ_ACTIONS_PER_GROUP * 0)
-
-/* IRQ IDs presented to drivers */
-enum {
-       IRQ_CPU__UNUSED = IRQ_BASE_CPU,
-       IRQ_CPU_UART0,
-       IRQ_CPU_UART1,
-       IRQ_CPU_TIMER0,
-       IRQ_CPU_TIMER1,
-       IRQ_CPU_TIMER2,
-       IRQ_CPU_DMA0,
-       IRQ_CPU_DMA1,
-       IRQ_CPU_DMA2,
-       IRQ_CPU_DMA3,
-       IRQ_CPU_DMA4,
-       IRQ_CPU_DMA5,
-       IRQ_CPU_DMA6,
-       IRQ_CPU_DMA7,
-       IRQ_CPU_EXTERNAL0,
-       IRQ_CPU_EXTERNAL1,
-       IRQ_CPU_EXTERNAL2,
-       IRQ_CPU_EXTERNAL3,
-       IRQ_CPU_EXTERNAL4,
-       IRQ_CPU_EXTERNAL5,
-       IRQ_CPU_EXTERNAL6,
-       IRQ_CPU_EXTERNAL7,
-};
-
 /* IRQ to level mappings */
 #define IRQ_GDBSTUB_LEVEL      15
 #define IRQ_UART_LEVEL         13
@@ -82,6 +52,30 @@ enum {
 #define IRQ_XIRQ6_LEVEL                7
 #define IRQ_XIRQ7_LEVEL                8
 
+/* IRQ IDs presented to drivers */
+#define IRQ_CPU__UNUSED                IRQ_BASE_CPU
+#define IRQ_CPU_UART0          (IRQ_BASE_CPU + IRQ_UART0_LEVEL)
+#define IRQ_CPU_UART1          (IRQ_BASE_CPU + IRQ_UART1_LEVEL)
+#define IRQ_CPU_TIMER0         (IRQ_BASE_CPU + IRQ_TIMER0_LEVEL)
+#define IRQ_CPU_TIMER1         (IRQ_BASE_CPU + IRQ_TIMER1_LEVEL)
+#define IRQ_CPU_TIMER2         (IRQ_BASE_CPU + IRQ_TIMER2_LEVEL)
+#define IRQ_CPU_DMA0           (IRQ_BASE_CPU + IRQ_DMA0_LEVEL)
+#define IRQ_CPU_DMA1           (IRQ_BASE_CPU + IRQ_DMA1_LEVEL)
+#define IRQ_CPU_DMA2           (IRQ_BASE_CPU + IRQ_DMA2_LEVEL)
+#define IRQ_CPU_DMA3           (IRQ_BASE_CPU + IRQ_DMA3_LEVEL)
+#define IRQ_CPU_DMA4           (IRQ_BASE_CPU + IRQ_DMA4_LEVEL)
+#define IRQ_CPU_DMA5           (IRQ_BASE_CPU + IRQ_DMA5_LEVEL)
+#define IRQ_CPU_DMA6           (IRQ_BASE_CPU + IRQ_DMA6_LEVEL)
+#define IRQ_CPU_DMA7           (IRQ_BASE_CPU + IRQ_DMA7_LEVEL)
+#define IRQ_CPU_EXTERNAL0      (IRQ_BASE_CPU + IRQ_XIRQ0_LEVEL)
+#define IRQ_CPU_EXTERNAL1      (IRQ_BASE_CPU + IRQ_XIRQ1_LEVEL)
+#define IRQ_CPU_EXTERNAL2      (IRQ_BASE_CPU + IRQ_XIRQ2_LEVEL)
+#define IRQ_CPU_EXTERNAL3      (IRQ_BASE_CPU + IRQ_XIRQ3_LEVEL)
+#define IRQ_CPU_EXTERNAL4      (IRQ_BASE_CPU + IRQ_XIRQ4_LEVEL)
+#define IRQ_CPU_EXTERNAL5      (IRQ_BASE_CPU + IRQ_XIRQ5_LEVEL)
+#define IRQ_CPU_EXTERNAL6      (IRQ_BASE_CPU + IRQ_XIRQ6_LEVEL)
+#define IRQ_CPU_EXTERNAL7      (IRQ_BASE_CPU + IRQ_XIRQ7_LEVEL)
+
 #endif /* !__ASSEMBLY__ */
 
 #endif /* _ASM_CPU_IRQS_H */