linux 2.6.16.38 w/ vs2.0.3-rc1

[linux-2.6.git] / include / asm-i386 / atomic.h

diff --git a/include/asm-i386/atomic.h b/include/asm-i386/atomic.h
index 51a1662..de649d3 100644 (file)
--- a/include/asm-i386/atomic.h
+++ b/include/asm-i386/atomic.h
@@ -1,6 +1,7 @@
 #ifndef __ARCH_I386_ATOMIC__
 #define __ARCH_I386_ATOMIC__
 
+#include <linux/config.h>
 #include <linux/compiler.h>
 #include <asm/processor.h>
 
@@ -9,6 +10,12 @@
  * resource counting etc..
  */
 
+#ifdef CONFIG_SMP
+#define LOCK "lock ; "
+#else
+#define LOCK ""
+#endif
+
 /*
  * Make sure gcc doesn't try to be clever and move things around
  * on us. We need to use _exactly_ the address the user gave us,
@@ -45,9 +52,9 @@ typedef struct { volatile int counter; } atomic_t;
 static __inline__ void atomic_add(int i, atomic_t *v)
 {
        __asm__ __volatile__(
-               LOCK_PREFIX "addl %1,%0"
-               :"+m" (v->counter)
-               :"ir" (i));
+               LOCK "addl %1,%0"
+               :"=m" (v->counter)
+               :"ir" (i), "m" (v->counter));
 }
 
 /**
@@ -60,9 +67,9 @@ static __inline__ void atomic_add(int i, atomic_t *v)
 static __inline__ void atomic_sub(int i, atomic_t *v)
 {
        __asm__ __volatile__(
-               LOCK_PREFIX "subl %1,%0"
-               :"+m" (v->counter)
-               :"ir" (i));
+               LOCK "subl %1,%0"
+               :"=m" (v->counter)
+               :"ir" (i), "m" (v->counter));
 }
 
 /**
@@ -79,9 +86,9 @@ static __inline__ int atomic_sub_and_test(int i, atomic_t *v)
        unsigned char c;
 
        __asm__ __volatile__(
-               LOCK_PREFIX "subl %2,%0; sete %1"
-               :"+m" (v->counter), "=qm" (c)
-               :"ir" (i) : "memory");
+               LOCK "subl %2,%0; sete %1"
+               :"=m" (v->counter), "=qm" (c)
+               :"ir" (i), "m" (v->counter) : "memory");
        return c;
 }
 
@@ -94,8 +101,9 @@ static __inline__ int atomic_sub_and_test(int i, atomic_t *v)
 static __inline__ void atomic_inc(atomic_t *v)
 {
        __asm__ __volatile__(
-               LOCK_PREFIX "incl %0"
-               :"+m" (v->counter));
+               LOCK "incl %0"
+               :"=m" (v->counter)
+               :"m" (v->counter));
 }
 
 /**
@@ -107,8 +115,9 @@ static __inline__ void atomic_inc(atomic_t *v)
 static __inline__ void atomic_dec(atomic_t *v)
 {
        __asm__ __volatile__(
-               LOCK_PREFIX "decl %0"
-               :"+m" (v->counter));
+               LOCK "decl %0"
+               :"=m" (v->counter)
+               :"m" (v->counter));
 }
 
 /**
@@ -124,9 +133,9 @@ static __inline__ int atomic_dec_and_test(atomic_t *v)
        unsigned char c;
 
        __asm__ __volatile__(
-               LOCK_PREFIX "decl %0; sete %1"
-               :"+m" (v->counter), "=qm" (c)
-               : : "memory");
+               LOCK "decl %0; sete %1"
+               :"=m" (v->counter), "=qm" (c)
+               :"m" (v->counter) : "memory");
        return c != 0;
 }
 
@@ -143,9 +152,9 @@ static __inline__ int atomic_inc_and_test(atomic_t *v)
        unsigned char c;
 
        __asm__ __volatile__(
-               LOCK_PREFIX "incl %0; sete %1"
-               :"+m" (v->counter), "=qm" (c)
-               : : "memory");
+               LOCK "incl %0; sete %1"
+               :"=m" (v->counter), "=qm" (c)
+               :"m" (v->counter) : "memory");
        return c != 0;
 }
 
@@ -163,9 +172,9 @@ static __inline__ int atomic_add_negative(int i, atomic_t *v)
        unsigned char c;
 
        __asm__ __volatile__(
-               LOCK_PREFIX "addl %2,%0; sets %1"
-               :"+m" (v->counter), "=qm" (c)
-               :"ir" (i) : "memory");
+               LOCK "addl %2,%0; sets %1"
+               :"=m" (v->counter), "=qm" (c)
+               :"ir" (i), "m" (v->counter) : "memory");
        return c;
 }
 
@@ -180,24 +189,23 @@ static __inline__ int atomic_add_return(int i, atomic_t *v)
 {
        int __i;
 #ifdef CONFIG_M386
-       unsigned long flags;
        if(unlikely(boot_cpu_data.x86==3))
                goto no_xadd;
 #endif
        /* Modern 486+ processor */
        __i = i;
        __asm__ __volatile__(
-               LOCK_PREFIX "xaddl %0, %1;"
+               LOCK "xaddl %0, %1;"
                :"=r"(i)
                :"m"(v->counter), "0"(i));
        return i + __i;
 
 #ifdef CONFIG_M386
 no_xadd: /* Legacy 386 processor */
-       local_irq_save(flags);
+       local_irq_disable();
        __i = atomic_read(v);
        atomic_set(v, i + __i);
-       local_irq_restore(flags);
+       local_irq_enable();
        return i + __i;
 #endif
 }
@@ -223,14 +231,8 @@ static __inline__ int atomic_sub_return(int i, atomic_t *v)
 ({                                                             \
        int c, old;                                             \
        c = atomic_read(v);                                     \
-       for (;;) {                                              \
-               if (unlikely(c == (u)))                         \
-                       break;                                  \
-               old = atomic_cmpxchg((v), c, c + (a));          \
-               if (likely(old == c))                           \
-                       break;                                  \
+       while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
                c = old;                                        \
-       }                                                       \
        c != (u);                                               \
 })
 #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
@@ -240,11 +242,11 @@ static __inline__ int atomic_sub_return(int i, atomic_t *v)
 
 /* These are x86-specific, used by some header files */
 #define atomic_clear_mask(mask, addr) \
-__asm__ __volatile__(LOCK_PREFIX "andl %0,%1" \
+__asm__ __volatile__(LOCK "andl %0,%1" \
 : : "r" (~(mask)),"m" (*addr) : "memory")
 
 #define atomic_set_mask(mask, addr) \
-__asm__ __volatile__(LOCK_PREFIX "orl %0,%1" \
+__asm__ __volatile__(LOCK "orl %0,%1" \
 : : "r" (mask),"m" (*(addr)) : "memory")
 
 /* Atomic operations are already serializing on x86 */