fedora core 6 1.2949 + vserver 2.2.0

[linux-2.6.git] / include / asm-ia64 / pgtable.h

diff --git a/include/asm-ia64/pgtable.h b/include/asm-ia64/pgtable.h
index e2560c5..5531827 100644 (file)
--- a/include/asm-ia64/pgtable.h
+++ b/include/asm-ia64/pgtable.h
@@ -12,7 +12,6 @@
  *     David Mosberger-Tang <davidm@hpl.hp.com>
  */
 
-#include <linux/config.h>
 
 #include <asm/mman.h>
 #include <asm/page.h>
@@ -276,21 +275,23 @@ ia64_phys_addr_valid (unsigned long addr)
 #define pmd_bad(pmd)                   (!ia64_phys_addr_valid(pmd_val(pmd)))
 #define pmd_present(pmd)               (pmd_val(pmd) != 0UL)
 #define pmd_clear(pmdp)                        (pmd_val(*(pmdp)) = 0UL)
-#define pmd_page_kernel(pmd)           ((unsigned long) __va(pmd_val(pmd) & _PFN_MASK))
+#define pmd_page_vaddr(pmd)            ((unsigned long) __va(pmd_val(pmd) & _PFN_MASK))
 #define pmd_page(pmd)                  virt_to_page((pmd_val(pmd) + PAGE_OFFSET))
 
 #define pud_none(pud)                  (!pud_val(pud))
 #define pud_bad(pud)                   (!ia64_phys_addr_valid(pud_val(pud)))
 #define pud_present(pud)               (pud_val(pud) != 0UL)
 #define pud_clear(pudp)                        (pud_val(*(pudp)) = 0UL)
-#define pud_page(pud)                  ((unsigned long) __va(pud_val(pud) & _PFN_MASK))
+#define pud_page_vaddr(pud)            ((unsigned long) __va(pud_val(pud) & _PFN_MASK))
+#define pud_page(pud)                  virt_to_page((pud_val(pud) + PAGE_OFFSET))
 
 #ifdef CONFIG_PGTABLE_4
 #define pgd_none(pgd)                  (!pgd_val(pgd))
 #define pgd_bad(pgd)                   (!ia64_phys_addr_valid(pgd_val(pgd)))
 #define pgd_present(pgd)               (pgd_val(pgd) != 0UL)
 #define pgd_clear(pgdp)                        (pgd_val(*(pgdp)) = 0UL)
-#define pgd_page(pgd)                  ((unsigned long) __va(pgd_val(pgd) & _PFN_MASK))
+#define pgd_page_vaddr(pgd)            ((unsigned long) __va(pgd_val(pgd) & _PFN_MASK))
+#define pgd_page(pgd)                  virt_to_page((pgd_val(pgd) + PAGE_OFFSET))
 #endif
 
 /*
@@ -314,25 +315,23 @@ ia64_phys_addr_valid (unsigned long addr)
 #define pte_mkyoung(pte)       (__pte(pte_val(pte) | _PAGE_A))
 #define pte_mkclean(pte)       (__pte(pte_val(pte) & ~_PAGE_D))
 #define pte_mkdirty(pte)       (__pte(pte_val(pte) | _PAGE_D))
-#define pte_mkhuge(pte)                (__pte(pte_val(pte) | _PAGE_P))
+#define pte_mkhuge(pte)                (__pte(pte_val(pte)))
 
 /*
- * Macro to a page protection value as "uncacheable".  Note that "protection" is really a
- * misnomer here as the protection value contains the memory attribute bits, dirty bits,
- * and various other bits as well.
+ * Make page protection values cacheable, uncacheable, or write-
+ * combining.  Note that "protection" is really a misnomer here as the
+ * protection value contains the memory attribute bits, dirty bits, and
+ * various other bits as well.
  */
+#define pgprot_cacheable(prot)         __pgprot((pgprot_val(prot) & ~_PAGE_MA_MASK) | _PAGE_MA_WB)
 #define pgprot_noncached(prot)         __pgprot((pgprot_val(prot) & ~_PAGE_MA_MASK) | _PAGE_MA_UC)
-
-/*
- * Macro to make mark a page protection value as "write-combining".
- * Note that "protection" is really a misnomer here as the protection
- * value contains the memory attribute bits, dirty bits, and various
- * other bits as well.  Accesses through a write-combining translation
- * works bypasses the caches, but does allow for consecutive writes to
- * be combined into single (but larger) write transactions.
- */
 #define pgprot_writecombine(prot)      __pgprot((pgprot_val(prot) & ~_PAGE_MA_MASK) | _PAGE_MA_WC)
 
+struct file;
+extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
+                                    unsigned long size, pgprot_t vma_prot);
+#define __HAVE_PHYS_MEM_ACCESS_PROT
+
 static inline unsigned long
 pgd_index (unsigned long address)
 {
@@ -363,19 +362,19 @@ pgd_offset (struct mm_struct *mm, unsigned long address)
 #ifdef CONFIG_PGTABLE_4
 /* Find an entry in the second-level page table.. */
 #define pud_offset(dir,addr) \
-       ((pud_t *) pgd_page(*(dir)) + (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1)))
+       ((pud_t *) pgd_page_vaddr(*(dir)) + (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1)))
 #endif
 
 /* Find an entry in the third-level page table.. */
 #define pmd_offset(dir,addr) \
-       ((pmd_t *) pud_page(*(dir)) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)))
+       ((pmd_t *) pud_page_vaddr(*(dir)) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)))
 
 /*
  * Find an entry in the third-level page table.  This looks more complicated than it
  * should be because some platforms place page tables in high memory.
  */
 #define pte_index(addr)                (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
-#define pte_offset_kernel(dir,addr)    ((pte_t *) pmd_page_kernel(*(dir)) + pte_index(addr))
+#define pte_offset_kernel(dir,addr)    ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(addr))
 #define pte_offset_map(dir,addr)       pte_offset_kernel(dir, addr)
 #define pte_offset_map_nested(dir,addr)        pte_offset_map(dir, addr)
 #define pte_unmap(pte)                 do { } while (0)
@@ -505,9 +504,6 @@ extern struct page *zero_page_memmap_ptr;
 #define HUGETLB_PGDIR_SHIFT    (HPAGE_SHIFT + 2*(PAGE_SHIFT-3))
 #define HUGETLB_PGDIR_SIZE     (__IA64_UL(1) << HUGETLB_PGDIR_SHIFT)
 #define HUGETLB_PGDIR_MASK     (~(HUGETLB_PGDIR_SIZE-1))
-struct mmu_gather;
-void hugetlb_free_pgd_range(struct mmu_gather **tlb, unsigned long addr,
-               unsigned long end, unsigned long floor, unsigned long ceiling);
 #endif
 
 /*