* Copyright (C) 2001-2002, 2004 Hirokazu Takata <takata at linux-m32r.org>
*/
+#include <linux/config.h>
+#include <asm/m32r.h> /* M32R_PSW_BSM, M32R_PSW_BPM */
+
/* 0 - 13 are integer registers (general purpose registers). */
#define PT_R4 0
#define PT_R5 1
#define PT_R15 PT_SP
/* processor status and miscellaneous context registers. */
+#if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2)
#define PT_ACC0H 15
#define PT_ACC0L 16
-#define PT_ACC1H 17 /* ISA_DSP_LEVEL2 only */
-#define PT_ACC1L 18 /* ISA_DSP_LEVEL2 only */
+#define PT_ACC1H 17
+#define PT_ACC1L 18
+#define PT_ACCH PT_ACC0H
+#define PT_ACCL PT_ACC0L
#define PT_PSW 19
#define PT_BPC 20
#define PT_BBPSW 21
#define PT_LR 25
#define PT_SPI 26
#define PT_ORIGR0 27
+#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
+#define PT_ACCH 15
+#define PT_ACCL 16
+#define PT_PSW 17
+#define PT_BPC 18
+#define PT_BBPSW 19
+#define PT_BBPC 20
+#define PT_SPU 21
+#define PT_FP 22
+#define PT_LR 23
+#define PT_SPI 24
+#define PT_ORIGR0 25
+#else
+#error unknown isa conifiguration
+#endif
/* virtual pt_reg entry for gdb */
#define PT_PC 30
long syscall_nr;
/* Saved main processor status and miscellaneous context registers. */
+#if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2)
unsigned long acc0h;
unsigned long acc0l;
- unsigned long acc1h; /* ISA_DSP_LEVEL2 only */
- unsigned long acc1l; /* ISA_DSP_LEVEL2 only */
+ unsigned long acc1h;
+ unsigned long acc1l;
+#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
+ unsigned long acch;
+ unsigned long accl;
+#else
+#error unknown isa configuration
+#endif
unsigned long psw;
unsigned long bpc; /* saved PC for TRAP syscalls */
unsigned long bbpsw;
#ifdef __KERNEL__
-#include <asm/m32r.h> /* M32R_PSW_BSM, M32R_PSW_BPM */
-
#define __ARCH_SYS_PTRACE 1
#if defined(CONFIG_ISA_M32R2) || defined(CONFIG_CHIP_VDEC2)