Merge to Fedora kernel-2.6.18-1.2224_FC5 patched with stable patch-2.6.18.1-vs2.0...

[linux-2.6.git] / include / asm-mips / mipsregs.h

diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h
index 5af7517..1f318d7 100644 (file)
--- a/include/asm-mips/mipsregs.h
+++ b/include/asm-mips/mipsregs.h
@@ -13,7 +13,6 @@
 #ifndef _ASM_MIPSREGS_H
 #define _ASM_MIPSREGS_H
 
-#include <linux/config.h>
 #include <linux/linkage.h>
 #include <asm/hazards.h>
 
@@ -471,6 +470,8 @@
 
 /* Bits specific to the VR41xx.  */
 #define VR41_CONF_CS           (_ULCAST_(1) << 12)
+#define VR41_CONF_P4K          (_ULCAST_(1) << 13)
+#define VR41_CONF_BP           (_ULCAST_(1) << 16)
 #define VR41_CONF_M16          (_ULCAST_(1) << 20)
 #define VR41_CONF_AD           (_ULCAST_(1) << 23)
 
@@ -1417,7 +1418,7 @@ change_c0_##name(unsigned int change, unsigned int new)           \
 
 #else /* SMTC versions that manage MT scheduling */
 
-#include <asm/interrupt.h>
+#include <linux/irqflags.h>
 
 /*
  * This is a duplicate of dmt() in mipsmtregs.h to avoid problems with
@@ -1451,18 +1452,17 @@ static inline void __emt(unsigned int previous)
 {
        if ((previous & __EMT_ENABLE))
                __asm__ __volatile__(
-               "       .set    noreorder                               \n"
                "       .set    mips32r2                                \n"
                "       .word   0x41600be1              # emt           \n"
                "       ehb                                             \n"
-               "       .set    mips0                                   \n"
-               "       .set    reorder                                 \n");
+               "       .set    mips0                                   \n");
 }
 
 static inline void __ehb(void)
 {
        __asm__ __volatile__(
-       "       ehb                                                     \n");
+       "       .set    mips32r2                                        \n"
+       "       ehb                                                     \n"             "       .set    mips0                                           \n");
 }
 
 /*