VServer 1.9.2 (patch-2.6.8.1-vs1.9.2.diff)

[linux-2.6.git] / include / asm-mips / pgtable-bits.h

diff --git a/include/asm-mips/pgtable-bits.h b/include/asm-mips/pgtable-bits.h
index 22d1983..6a89042 100644 (file)
--- a/include/asm-mips/pgtable-bits.h
+++ b/include/asm-mips/pgtable-bits.h
@@ -60,7 +60,7 @@
 #define _PAGE_SILENT_WRITE          (1<<8)
 #define _CACHE_MASK                 (7<<9)
 
-#if defined(CONFIG_CPU_SB1)
+#ifdef CONFIG_CPU_SB1
 
 /* No penalty for being coherent on the SB1, so just
    use it for "noncoherent" spaces, too.  Shouldn't hurt. */
@@ -70,6 +70,20 @@
 #define _CACHE_CACHABLE_NONCOHERENT (5<<9)
 #define _CACHE_UNCACHED_ACCELERATED (7<<9)
 
+#elif defined(CONFIG_CPU_RM9000)
+
+#define _CACHE_WT                      (0 << 9)
+#define _CACHE_WTWA                    (1 << 9)
+#define _CACHE_UC_B                    (2 << 9)
+#define _CACHE_WB                      (3 << 9)
+#define _CACHE_CWBEA                   (4 << 9)
+#define _CACHE_CWB                     (5 << 9)
+#define _CACHE_UCNB                    (6 << 9)
+#define _CACHE_FPC                     (7 << 9)
+
+#define _CACHE_UNCACHED                        _CACHE_UC_B
+#define _CACHE_CACHABLE_NONCOHERENT    _CACHE_WB
+
 #else
 
 #define _CACHE_CACHABLE_NO_WA       (0<<9)  /* R4600 only              */
@@ -93,6 +107,8 @@
 #define PAGE_CACHABLE_DEFAULT  _CACHE_UNCACHED
 #elif defined(CONFIG_DMA_NONCOHERENT)
 #define PAGE_CACHABLE_DEFAULT  _CACHE_CACHABLE_NONCOHERENT
+#elif defined(CONFIG_CPU_RM9000)
+#define PAGE_CACHABLE_DEFAULT  _CACHE_CWBEA
 #else
 #define PAGE_CACHABLE_DEFAULT  _CACHE_CACHABLE_COW
 #endif