vserver 1.9.5.x5

[linux-2.6.git] / include / asm-mips / prefetch.h

diff --git a/include/asm-mips/prefetch.h b/include/asm-mips/prefetch.h
index 0b712ca..71293ec 100644 (file)
--- a/include/asm-mips/prefetch.h
+++ b/include/asm-mips/prefetch.h
@@ -8,6 +8,8 @@
 #ifndef __ASM_PREFETCH_H
 #define __ASM_PREFETCH_H
 
+#include <linux/config.h>
+
 /*
  * R5000 and RM5200 implements pref and prefx instructions but they're nops, so
  * rather than wasting time we pretend these processors don't support
@@ -41,4 +43,46 @@
 #define Pref_WriteBackInvalidate       25
 #define Pref_PrepareForStore           30
 
+#ifdef __ASSEMBLY__
+
+       .macro  __pref hint addr
+#ifdef CONFIG_CPU_HAS_PREFETCH
+       pref    \hint, \addr
+#endif
+       .endm
+
+       .macro  pref_load addr
+       __pref  Pref_Load, \addr
+       .endm
+
+       .macro  pref_store addr
+       __pref  Pref_Store, \addr
+       .endm
+
+       .macro  pref_load_streamed addr
+       __pref  Pref_LoadStreamed, \addr
+       .endm
+
+       .macro  pref_store_streamed addr
+       __pref  Pref_StoreStreamed, \addr
+       .endm
+
+       .macro  pref_load_retained addr
+       __pref  Pref_LoadRetained, \addr
+       .endm
+
+       .macro  pref_store_retained addr
+       __pref  Pref_StoreRetained, \addr
+       .endm
+
+       .macro  pref_wback_inv addr
+       __pref  Pref_WriteBackInvalidate, \addr
+       .endm
+
+       .macro  pref_prepare_for_store addr
+       __pref  Pref_PrepareForStore, \addr
+       .endm
+
+#endif
+
 #endif /* __ASM_PREFETCH_H */