/* VR4133 0x00000c84- */
#define PRID_VR4133 0x00000c84
+/*
+ * Memory resource
+ */
+#define IO_MEM_RESOURCE_START 0UL
+#define IO_MEM_RESOURCE_END 0x1fffffffUL
+
/*
* Bus Control Uint
*/
extern int vr41xx_set_intassign(unsigned int irq, unsigned char intassign);
extern int vr41xx_cascade_irq(unsigned int irq, int (*get_irq_number)(int irq));
-#define PIUINT_COMMAND 0x0040
-#define PIUINT_DATA 0x0020
-#define PIUINT_PAGE1 0x0010
-#define PIUINT_PAGE0 0x0008
-#define PIUINT_DATALOST 0x0004
-#define PIUINT_STATUSCHANGE 0x0001
-
-extern void vr41xx_enable_piuint(uint16_t mask);
-extern void vr41xx_disable_piuint(uint16_t mask);
-
-#define AIUINT_INPUT_DMAEND 0x0800
-#define AIUINT_INPUT_DMAHALT 0x0400
-#define AIUINT_INPUT_DATALOST 0x0200
-#define AIUINT_INPUT_DATA 0x0100
-#define AIUINT_OUTPUT_DMAEND 0x0008
-#define AIUINT_OUTPUT_DMAHALT 0x0004
-#define AIUINT_OUTPUT_NODATA 0x0002
-
-extern void vr41xx_enable_aiuint(uint16_t mask);
-extern void vr41xx_disable_aiuint(uint16_t mask);
-
-#define KIUINT_DATALOST 0x0004
-#define KIUINT_DATAREADY 0x0002
-#define KIUINT_SCAN 0x0001
-
-extern void vr41xx_enable_kiuint(uint16_t mask);
-extern void vr41xx_disable_kiuint(uint16_t mask);
-
-#define DSIUINT_CTS 0x0800
-#define DSIUINT_RXERR 0x0400
-#define DSIUINT_RX 0x0200
-#define DSIUINT_TX 0x0100
-#define DSIUINT_ALL 0x0f00
-
-extern void vr41xx_enable_dsiuint(uint16_t mask);
-extern void vr41xx_disable_dsiuint(uint16_t mask);
-
-#define FIRINT_UNIT 0x0010
-#define FIRINT_RX_DMAEND 0x0008
-#define FIRINT_RX_DMAHALT 0x0004
-#define FIRINT_TX_DMAEND 0x0002
-#define FIRINT_TX_DMAHALT 0x0001
-
-extern void vr41xx_enable_firint(uint16_t mask);
-extern void vr41xx_disable_firint(uint16_t mask);
-
-extern void vr41xx_enable_pciint(void);
-extern void vr41xx_disable_pciint(void);
-
-extern void vr41xx_enable_scuint(void);
-extern void vr41xx_disable_scuint(void);
-
-#define CSIINT_TX_DMAEND 0x0040
-#define CSIINT_TX_DMAHALT 0x0020
-#define CSIINT_TX_DATA 0x0010
-#define CSIINT_TX_FIFOEMPTY 0x0008
-#define CSIINT_RX_DMAEND 0x0004
-#define CSIINT_RX_DMAHALT 0x0002
-#define CSIINT_RX_FIFOEMPTY 0x0001
-
-extern void vr41xx_enable_csiint(uint16_t mask);
-extern void vr41xx_disable_csiint(uint16_t mask);
-
-extern void vr41xx_enable_bcuint(void);
-extern void vr41xx_disable_bcuint(void);
+extern void vr41xx_enable_dsiuint(void);
+extern void vr41xx_disable_dsiuint(void);
/*
* Power Management Unit
/*
* PCI Control Unit
*/
-#define PCI_MASTER_ADDRESS_MASK 0x7fffffffU
-
-struct pci_master_address_conversion {
- uint32_t bus_base_address;
- uint32_t address_mask;
- uint32_t pci_base_address;
-};
-
-struct pci_target_address_conversion {
- uint32_t address_mask;
- uint32_t bus_base_address;
-};
-
-typedef enum {
- CANNOT_LOCK_FROM_DEVICE,
- CAN_LOCK_FROM_DEVICE,
-} pci_exclusive_access_t;
-
-struct pci_mailbox_address {
- uint32_t base_address;
+struct vr41xx_pci_address_space {
+ u32 internal_base;
+ u32 address_mask;
+ u32 pci_base;
};
-struct pci_target_address_window {
- uint32_t base_address;
-};
-
-typedef enum {
- PCI_ARBITRATION_MODE_FAIR,
- PCI_ARBITRATION_MODE_ALTERNATE_0,
- PCI_ARBITRATION_MODE_ALTERNATE_B,
-} pci_arbiter_priority_control_t;
-
-typedef enum {
- PCI_TAKE_AWAY_GNT_DISABLE,
- PCI_TAKE_AWAY_GNT_ENABLE,
-} pci_take_away_gnt_mode_t;
-
-struct pci_controller_unit_setup {
- struct pci_master_address_conversion *master_memory1;
- struct pci_master_address_conversion *master_memory2;
-
- struct pci_target_address_conversion *target_memory1;
- struct pci_target_address_conversion *target_memory2;
-
- struct pci_master_address_conversion *master_io;
-
- pci_exclusive_access_t exclusive_access;
-
- uint32_t pci_clock_max;
- uint8_t wait_time_limit_from_irdy_to_trdy; /* Only VR4122 is supported */
-
- struct pci_mailbox_address *mailbox;
- struct pci_target_address_window *target_window1;
- struct pci_target_address_window *target_window2;
-
- uint8_t master_latency_timer;
- uint8_t retry_limit;
-
- pci_arbiter_priority_control_t arbiter_priority_control;
- pci_take_away_gnt_mode_t take_away_gnt_mode;
-
- struct resource *mem_resource;
- struct resource *io_resource;
+struct vr41xx_pci_address_map {
+ struct vr41xx_pci_address_space *mem1;
+ struct vr41xx_pci_address_space *mem2;
+ struct vr41xx_pci_address_space *io;
};
-extern void vr41xx_pciu_setup(struct pci_controller_unit_setup *setup);
+extern void vr41xx_pciu_init(struct vr41xx_pci_address_map *map);
#endif /* __NEC_VR41XX_H */