#define pte_ERROR(e) \
printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
#define pmd_ERROR(e) \
- printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
+ printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, (unsigned long)pmd_val(e))
#define pgd_ERROR(e) \
- printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
+ printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, (unsigned long)pgd_val(e))
/* Note: If you change ISTACK_SIZE, you need to change the corresponding
* values in vmlinux.lds and vmlinux64.lds (init_istack section). Also,
#define ISTACK_SIZE 32768 /* Interrupt Stack Size */
#define ISTACK_ORDER 3
-/*
- * NOTE: Many of the below macros use PT_NLEVELS because
- * it is convenient that PT_NLEVELS == LOG2(pte size in bytes),
- * i.e. we use 3 level page tables when we use 8 byte pte's
- * (for 64 bit) and 2 level page tables when we use 4 byte pte's
- */
+/* This is the size of the initially mapped kernel memory (i.e. currently
+ * 0 to 1<<23 == 8MB */
+#define KERNEL_INITIAL_ORDER 23
+#define KERNEL_INITIAL_SIZE (1 << KERNEL_INITIAL_ORDER)
#ifdef __LP64__
-#define PT_NLEVELS 3
-#define PT_INITIAL 4 /* Number of initial page tables */
+#define PT_NLEVELS 3
+#define PGD_ORDER 1 /* Number of pages per pgd */
+#define PMD_ORDER 1 /* Number of pages per pmd */
+#define PGD_ALLOC_ORDER 2 /* first pgd contains pmd */
#else
-#define PT_NLEVELS 2
-#define PT_INITIAL 2 /* Number of initial page tables */
+#define PT_NLEVELS 2
+#define PGD_ORDER 1 /* Number of pages per pgd */
+#define PGD_ALLOC_ORDER PGD_ORDER
#endif
-#define MAX_ADDRBITS (PAGE_SHIFT + (PT_NLEVELS)*(PAGE_SHIFT - PT_NLEVELS))
-#define MAX_ADDRESS (1UL << MAX_ADDRBITS)
-
-#define SPACEID_SHIFT (MAX_ADDRBITS - 32)
-
-/* Definitions for 1st level */
-
-#define PGDIR_SHIFT (PAGE_SHIFT + (PT_NLEVELS - 1)*(PAGE_SHIFT - PT_NLEVELS))
-#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
-#define PGDIR_MASK (~(PGDIR_SIZE-1))
-#define PTRS_PER_PGD (1UL << (PAGE_SHIFT - PT_NLEVELS))
-#define USER_PTRS_PER_PGD PTRS_PER_PGD
+/* Definitions for 3rd level (we use PLD here for Page Lower directory
+ * because PTE_SHIFT is used lower down to mean shift that has to be
+ * done to get usable bits out of the PTE) */
+#define PLD_SHIFT PAGE_SHIFT
+#define PLD_SIZE PAGE_SIZE
+#define BITS_PER_PTE (PAGE_SHIFT - BITS_PER_PTE_ENTRY)
+#define PTRS_PER_PTE (1UL << BITS_PER_PTE)
/* Definitions for 2nd level */
#define pgtable_cache_init() do { } while (0)
-#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT - PT_NLEVELS))
+#define PMD_SHIFT (PLD_SHIFT + BITS_PER_PTE)
#define PMD_SIZE (1UL << PMD_SHIFT)
#define PMD_MASK (~(PMD_SIZE-1))
#if PT_NLEVELS == 3
-#define PTRS_PER_PMD (1UL << (PAGE_SHIFT - PT_NLEVELS))
+#define BITS_PER_PMD (PAGE_SHIFT + PMD_ORDER - BITS_PER_PMD_ENTRY)
#else
-#define PTRS_PER_PMD 1
+#define BITS_PER_PMD 0
#endif
+#define PTRS_PER_PMD (1UL << BITS_PER_PMD)
+
+/* Definitions for 1st level */
+#define PGDIR_SHIFT (PMD_SHIFT + BITS_PER_PMD)
+#define BITS_PER_PGD (PAGE_SHIFT + PGD_ORDER - BITS_PER_PGD_ENTRY)
+#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
+#define PGDIR_MASK (~(PGDIR_SIZE-1))
+#define PTRS_PER_PGD (1UL << BITS_PER_PGD)
+#define USER_PTRS_PER_PGD PTRS_PER_PGD
-/* Definitions for 3rd level */
+#define MAX_ADDRBITS (PGDIR_SHIFT + BITS_PER_PGD)
+#define MAX_ADDRESS (1UL << MAX_ADDRBITS)
+
+#define SPACEID_SHIFT (MAX_ADDRBITS - 32)
-#define PTRS_PER_PTE (1UL << (PAGE_SHIFT - PT_NLEVELS))
+/* This calculates the number of initial pages we need for the initial
+ * page tables */
+#define PT_INITIAL (1 << (KERNEL_INITIAL_ORDER - PMD_SHIFT))
/*
* pgd entries used up by user/kernel:
#define PCXL_DMA_MAP_SIZE (8*1024*1024)
#define VMALLOC_START ((unsigned long)vmalloc_start)
/* this is a fixmap remnant, see fixmap.h */
-#define VMALLOC_END (TMPALIAS_MAP_START)
+#define VMALLOC_END (KERNEL_MAP_END)
#endif
/* NB: The tlb miss handlers make certain assumptions about the order */
/* initial page tables for 0-8MB for kernel */
-extern unsigned long pg0[];
+extern pte_t pg0[];
/* zero page used for uninitialized stuff */
#define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
#define pte_clear(xp) do { pte_val(*(xp)) = 0; } while (0)
+#ifdef __LP64__
+/* The first entry of the permanent pmd is not there if it contains
+ * the gateway marker */
+#define pmd_none(x) (!pmd_val(x) || pmd_val(x) == _PAGE_GATEWAY)
+#define pmd_bad(x) ((pmd_val(x) & ~PAGE_MASK) != _PAGE_TABLE && (pmd_val(x) & ~PAGE_MASK) != (_PAGE_TABLE | _PAGE_GATEWAY))
+#else
#define pmd_none(x) (!pmd_val(x))
#define pmd_bad(x) ((pmd_val(x) & ~PAGE_MASK) != _PAGE_TABLE)
+#endif
#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
-#define pmd_clear(xp) do { pmd_val(*(xp)) = 0; } while (0)
+static inline void pmd_clear(pmd_t *pmd) {
+#ifdef __LP64__
+ if(pmd_val(*pmd) & _PAGE_GATEWAY)
+ /* This is the entry pointing to the permanent pmd
+ * attached to the pgd; cannot clear it */
+ pmd_val(*pmd) = _PAGE_GATEWAY;
+ else
+#endif
+ pmd_val(*pmd) = 0;
+}
-#ifdef __LP64__
+#if PT_NLEVELS == 3
#define pgd_page(pgd) ((unsigned long) __va(pgd_val(pgd) & PAGE_MASK))
/* For 64 bit we have three level tables */
#define pgd_none(x) (!pgd_val(x))
+#ifdef __LP64__
+#define pgd_bad(x) ((pgd_val(x) & ~PAGE_MASK) != _PAGE_TABLE && (pgd_val(x) & ~PAGE_MASK) != (_PAGE_TABLE | _PAGE_GATEWAY))
+#else
#define pgd_bad(x) ((pgd_val(x) & ~PAGE_MASK) != _PAGE_TABLE)
+#endif
#define pgd_present(x) (pgd_val(x) & _PAGE_PRESENT)
-#define pgd_clear(xp) do { pgd_val(*(xp)) = 0; } while (0)
+static inline void pgd_clear(pgd_t *pgd) {
+#ifdef __LP64__
+ if(pgd_val(*pgd) & _PAGE_GATEWAY)
+ /* This is the permanent pmd attached to the pgd; cannot
+ * free it */
+ return;
+#endif
+ pgd_val(*pgd) = 0;
+}
#else
/*
* The "pgd_xxx()" functions here are trivial for a folded two-level
/* Find an entry in the second-level page table.. */
-#ifdef __LP64__
+#if PT_NLEVELS == 3
#define pmd_offset(dir,address) \
((pmd_t *) pgd_page(*(dir)) + (((address)>>PMD_SHIFT) & (PTRS_PER_PMD-1)))
#else
#define pte_same(A,B) (pte_val(A) == pte_val(B))
-typedef pte_t *pte_addr_t;
-
#endif /* !__ASSEMBLY__ */
#define io_remap_page_range remap_page_range
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