linux 2.6.16.38 w/ vs2.0.3-rc1

[linux-2.6.git] / include / asm-parisc / system.h

diff --git a/include/asm-parisc/system.h b/include/asm-parisc/system.h
index 74f037a..a5a973c 100644 (file)
--- a/include/asm-parisc/system.h
+++ b/include/asm-parisc/system.h
@@ -1,6 +1,7 @@
 #ifndef __PARISC_SYSTEM_H
 #define __PARISC_SYSTEM_H
 
+#include <linux/config.h>
 #include <asm/psw.h>
 
 /* The program status word as bitfields.  */
@@ -143,6 +144,8 @@ static inline void set_eiem(unsigned long val)
 #define read_barrier_depends()         do { } while(0)
 
 #define set_mb(var, value)             do { var = value; mb(); } while (0)
+#define set_wmb(var, value)            do { var = value; wmb(); } while (0)
+
 
 #ifndef CONFIG_PA20
 /* Because kmalloc only guarantees 8-byte alignment for kmalloc'd data,
@@ -153,14 +156,13 @@ static inline void set_eiem(unsigned long val)
    type and dynamically select the 16-byte aligned int from the array
    for the semaphore.  */
 
-#define __PA_LDCW_ALIGNMENT    16
-#define __ldcw_align(a) ({                                     \
-       unsigned long __ret = (unsigned long) &(a)->lock[0];    \
-       __ret = (__ret + __PA_LDCW_ALIGNMENT - 1)               \
-               & ~(__PA_LDCW_ALIGNMENT - 1);                   \
-       (volatile unsigned int *) __ret;                        \
+#define __PA_LDCW_ALIGNMENT 16
+#define __ldcw_align(a) ({ \
+  unsigned long __ret = (unsigned long) &(a)->lock[0];                 \
+  __ret = (__ret + __PA_LDCW_ALIGNMENT - 1) & ~(__PA_LDCW_ALIGNMENT - 1); \
+  (volatile unsigned int *) __ret;                                      \
 })
-#define __LDCW "ldcw"
+#define LDCW   "ldcw"
 
 #else /*CONFIG_PA20*/
 /* From: "Jim Hull" <jim.hull of hp.com>
@@ -170,18 +172,17 @@ static inline void set_eiem(unsigned long val)
    they only require "natural" alignment (4-byte for ldcw, 8-byte for
    ldcd). */
 
-#define __PA_LDCW_ALIGNMENT    4
+#define __PA_LDCW_ALIGNMENT 4
 #define __ldcw_align(a) ((volatile unsigned int *)a)
-#define __LDCW "ldcw,co"
+#define LDCW   "ldcw,co"
 
 #endif /*!CONFIG_PA20*/
 
 /* LDCW, the only atomic read-write operation PA-RISC has. *sigh*.  */
-#define __ldcw(a) ({                                           \
-       unsigned __ret;                                         \
-       __asm__ __volatile__(__LDCW " 0(%1),%0"                 \
-               : "=r" (__ret) : "r" (a));                      \
-       __ret;                                                  \
+#define __ldcw(a) ({ \
+       unsigned __ret; \
+       __asm__ __volatile__(LDCW " 0(%1),%0" : "=r" (__ret) : "r" (a)); \
+       __ret; \
 })
 
 #ifdef CONFIG_SMP