fedora core 6 1.2949 + vserver 2.2.0

[linux-2.6.git] / include / asm-ppc / reg_booke.h

diff --git a/include/asm-ppc/reg_booke.h b/include/asm-ppc/reg_booke.h
index 00ad9c7..a263fc1 100644 (file)
--- a/include/asm-ppc/reg_booke.h
+++ b/include/asm-ppc/reg_booke.h
@@ -9,41 +9,9 @@
 #ifndef __ASM_PPC_REG_BOOKE_H__
 #define __ASM_PPC_REG_BOOKE_H__
 
-#ifndef __ASSEMBLY__
-/* Device Control Registers */
-void __mtdcr(int reg, unsigned int val);
-unsigned int __mfdcr(int reg);
-#define mfdcr(rn)                                              \
-       ({unsigned int rval;                                    \
-       if (__builtin_constant_p(rn))                           \
-               asm volatile("mfdcr %0," __stringify(rn)        \
-                             : "=r" (rval));                   \
-       else                                                    \
-               rval = __mfdcr(rn);                             \
-       rval;})
-
-#define mtdcr(rn, v)                                           \
-do {                                                           \
-       if (__builtin_constant_p(rn))                           \
-               asm volatile("mtdcr " __stringify(rn) ",%0"     \
-                             : : "r" (v));                     \
-       else                                                    \
-               __mtdcr(rn, v);                                 \
-} while (0)
-
-/* R/W of indirect DCRs make use of standard naming conventions for DCRs */
-#define mfdcri(base, reg)                      \
-({                                             \
-       mtdcr(base ## _CFGADDR, base ## _ ## reg);      \
-       mfdcr(base ## _CFGDATA);                        \
-})
-
-#define mtdcri(base, reg, data)                        \
-do {                                           \
-       mtdcr(base ## _CFGADDR, base ## _ ## reg);      \
-       mtdcr(base ## _CFGDATA, data);          \
-} while (0)
+#include <asm/dcr.h>
 
+#ifndef __ASSEMBLY__
 /* Performance Monitor Registers */
 #define mfpmr(rn)      ({unsigned int rval; \
                        asm volatile("mfpmr %0," __stringify(rn) \
@@ -237,6 +205,7 @@ do {                                                \
 #endif
 
 /* Bit definitions for CCR1. */
+#define        CCR1_DPC        0x00000100 /* Disable L1 I-Cache/D-Cache parity checking */
 #define        CCR1_TCS        0x00000080 /* Timer Clock Select */
 
 /* Bit definitions for the MCSR. */
@@ -299,14 +268,14 @@ do {                                              \
 #define DBSR_IC                0x80000000      /* Instruction Completion */
 #define DBSR_BT                0x40000000      /* Branch taken */
 #define DBSR_TIE       0x10000000      /* Trap Instruction debug Event */
-#define DBSR_IAC1      0x00800000      /* Instruction Address Compare 1 Event */
-#define DBSR_IAC2      0x00400000      /* Instruction Address Compare 2 Event */
-#define DBSR_IAC3      0x00200000      /* Instruction Address Compare 3 Event */
-#define DBSR_IAC4      0x00100000      /* Instruction Address Compare 4 Event */
-#define DBSR_DAC1R     0x00080000      /* Data Address Compare 1 Read Event */
-#define DBSR_DAC1W     0x00040000      /* Data Address Compare 1 Write Event */
-#define DBSR_DAC2R     0x00020000      /* Data Address Compare 2 Read Event */
-#define DBSR_DAC2W     0x00010000      /* Data Address Compare 2 Write Event */
+#define DBSR_IAC1      0x04000000      /* Instruction Address Compare 1 Event */
+#define DBSR_IAC2      0x02000000      /* Instruction Address Compare 2 Event */
+#define DBSR_IAC3      0x00080000      /* Instruction Address Compare 3 Event */
+#define DBSR_IAC4      0x00040000      /* Instruction Address Compare 4 Event */
+#define DBSR_DAC1R     0x01000000      /* Data Address Compare 1 Read Event */
+#define DBSR_DAC1W     0x00800000      /* Data Address Compare 1 Write Event */
+#define DBSR_DAC2R     0x00400000      /* Data Address Compare 2 Read Event */
+#define DBSR_DAC2W     0x00200000      /* Data Address Compare 2 Write Event */
 #endif
 
 /* Bit definitions related to the ESR. */