patch-2_6_7-vs1_9_1_12

[linux-2.6.git] / include / asm-sparc64 / lsu.h

diff --git a/include/asm-sparc64/lsu.h b/include/asm-sparc64/lsu.h
index d592e97..e5329c7 100644 (file)
--- a/include/asm-sparc64/lsu.h
+++ b/include/asm-sparc64/lsu.h
@@ -2,17 +2,19 @@
 #ifndef _SPARC64_LSU_H
 #define _SPARC64_LSU_H
 
+#include <asm/const.h>
+
 /* LSU Control Register */
-#define LSU_CONTROL_PM         0x000001fe00000000 /* Phys-watchpoint byte mask     */
-#define LSU_CONTROL_VM         0x00000001fe000000 /* Virt-watchpoint byte mask     */
-#define LSU_CONTROL_PR         0x0000000001000000 /* Phys-read watchpoint enable   */
-#define LSU_CONTROL_PW         0x0000000000800000 /* Phys-write watchpoint enable  */
-#define LSU_CONTROL_VR         0x0000000000400000 /* Virt-read watchpoint enable   */
-#define LSU_CONTROL_VW         0x0000000000200000 /* Virt-write watchpoint enable  */
-#define LSU_CONTROL_FM         0x00000000000ffff0 /* Parity mask enables.          */
-#define LSU_CONTROL_DM         0x0000000000000008 /* Data MMU enable.              */
-#define LSU_CONTROL_IM         0x0000000000000004 /* Instruction MMU enable.       */
-#define LSU_CONTROL_DC         0x0000000000000002 /* Data cache enable.            */
-#define LSU_CONTROL_IC         0x0000000000000001 /* Instruction cache enable.     */
+#define LSU_CONTROL_PM _AC(0x000001fe00000000,UL) /* Phys-watchpoint byte mask*/
+#define LSU_CONTROL_VM _AC(0x00000001fe000000,UL) /* Virt-watchpoint byte mask*/
+#define LSU_CONTROL_PR _AC(0x0000000001000000,UL) /* Phys-rd watchpoint enable*/
+#define LSU_CONTROL_PW _AC(0x0000000000800000,UL) /* Phys-wr watchpoint enable*/
+#define LSU_CONTROL_VR _AC(0x0000000000400000,UL) /* Virt-rd watchpoint enable*/
+#define LSU_CONTROL_VW _AC(0x0000000000200000,UL) /* Virt-wr watchpoint enable*/
+#define LSU_CONTROL_FM _AC(0x00000000000ffff0,UL) /* Parity mask enables.     */
+#define LSU_CONTROL_DM _AC(0x0000000000000008,UL) /* Data MMU enable.         */
+#define LSU_CONTROL_IM _AC(0x0000000000000004,UL) /* Instruction MMU enable.  */
+#define LSU_CONTROL_DC _AC(0x0000000000000002,UL) /* Data cache enable.       */
+#define LSU_CONTROL_IC _AC(0x0000000000000001,UL) /* Instruction cache enable.*/
 
 #endif /* !(_SPARC64_LSU_H) */