vserver 2.0 rc7

[linux-2.6.git] / include / asm-sparc64 / spitfire.h

diff --git a/include/asm-sparc64/spitfire.h b/include/asm-sparc64/spitfire.h
index 6ee83ff..9d7613e 100644 (file)
--- a/include/asm-sparc64/spitfire.h
+++ b/include/asm-sparc64/spitfire.h
@@ -34,6 +34,9 @@
 #define PHYS_WATCHPOINT                0x0000000000000040
 
 #define SPITFIRE_HIGHEST_LOCKED_TLBENT (64 - 1)
+#define CHEETAH_HIGHEST_LOCKED_TLBENT  (16 - 1)
+
+#define L1DCACHE_SIZE          0x4000
 
 #ifndef __ASSEMBLY__
 
@@ -45,9 +48,8 @@ enum ultra_tlb_layout {
 
 extern enum ultra_tlb_layout tlb_type;
 
-#define CHEETAH_HIGHEST_LOCKED_TLBENT  (16 - 1)
-
-#define L1DCACHE_SIZE          0x4000
+extern int cheetah_pcache_forced_on;
+extern void cheetah_enable_pcache(void);
 
 #define sparc64_highest_locked_tlbent()        \
        (tlb_type == spitfire ? \
@@ -100,46 +102,6 @@ static __inline__ void spitfire_put_dsfsr(unsigned long sfsr)
                             : "r" (sfsr), "r" (TLB_SFSR), "i" (ASI_DMMU));
 }
 
-static __inline__ unsigned long spitfire_get_primary_context(void)
-{
-       unsigned long ctx;
-
-       __asm__ __volatile__("ldxa      [%1] %2, %0"
-                            : "=r" (ctx)
-                            : "r" (PRIMARY_CONTEXT), "i" (ASI_DMMU));
-       return ctx;
-}
-
-static __inline__ void spitfire_set_primary_context(unsigned long ctx)
-{
-       __asm__ __volatile__("stxa      %0, [%1] %2\n\t"
-                            "membar    #Sync"
-                            : /* No outputs */
-                            : "r" (ctx & 0x3ff),
-                              "r" (PRIMARY_CONTEXT), "i" (ASI_DMMU));
-       __asm__ __volatile__ ("membar #Sync" : : : "memory");
-}
-
-static __inline__ unsigned long spitfire_get_secondary_context(void)
-{
-       unsigned long ctx;
-
-       __asm__ __volatile__("ldxa      [%1] %2, %0"
-                            : "=r" (ctx)
-                            : "r" (SECONDARY_CONTEXT), "i" (ASI_DMMU));
-       return ctx;
-}
-
-static __inline__ void spitfire_set_secondary_context(unsigned long ctx)
-{
-       __asm__ __volatile__("stxa      %0, [%1] %2\n\t"
-                            "membar    #Sync"
-                            : /* No outputs */
-                            : "r" (ctx & 0x3ff),
-                              "r" (SECONDARY_CONTEXT), "i" (ASI_DMMU));
-       __asm__ __volatile__ ("membar #Sync" : : : "memory");
-}
-
 /* The data cache is write through, so this just invalidates the
  * specified line.
  */