Fedora kernel-2.6.17-1.2142_FC4 patched with stable patch-2.6.17.4-vs2.0.2-rc26.diff

[linux-2.6.git] / include / asm-um / cache.h

diff --git a/include/asm-um/cache.h b/include/asm-um/cache.h
index 4b134fe..3d05870 100644 (file)
--- a/include/asm-um/cache.h
+++ b/include/asm-um/cache.h
@@ -1,10 +1,18 @@
 #ifndef __UM_CACHE_H
 #define __UM_CACHE_H
 
-/* These are x86 numbers */
-#define L1_CACHE_SHIFT 5
-#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
+#include <linux/config.h>
 
-#define L1_CACHE_SHIFT_MAX 7   /* largest L1 which this arch supports */
+#if defined(CONFIG_UML_X86) && !defined(CONFIG_64BIT)
+# define L1_CACHE_SHIFT                (CONFIG_X86_L1_CACHE_SHIFT)
+#elif defined(CONFIG_UML_X86) /* 64-bit */
+# define L1_CACHE_SHIFT                6 /* Should be 7 on Intel */
+#else
+/* XXX: this was taken from x86, now it's completely random. Luckily only
+ * affects SMP padding. */
+# define L1_CACHE_SHIFT                5
+#endif
+
+#define L1_CACHE_BYTES         (1 << L1_CACHE_SHIFT)
 
 #endif