Fedora kernel-2.6.17-1.2142_FC4 patched with stable patch-2.6.17.4-vs2.0.2-rc26.diff

[linux-2.6.git] / include / linux / fsl_devices.h

diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index faaff4c..16fbe59 100644 (file)
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -4,7 +4,7 @@
  * Definitions for any platform device related flags or structures for
  * Freescale processor devices
  *
- * Maintainer: Kumar Gala (kumar.gala@freescale.com)
+ * Maintainer: Kumar Gala <galak@kernel.crashing.org>
  *
  * Copyright 2004 Freescale Semiconductor, Inc
  *
@@ -47,23 +47,32 @@
 struct gianfar_platform_data {
        /* device specific information */
        u32 device_flags;
-       u32 phy_reg_addr;
 
        /* board specific information */
        u32 board_flags;
-       u32 phyid;
-       u32 interruptPHY;
+       u32 bus_id;
+       u32 phy_id;
        u8 mac_addr[6];
 };
 
+struct gianfar_mdio_data {
+       /* board specific information */
+       int irq[32];
+};
+
 /* Flags related to gianfar device features */
 #define FSL_GIANFAR_DEV_HAS_GIGABIT            0x00000001
 #define FSL_GIANFAR_DEV_HAS_COALESCE           0x00000002
 #define FSL_GIANFAR_DEV_HAS_RMON               0x00000004
 #define FSL_GIANFAR_DEV_HAS_MULTI_INTR         0x00000008
+#define FSL_GIANFAR_DEV_HAS_CSUM               0x00000010
+#define FSL_GIANFAR_DEV_HAS_VLAN               0x00000020
+#define FSL_GIANFAR_DEV_HAS_EXTENDED_HASH      0x00000040
+#define FSL_GIANFAR_DEV_HAS_PADDING            0x00000080
 
 /* Flags in gianfar_platform_data */
-#define FSL_GIANFAR_BRD_HAS_PHY_INTR   0x00000001      /* if not set use a timer */
+#define FSL_GIANFAR_BRD_HAS_PHY_INTR   0x00000001 /* set or use a timer */
+#define FSL_GIANFAR_BRD_IS_REDUCED     0x00000002 /* Set if RGMII, RMII */
 
 struct fsl_i2c_platform_data {
        /* device specific information */
@@ -74,5 +83,43 @@ struct fsl_i2c_platform_data {
 #define FSL_I2C_DEV_SEPARATE_DFSRR     0x00000001
 #define FSL_I2C_DEV_CLOCK_5200         0x00000002
 
+
+enum fsl_usb2_operating_modes {
+       FSL_USB2_MPH_HOST,
+       FSL_USB2_DR_HOST,
+       FSL_USB2_DR_DEVICE,
+       FSL_USB2_DR_OTG,
+};
+
+enum fsl_usb2_phy_modes {
+       FSL_USB2_PHY_NONE,
+       FSL_USB2_PHY_ULPI,
+       FSL_USB2_PHY_UTMI,
+       FSL_USB2_PHY_UTMI_WIDE,
+       FSL_USB2_PHY_SERIAL,
+};
+
+struct fsl_usb2_platform_data {
+       /* board specific information */
+       enum fsl_usb2_operating_modes operating_mode;
+       enum fsl_usb2_phy_modes phy_mode;
+       unsigned int port_enables;
+};
+
+/* Flags in fsl_usb2_mph_platform_data */
+#define FSL_USB2_PORT0_ENABLED 0x00000001
+#define FSL_USB2_PORT1_ENABLED 0x00000002
+
+struct fsl_spi_platform_data {
+       u32     initial_spmode; /* initial SPMODE value */
+       u16     bus_num;
+
+       /* board specific information */
+       u16     max_chipselect;
+       void    (*activate_cs)(u8 cs, u8 polarity);
+       void    (*deactivate_cs)(u8 cs, u8 polarity);
+       u32     sysclk;
+};
+
 #endif                         /* _FSL_DEVICE_H_ */
 #endif                         /* __KERNEL__ */