// rather than 64k as some of the games work more responsively.
// log base 2( buff sz = 32k).
static unsigned long defaultorder = 3;
-MODULE_PARM(defaultorder, "i");
+module_param(defaultorder, ulong, 0);
//
// Turn on/off debugging compilation by commenting out "#define CSDEBUG"
#if CSDEBUG
static unsigned long cs_debuglevel = 1; // levels range from 1-9
static unsigned long cs_debugmask = CS_INIT | CS_ERROR; // use CS_DBGOUT with various mask values
-MODULE_PARM(cs_debuglevel, "i");
-MODULE_PARM(cs_debugmask, "i");
+module_param(cs_debuglevel, ulong, 0);
+module_param(cs_debugmask, ulong, 0);
#endif
#define CS_TRUE 1
#define CS_FALSE 0
})
//LIST_HEAD(cs4281_devs);
-struct list_head cs4281_devs = { &cs4281_devs, &cs4281_devs };
+static struct list_head cs4281_devs = { &cs4281_devs, &cs4281_devs };
struct cs4281_state;
// hardware resources
unsigned int pBA0phys, pBA1phys;
- char *pBA0, *pBA1;
+ char __iomem *pBA0;
+ char __iomem *pBA1;
unsigned int irq;
// mixer registers
* Suspend - save the ac97 regs, mute the outputs and power down the part.
*
****************************************************************************/
-void cs4281_ac97_suspend(struct cs4281_state *s)
+static void cs4281_ac97_suspend(struct cs4281_state *s)
{
int Count,i;
* Resume - power up the part and restore its registers..
*
****************************************************************************/
-void cs4281_ac97_resume(struct cs4281_state *s)
+static void cs4281_ac97_resume(struct cs4281_state *s)
{
int Count,i;
} // SavePowerState
*/
-void cs4281_SuspendFIFO(struct cs4281_state *s, struct cs4281_pipeline *pl)
+static void cs4281_SuspendFIFO(struct cs4281_state *s, struct cs4281_pipeline *pl)
{
/*
* We need to save the contents of the BASIC FIFO Registers.
pl->u32FCRn_Save = readl(s->pBA0 + pl->u32FCRnAddress);
pl->u32FSICn_Save = readl(s->pBA0 + pl->u32FSICnAddress);
}
-void cs4281_ResumeFIFO(struct cs4281_state *s, struct cs4281_pipeline *pl)
+static void cs4281_ResumeFIFO(struct cs4281_state *s, struct cs4281_pipeline *pl)
{
/*
* We need to restore the contents of the BASIC FIFO Registers.
writel(pl->u32FCRn_Save,s->pBA0 + pl->u32FCRnAddress);
writel(pl->u32FSICn_Save,s->pBA0 + pl->u32FSICnAddress);
}
-void cs4281_SuspendDMAengine(struct cs4281_state *s, struct cs4281_pipeline *pl)
+static void cs4281_SuspendDMAengine(struct cs4281_state *s, struct cs4281_pipeline *pl)
{
//
// We need to save the contents of the BASIC DMA Registers.
pl->u32DCCn_Save = readl(s->pBA0 + pl->u32DCCnAddress);
pl->u32DCAn_Save = readl(s->pBA0 + pl->u32DCAnAddress);
}
-void cs4281_ResumeDMAengine(struct cs4281_state *s, struct cs4281_pipeline *pl)
+static void cs4281_ResumeDMAengine(struct cs4281_state *s, struct cs4281_pipeline *pl)
{
//
// We need to save the contents of the BASIC DMA Registers.
writel( pl->u32DCAn_Save, s->pBA0 + pl->u32DCAnAddress);
}
-int cs4281_suspend(struct cs4281_state *s)
+static int cs4281_suspend(struct cs4281_state *s)
{
int i;
u32 u32CLKCR1;
return 0;
}
-int cs4281_resume(struct cs4281_state *s)
+static int cs4281_resume(struct cs4281_state *s)
{
int i;
unsigned temp1;
#define DMABUF_MINORDER 1 // ==> min buffer size = 8K.
-void dealloc_dmabuf(struct cs4281_state *s, struct dmabuf *db)
+static void dealloc_dmabuf(struct cs4281_state *s, struct dmabuf *db)
{
struct page *map, *mapend;
}
db->buforder = order;
// Now mark the pages as reserved; otherwise the
- // remap_page_range() in cs4281_mmap doesn't work.
+ // remap_pfn_range() in cs4281_mmap doesn't work.
// 1. get index to last page in mem_map array for rawbuf.
mapend = virt_to_page(db->rawbuf +
(PAGE_SIZE << db->buforder) - 1);
}
s->buforder_tmpbuff = order;
// Now mark the pages as reserved; otherwise the
- // remap_page_range() in cs4281_mmap doesn't work.
+ // remap_pfn_range() in cs4281_mmap doesn't work.
// 1. get index to last page in mem_map array for rawbuf.
mapend = virt_to_page(s->tmpbuff +
(PAGE_SIZE << s->buforder_tmpbuff) - 1);
size = vma->vm_end - vma->vm_start;
if (size > (PAGE_SIZE << db->buforder))
return -EINVAL;
- if (remap_page_range
- (vma, vma->vm_start, virt_to_phys(db->rawbuf), size,
- vma->vm_page_prot)) return -EAGAIN;
+ if (remap_pfn_range(vma, vma->vm_start,
+ virt_to_phys(db->rawbuf) >> PAGE_SHIFT,
+ size, vma->vm_page_prot))
+ return -EAGAIN;
db->mapped = 1;
CS_DBGOUT(CS_FUNCTION | CS_PARMS | CS_OPEN, 4,
#ifndef NOT_CS4281_PM
-void __devinit cs4281_BuildFIFO(
+static void __devinit cs4281_BuildFIFO(
struct cs4281_pipeline *p,
struct cs4281_state *s)
{
}
-void __devinit cs4281_BuildDMAengine(
+static void __devinit cs4281_BuildDMAengine(
struct cs4281_pipeline *p,
struct cs4281_state *s)
{
}
-void __devinit cs4281_InitPM(struct cs4281_state *s)
+static void __devinit cs4281_InitPM(struct cs4281_state *s)
{
int i;
struct cs4281_pipeline *p;
MODULE_DEVICE_TABLE(pci, cs4281_pci_tbl);
-struct pci_driver cs4281_pci_driver = {
+static struct pci_driver cs4281_pci_driver = {
.name = "cs4281",
.id_table = cs4281_pci_tbl,
.probe = cs4281_probe,
.resume = CS4281_RESUME_TBL,
};
-int __init cs4281_init_module(void)
+static int __init cs4281_init_module(void)
{
int rtn = 0;
CS_DBGOUT(CS_INIT | CS_FUNCTION, 2, printk(KERN_INFO
return rtn;
}
-void __exit cs4281_cleanup_module(void)
+static void __exit cs4281_cleanup_module(void)
{
pci_unregister_driver(&cs4281_pci_driver);
#ifndef NOT_CS4281_PM
module_init(cs4281_init_module);
module_exit(cs4281_cleanup_module);
-#ifndef MODULE
-int __init init_cs4281(void)
-{
- return cs4281_init_module();
-}
-#endif
git://git.onelab.eu / linux-2.6.git / blobdiff