arch/alpha/kernel/traps.c

   1 /*
   2  * arch/alpha/kernel/traps.c
   3  *
   4  * (C) Copyright 1994 Linus Torvalds
   5  */
   6
   7 /*
   8  * This file initializes the trap entry points
   9  */
  10
  11 #include <linux/config.h>
  12 #include <linux/mm.h>
  13 #include <linux/sched.h>
  14 #include <linux/tty.h>
  15 #include <linux/delay.h>
  16 #include <linux/smp_lock.h>
  17 #include <linux/module.h>
  18 #include <linux/init.h>
  19 #include <linux/kallsyms.h>
  20
  21 #include <asm/gentrap.h>
  22 #include <asm/uaccess.h>
  23 #include <asm/unaligned.h>
  24 #include <asm/sysinfo.h>
  25 #include <asm/hwrpb.h>
  26 #include <asm/mmu_context.h>
  27
  28 #include "proto.h"
  29
  30 /* Work-around for some SRMs which mishandle opDEC faults.  */
  31
  32 static int opDEC_fix;
  33
  34 static void __init
  35 opDEC_check(void)
  36 {
  37         __asm__ __volatile__ (
  38         /* Load the address of... */
  39         "       br      $16, 1f\n"
  40         /* A stub instruction fault handler.  Just add 4 to the
  41            pc and continue.  */
  42         "       ldq     $16, 8($sp)\n"
  43         "       addq    $16, 4, $16\n"
  44         "       stq     $16, 8($sp)\n"
  45         "       call_pal %[rti]\n"
  46         /* Install the instruction fault handler.  */
  47         "1:     lda     $17, 3\n"
  48         "       call_pal %[wrent]\n"
  49         /* With that in place, the fault from the round-to-minf fp
  50            insn will arrive either at the "lda 4" insn (bad) or one
  51            past that (good).  This places the correct fixup in %0.  */
  52         "       lda %[fix], 0\n"
  53         "       cvttq/svm $f31,$f31\n"
  54         "       lda %[fix], 4"
  55         : [fix] "=r" (opDEC_fix)
  56         : [rti] "n" (PAL_rti), [wrent] "n" (PAL_wrent)
  57         : "$0", "$1", "$16", "$17", "$22", "$23", "$24", "$25");
  58
  59         if (opDEC_fix)
  60                 printk("opDEC fixup enabled.\n");
  61 }
  62
  63 void
  64 dik_show_regs(struct pt_regs *regs, unsigned long *r9_15)
  65 {
  66         printk("pc = [<%016lx>]  ra = [<%016lx>]  ps = %04lx    %s\n",
  67                regs->pc, regs->r26, regs->ps, print_tainted());
  68         printk("v0 = %016lx  t0 = %016lx  t1 = %016lx\n",
  69                regs->r0, regs->r1, regs->r2);
  70         printk("t2 = %016lx  t3 = %016lx  t4 = %016lx\n",
  71                regs->r3, regs->r4, regs->r5);
  72         printk("t5 = %016lx  t6 = %016lx  t7 = %016lx\n",
  73                regs->r6, regs->r7, regs->r8);
  74
  75         if (r9_15) {
  76                 printk("s0 = %016lx  s1 = %016lx  s2 = %016lx\n",
  77                        r9_15[9], r9_15[10], r9_15[11]);
  78                 printk("s3 = %016lx  s4 = %016lx  s5 = %016lx\n",
  79                        r9_15[12], r9_15[13], r9_15[14]);
  80                 printk("s6 = %016lx\n", r9_15[15]);
  81         }
  82
  83         printk("a0 = %016lx  a1 = %016lx  a2 = %016lx\n",
  84                regs->r16, regs->r17, regs->r18);
  85         printk("a3 = %016lx  a4 = %016lx  a5 = %016lx\n",
  86                regs->r19, regs->r20, regs->r21);
  87         printk("t8 = %016lx  t9 = %016lx  t10= %016lx\n",
  88                regs->r22, regs->r23, regs->r24);
  89         printk("t11= %016lx  pv = %016lx  at = %016lx\n",
  90                regs->r25, regs->r27, regs->r28);
  91         printk("gp = %016lx  sp = %p\n", regs->gp, regs+1);
  92 #if 0
  93 __halt();
  94 #endif
  95 }
  96
  97 #if 0
  98 static char * ireg_name[] = {"v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
  99                            "t7", "s0", "s1", "s2", "s3", "s4", "s5", "s6",
 100                            "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
 101                            "t10", "t11", "ra", "pv", "at", "gp", "sp", "zero"};
 102 #endif
 103
 104 static void
 105 dik_show_code(unsigned int *pc)
 106 {
 107         long i;
 108
 109         printk("Code:");
 110         for (i = -6; i < 2; i++) {
 111                 unsigned int insn;
 112                 if (__get_user(insn, pc+i))
 113                         break;
 114                 printk("%c%08x%c", i ? ' ' : '<', insn, i ? ' ' : '>');
 115         }
 116         printk("\n");
 117 }
 118
 119 static void
 120 dik_show_trace(unsigned long *sp)
 121 {
 122         long i = 0;
 123         printk("Trace:\n");
 124         while (0x1ff8 & (unsigned long) sp) {
 125                 extern char _stext[], _etext[];
 126                 unsigned long tmp = *sp;
 127                 sp++;
 128                 if (tmp < (unsigned long) &_stext)
 129                         continue;
 130                 if (tmp >= (unsigned long) &_etext)
 131                         continue;
 132                 printk("[<%lx>]", tmp);
 133                 print_symbol(" %s", tmp);
 134                 printk("\n");
 135                 if (i > 40) {
 136                         printk(" ...");
 137                         break;
 138                 }
 139         }
 140         printk("\n");
 141 }
 142
 143 static int kstack_depth_to_print = 24;
 144
 145 void show_stack(struct task_struct *task, unsigned long *sp)
 146 {
 147         unsigned long *stack;
 148         int i;
 149
 150         /*
 151          * debugging aid: "show_stack(NULL);" prints the
 152          * back trace for this cpu.
 153          */
 154         if(sp==NULL)
 155                 sp=(unsigned long*)&sp;
 156
 157         stack = sp;
 158         for(i=0; i < kstack_depth_to_print; i++) {
 159                 if (((long) stack & (THREAD_SIZE-1)) == 0)
 160                         break;
 161                 if (i && ((i % 4) == 0))
 162                         printk("\n       ");
 163                 printk("%016lx ", *stack++);
 164         }
 165         printk("\n");
 166         dik_show_trace(sp);
 167 }
 168
 169 void dump_stack(void)
 170 {
 171         show_stack(NULL, NULL);
 172 }
 173
 174 EXPORT_SYMBOL(dump_stack);
 175
 176 void
 177 die_if_kernel(char * str, struct pt_regs *regs, long err, unsigned long *r9_15)
 178 {
 179         if (regs->ps & 8)
 180                 return;
 181 #ifdef CONFIG_SMP
 182         printk("CPU %d ", hard_smp_processor_id());
 183 #endif
 184         printk("%s(%d): %s %ld\n", current->comm, current->pid, str, err);
 185         dik_show_regs(regs, r9_15);
 186         dik_show_trace((unsigned long *)(regs+1));
 187         dik_show_code((unsigned int *)regs->pc);
 188
 189         if (test_and_set_thread_flag (TIF_DIE_IF_KERNEL)) {
 190                 printk("die_if_kernel recursion detected.\n");
 191                 local_irq_enable();
 192                 while (1);
 193         }
 194         do_exit(SIGSEGV);
 195 }
 196
 197 #ifndef CONFIG_MATHEMU
 198 static long dummy_emul(void) { return 0; }
 199 long (*alpha_fp_emul_imprecise)(struct pt_regs *regs, unsigned long writemask)
 200   = (void *)dummy_emul;
 201 long (*alpha_fp_emul) (unsigned long pc)
 202   = (void *)dummy_emul;
 203 #else
 204 long alpha_fp_emul_imprecise(struct pt_regs *regs, unsigned long writemask);
 205 long alpha_fp_emul (unsigned long pc);
 206 #endif
 207
 208 asmlinkage void
 209 do_entArith(unsigned long summary, unsigned long write_mask,
 210             struct pt_regs *regs)
 211 {
 212         long si_code = FPE_FLTINV;
 213         siginfo_t info;
 214
 215         if (summary & 1) {
 216                 /* Software-completion summary bit is set, so try to
 217                    emulate the instruction.  If the processor supports
 218                    precise exceptions, we don't have to search.  */
 219                 if (!amask(AMASK_PRECISE_TRAP))
 220                         si_code = alpha_fp_emul(regs->pc - 4);
 221                 else
 222                         si_code = alpha_fp_emul_imprecise(regs, write_mask);
 223                 if (si_code == 0)
 224                         return;
 225         }
 226         die_if_kernel("Arithmetic fault", regs, 0, NULL);
 227
 228         info.si_signo = SIGFPE;
 229         info.si_errno = 0;
 230         info.si_code = si_code;
 231         info.si_addr = (void __user *) regs->pc;
 232         send_sig_info(SIGFPE, &info, current);
 233 }
 234
 235 asmlinkage void
 236 do_entIF(unsigned long type, struct pt_regs *regs)
 237 {
 238         siginfo_t info;
 239         int signo, code;
 240
 241         if (regs->ps == 0) {
 242                 if (type == 1) {
 243                         const unsigned int *data
 244                           = (const unsigned int *) regs->pc;
 245                         printk("Kernel bug at %s:%d\n",
 246                                (const char *)(data[1] | (long)data[2] << 32),
 247                                data[0]);
 248                 }
 249                 die_if_kernel((type == 1 ? "Kernel Bug" : "Instruction fault"),
 250                               regs, type, NULL);
 251         }
 252
 253         switch (type) {
 254               case 0: /* breakpoint */
 255                 info.si_signo = SIGTRAP;
 256                 info.si_errno = 0;
 257                 info.si_code = TRAP_BRKPT;
 258                 info.si_trapno = 0;
 259                 info.si_addr = (void __user *) regs->pc;
 260
 261                 if (ptrace_cancel_bpt(current)) {
 262                         regs->pc -= 4;  /* make pc point to former bpt */
 263                 }
 264
 265                 send_sig_info(SIGTRAP, &info, current);
 266                 return;
 267
 268               case 1: /* bugcheck */
 269                 info.si_signo = SIGTRAP;
 270                 info.si_errno = 0;
 271                 info.si_code = __SI_FAULT;
 272                 info.si_addr = (void __user *) regs->pc;
 273                 info.si_trapno = 0;
 274                 send_sig_info(SIGTRAP, &info, current);
 275                 return;
 276
 277               case 2: /* gentrap */
 278                 info.si_addr = (void __user *) regs->pc;
 279                 info.si_trapno = regs->r16;
 280                 switch ((long) regs->r16) {
 281                 case GEN_INTOVF:
 282                         signo = SIGFPE;
 283                         code = FPE_INTOVF;
 284                         break;
 285                 case GEN_INTDIV:
 286                         signo = SIGFPE;
 287                         code = FPE_INTDIV;
 288                         break;
 289                 case GEN_FLTOVF:
 290                         signo = SIGFPE;
 291                         code = FPE_FLTOVF;
 292                         break;
 293                 case GEN_FLTDIV:
 294                         signo = SIGFPE;
 295                         code = FPE_FLTDIV;
 296                         break;
 297                 case GEN_FLTUND:
 298                         signo = SIGFPE;
 299                         code = FPE_FLTUND;
 300                         break;
 301                 case GEN_FLTINV:
 302                         signo = SIGFPE;
 303                         code = FPE_FLTINV;
 304                         break;
 305                 case GEN_FLTINE:
 306                         signo = SIGFPE;
 307                         code = FPE_FLTRES;
 308                         break;
 309                 case GEN_ROPRAND:
 310                         signo = SIGFPE;
 311                         code = __SI_FAULT;
 312                         break;
 313
 314                 case GEN_DECOVF:
 315                 case GEN_DECDIV:
 316                 case GEN_DECINV:
 317                 case GEN_ASSERTERR:
 318                 case GEN_NULPTRERR:
 319                 case GEN_STKOVF:
 320                 case GEN_STRLENERR:
 321                 case GEN_SUBSTRERR:
 322                 case GEN_RANGERR:
 323                 case GEN_SUBRNG:
 324                 case GEN_SUBRNG1:
 325                 case GEN_SUBRNG2:
 326                 case GEN_SUBRNG3:
 327                 case GEN_SUBRNG4:
 328                 case GEN_SUBRNG5:
 329                 case GEN_SUBRNG6:
 330                 case GEN_SUBRNG7:
 331                 default:
 332                         signo = SIGTRAP;
 333                         code = __SI_FAULT;
 334                         break;
 335                 }
 336
 337                 info.si_signo = signo;
 338                 info.si_errno = 0;
 339                 info.si_code = code;
 340                 info.si_addr = (void __user *) regs->pc;
 341                 send_sig_info(signo, &info, current);
 342                 return;
 343
 344               case 4: /* opDEC */
 345                 if (implver() == IMPLVER_EV4) {
 346                         long si_code;
 347
 348                         /* The some versions of SRM do not handle
 349                            the opDEC properly - they return the PC of the
 350                            opDEC fault, not the instruction after as the
 351                            Alpha architecture requires.  Here we fix it up.
 352                            We do this by intentionally causing an opDEC
 353                            fault during the boot sequence and testing if
 354                            we get the correct PC.  If not, we set a flag
 355                            to correct it every time through.  */
 356                         regs->pc += opDEC_fix;
 357
 358                         /* EV4 does not implement anything except normal
 359                            rounding.  Everything else will come here as
 360                            an illegal instruction.  Emulate them.  */
 361                         si_code = alpha_fp_emul(regs->pc - 4);
 362                         if (si_code == 0)
 363                                 return;
 364                         if (si_code > 0) {
 365                                 info.si_signo = SIGFPE;
 366                                 info.si_errno = 0;
 367                                 info.si_code = si_code;
 368                                 info.si_addr = (void __user *) regs->pc;
 369                                 send_sig_info(SIGFPE, &info, current);
 370                                 return;
 371                         }
 372                 }
 373                 break;
 374
 375               case 3: /* FEN fault */
 376                 /* Irritating users can call PAL_clrfen to disable the
 377                    FPU for the process.  The kernel will then trap in
 378                    do_switch_stack and undo_switch_stack when we try
 379                    to save and restore the FP registers.
 380
 381                    Given that GCC by default generates code that uses the
 382                    FP registers, PAL_clrfen is not useful except for DoS
 383                    attacks.  So turn the bleeding FPU back on and be done
 384                    with it.  */
 385                 current_thread_info()->pcb.flags |= 1;
 386                 __reload_thread(&current_thread_info()->pcb);
 387                 return;
 388
 389               case 5: /* illoc */
 390               default: /* unexpected instruction-fault type */
 391                       ;
 392         }
 393
 394         info.si_signo = SIGILL;
 395         info.si_errno = 0;
 396         info.si_code = ILL_ILLOPC;
 397         info.si_addr = (void __user *) regs->pc;
 398         send_sig_info(SIGILL, &info, current);
 399 }
 400
 401 /* There is an ifdef in the PALcode in MILO that enables a
 402    "kernel debugging entry point" as an unprivileged call_pal.
 403
 404    We don't want to have anything to do with it, but unfortunately
 405    several versions of MILO included in distributions have it enabled,
 406    and if we don't put something on the entry point we'll oops.  */
 407
 408 asmlinkage void
 409 do_entDbg(struct pt_regs *regs)
 410 {
 411         siginfo_t info;
 412
 413         die_if_kernel("Instruction fault", regs, 0, NULL);
 414
 415         info.si_signo = SIGILL;
 416         info.si_errno = 0;
 417         info.si_code = ILL_ILLOPC;
 418         info.si_addr = (void __user *) regs->pc;
 419         force_sig_info(SIGILL, &info, current);
 420 }
 421
 422
 423 /*
 424  * entUna has a different register layout to be reasonably simple. It
 425  * needs access to all the integer registers (the kernel doesn't use
 426  * fp-regs), and it needs to have them in order for simpler access.
 427  *
 428  * Due to the non-standard register layout (and because we don't want
 429  * to handle floating-point regs), user-mode unaligned accesses are
 430  * handled separately by do_entUnaUser below.
 431  *
 432  * Oh, btw, we don't handle the "gp" register correctly, but if we fault
 433  * on a gp-register unaligned load/store, something is _very_ wrong
 434  * in the kernel anyway..
 435  */
 436 struct allregs {
 437         unsigned long regs[32];
 438         unsigned long ps, pc, gp, a0, a1, a2;
 439 };
 440
 441 struct unaligned_stat {
 442         unsigned long count, va, pc;
 443 } unaligned[2];
 444
 445
 446 /* Macro for exception fixup code to access integer registers.  */
 447 #define una_reg(r)  (regs.regs[(r) >= 16 && (r) <= 18 ? (r)+19 : (r)])
 448
 449
 450 asmlinkage void
 451 do_entUna(void * va, unsigned long opcode, unsigned long reg,
 452           unsigned long a3, unsigned long a4, unsigned long a5,
 453           struct allregs regs)
 454 {
 455         long error, tmp1, tmp2, tmp3, tmp4;
 456         unsigned long pc = regs.pc - 4;
 457         const struct exception_table_entry *fixup;
 458
 459         unaligned[0].count++;
 460         unaligned[0].va = (unsigned long) va;
 461         unaligned[0].pc = pc;
 462
 463         /* We don't want to use the generic get/put unaligned macros as
 464            we want to trap exceptions.  Only if we actually get an
 465            exception will we decide whether we should have caught it.  */
 466
 467         switch (opcode) {
 468         case 0x0c: /* ldwu */
 469                 __asm__ __volatile__(
 470                 "1:     ldq_u %1,0(%3)\n"
 471                 "2:     ldq_u %2,1(%3)\n"
 472                 "       extwl %1,%3,%1\n"
 473                 "       extwh %2,%3,%2\n"
 474                 "3:\n"
 475                 ".section __ex_table,\"a\"\n"
 476                 "       .long 1b - .\n"
 477                 "       lda %1,3b-1b(%0)\n"
 478                 "       .long 2b - .\n"
 479                 "       lda %2,3b-2b(%0)\n"
 480                 ".previous"
 481                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 482                         : "r"(va), "0"(0));
 483                 if (error)
 484                         goto got_exception;
 485                 una_reg(reg) = tmp1|tmp2;
 486                 return;
 487
 488         case 0x28: /* ldl */
 489                 __asm__ __volatile__(
 490                 "1:     ldq_u %1,0(%3)\n"
 491                 "2:     ldq_u %2,3(%3)\n"
 492                 "       extll %1,%3,%1\n"
 493                 "       extlh %2,%3,%2\n"
 494                 "3:\n"
 495                 ".section __ex_table,\"a\"\n"
 496                 "       .long 1b - .\n"
 497                 "       lda %1,3b-1b(%0)\n"
 498                 "       .long 2b - .\n"
 499                 "       lda %2,3b-2b(%0)\n"
 500                 ".previous"
 501                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 502                         : "r"(va), "0"(0));
 503                 if (error)
 504                         goto got_exception;
 505                 una_reg(reg) = (int)(tmp1|tmp2);
 506                 return;
 507
 508         case 0x29: /* ldq */
 509                 __asm__ __volatile__(
 510                 "1:     ldq_u %1,0(%3)\n"
 511                 "2:     ldq_u %2,7(%3)\n"
 512                 "       extql %1,%3,%1\n"
 513                 "       extqh %2,%3,%2\n"
 514                 "3:\n"
 515                 ".section __ex_table,\"a\"\n"
 516                 "       .long 1b - .\n"
 517                 "       lda %1,3b-1b(%0)\n"
 518                 "       .long 2b - .\n"
 519                 "       lda %2,3b-2b(%0)\n"
 520                 ".previous"
 521                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 522                         : "r"(va), "0"(0));
 523                 if (error)
 524                         goto got_exception;
 525                 una_reg(reg) = tmp1|tmp2;
 526                 return;
 527
 528         /* Note that the store sequences do not indicate that they change
 529            memory because it _should_ be affecting nothing in this context.
 530            (Otherwise we have other, much larger, problems.)  */
 531         case 0x0d: /* stw */
 532                 __asm__ __volatile__(
 533                 "1:     ldq_u %2,1(%5)\n"
 534                 "2:     ldq_u %1,0(%5)\n"
 535                 "       inswh %6,%5,%4\n"
 536                 "       inswl %6,%5,%3\n"
 537                 "       mskwh %2,%5,%2\n"
 538                 "       mskwl %1,%5,%1\n"
 539                 "       or %2,%4,%2\n"
 540                 "       or %1,%3,%1\n"
 541                 "3:     stq_u %2,1(%5)\n"
 542                 "4:     stq_u %1,0(%5)\n"
 543                 "5:\n"
 544                 ".section __ex_table,\"a\"\n"
 545                 "       .long 1b - .\n"
 546                 "       lda %2,5b-1b(%0)\n"
 547                 "       .long 2b - .\n"
 548                 "       lda %1,5b-2b(%0)\n"
 549                 "       .long 3b - .\n"
 550                 "       lda $31,5b-3b(%0)\n"
 551                 "       .long 4b - .\n"
 552                 "       lda $31,5b-4b(%0)\n"
 553                 ".previous"
 554                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
 555                           "=&r"(tmp3), "=&r"(tmp4)
 556                         : "r"(va), "r"(una_reg(reg)), "0"(0));
 557                 if (error)
 558                         goto got_exception;
 559                 return;
 560
 561         case 0x2c: /* stl */
 562                 __asm__ __volatile__(
 563                 "1:     ldq_u %2,3(%5)\n"
 564                 "2:     ldq_u %1,0(%5)\n"
 565                 "       inslh %6,%5,%4\n"
 566                 "       insll %6,%5,%3\n"
 567                 "       msklh %2,%5,%2\n"
 568                 "       mskll %1,%5,%1\n"
 569                 "       or %2,%4,%2\n"
 570                 "       or %1,%3,%1\n"
 571                 "3:     stq_u %2,3(%5)\n"
 572                 "4:     stq_u %1,0(%5)\n"
 573                 "5:\n"
 574                 ".section __ex_table,\"a\"\n"
 575                 "       .long 1b - .\n"
 576                 "       lda %2,5b-1b(%0)\n"
 577                 "       .long 2b - .\n"
 578                 "       lda %1,5b-2b(%0)\n"
 579                 "       .long 3b - .\n"
 580                 "       lda $31,5b-3b(%0)\n"
 581                 "       .long 4b - .\n"
 582                 "       lda $31,5b-4b(%0)\n"
 583                 ".previous"
 584                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
 585                           "=&r"(tmp3), "=&r"(tmp4)
 586                         : "r"(va), "r"(una_reg(reg)), "0"(0));
 587                 if (error)
 588                         goto got_exception;
 589                 return;
 590
 591         case 0x2d: /* stq */
 592                 __asm__ __volatile__(
 593                 "1:     ldq_u %2,7(%5)\n"
 594                 "2:     ldq_u %1,0(%5)\n"
 595                 "       insqh %6,%5,%4\n"
 596                 "       insql %6,%5,%3\n"
 597                 "       mskqh %2,%5,%2\n"
 598                 "       mskql %1,%5,%1\n"
 599                 "       or %2,%4,%2\n"
 600                 "       or %1,%3,%1\n"
 601                 "3:     stq_u %2,7(%5)\n"
 602                 "4:     stq_u %1,0(%5)\n"
 603                 "5:\n"
 604                 ".section __ex_table,\"a\"\n\t"
 605                 "       .long 1b - .\n"
 606                 "       lda %2,5b-1b(%0)\n"
 607                 "       .long 2b - .\n"
 608                 "       lda %1,5b-2b(%0)\n"
 609                 "       .long 3b - .\n"
 610                 "       lda $31,5b-3b(%0)\n"
 611                 "       .long 4b - .\n"
 612                 "       lda $31,5b-4b(%0)\n"
 613                 ".previous"
 614                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
 615                           "=&r"(tmp3), "=&r"(tmp4)
 616                         : "r"(va), "r"(una_reg(reg)), "0"(0));
 617                 if (error)
 618                         goto got_exception;
 619                 return;
 620         }
 621
 622         lock_kernel();
 623         printk("Bad unaligned kernel access at %016lx: %p %lx %ld\n",
 624                 pc, va, opcode, reg);
 625         do_exit(SIGSEGV);
 626
 627 got_exception:
 628         /* Ok, we caught the exception, but we don't want it.  Is there
 629            someone to pass it along to?  */
 630         if ((fixup = search_exception_tables(pc)) != 0) {
 631                 unsigned long newpc;
 632                 newpc = fixup_exception(una_reg, fixup, pc);
 633
 634                 printk("Forwarding unaligned exception at %lx (%lx)\n",
 635                        pc, newpc);
 636
 637                 (&regs)->pc = newpc;
 638                 return;
 639         }
 640
 641         /*
 642          * Yikes!  No one to forward the exception to.
 643          * Since the registers are in a weird format, dump them ourselves.
 644          */
 645         lock_kernel();
 646
 647         printk("%s(%d): unhandled unaligned exception\n",
 648                current->comm, current->pid);
 649
 650         printk("pc = [<%016lx>]  ra = [<%016lx>]  ps = %04lx\n",
 651                pc, una_reg(26), regs.ps);
 652         printk("r0 = %016lx  r1 = %016lx  r2 = %016lx\n",
 653                una_reg(0), una_reg(1), una_reg(2));
 654         printk("r3 = %016lx  r4 = %016lx  r5 = %016lx\n",
 655                una_reg(3), una_reg(4), una_reg(5));
 656         printk("r6 = %016lx  r7 = %016lx  r8 = %016lx\n",
 657                una_reg(6), una_reg(7), una_reg(8));
 658         printk("r9 = %016lx  r10= %016lx  r11= %016lx\n",
 659                una_reg(9), una_reg(10), una_reg(11));
 660         printk("r12= %016lx  r13= %016lx  r14= %016lx\n",
 661                una_reg(12), una_reg(13), una_reg(14));
 662         printk("r15= %016lx\n", una_reg(15));
 663         printk("r16= %016lx  r17= %016lx  r18= %016lx\n",
 664                una_reg(16), una_reg(17), una_reg(18));
 665         printk("r19= %016lx  r20= %016lx  r21= %016lx\n",
 666                una_reg(19), una_reg(20), una_reg(21));
 667         printk("r22= %016lx  r23= %016lx  r24= %016lx\n",
 668                una_reg(22), una_reg(23), una_reg(24));
 669         printk("r25= %016lx  r27= %016lx  r28= %016lx\n",
 670                una_reg(25), una_reg(27), una_reg(28));
 671         printk("gp = %016lx  sp = %p\n", regs.gp, &regs+1);
 672
 673         dik_show_code((unsigned int *)pc);
 674         dik_show_trace((unsigned long *)(&regs+1));
 675
 676         if (test_and_set_thread_flag (TIF_DIE_IF_KERNEL)) {
 677                 printk("die_if_kernel recursion detected.\n");
 678                 local_irq_enable();
 679                 while (1);
 680         }
 681         do_exit(SIGSEGV);
 682 }
 683
 684 /*
 685  * Convert an s-floating point value in memory format to the
 686  * corresponding value in register format.  The exponent
 687  * needs to be remapped to preserve non-finite values
 688  * (infinities, not-a-numbers, denormals).
 689  */
 690 static inline unsigned long
 691 s_mem_to_reg (unsigned long s_mem)
 692 {
 693         unsigned long frac    = (s_mem >>  0) & 0x7fffff;
 694         unsigned long sign    = (s_mem >> 31) & 0x1;
 695         unsigned long exp_msb = (s_mem >> 30) & 0x1;
 696         unsigned long exp_low = (s_mem >> 23) & 0x7f;
 697         unsigned long exp;
 698
 699         exp = (exp_msb << 10) | exp_low;        /* common case */
 700         if (exp_msb) {
 701                 if (exp_low == 0x7f) {
 702                         exp = 0x7ff;
 703                 }
 704         } else {
 705                 if (exp_low == 0x00) {
 706                         exp = 0x000;
 707                 } else {
 708                         exp |= (0x7 << 7);
 709                 }
 710         }
 711         return (sign << 63) | (exp << 52) | (frac << 29);
 712 }
 713
 714 /*
 715  * Convert an s-floating point value in register format to the
 716  * corresponding value in memory format.
 717  */
 718 static inline unsigned long
 719 s_reg_to_mem (unsigned long s_reg)
 720 {
 721         return ((s_reg >> 62) << 30) | ((s_reg << 5) >> 34);
 722 }
 723
 724 /*
 725  * Handle user-level unaligned fault.  Handling user-level unaligned
 726  * faults is *extremely* slow and produces nasty messages.  A user
 727  * program *should* fix unaligned faults ASAP.
 728  *
 729  * Notice that we have (almost) the regular kernel stack layout here,
 730  * so finding the appropriate registers is a little more difficult
 731  * than in the kernel case.
 732  *
 733  * Finally, we handle regular integer load/stores only.  In
 734  * particular, load-linked/store-conditionally and floating point
 735  * load/stores are not supported.  The former make no sense with
 736  * unaligned faults (they are guaranteed to fail) and I don't think
 737  * the latter will occur in any decent program.
 738  *
 739  * Sigh. We *do* have to handle some FP operations, because GCC will
 740  * uses them as temporary storage for integer memory to memory copies.
 741  * However, we need to deal with stt/ldt and sts/lds only.
 742  */
 743
 744 #define OP_INT_MASK     ( 1L << 0x28 | 1L << 0x2c   /* ldl stl */       \
 745                         | 1L << 0x29 | 1L << 0x2d   /* ldq stq */       \
 746                         | 1L << 0x0c | 1L << 0x0d   /* ldwu stw */      \
 747                         | 1L << 0x0a | 1L << 0x0e ) /* ldbu stb */
 748
 749 #define OP_WRITE_MASK   ( 1L << 0x26 | 1L << 0x27   /* sts stt */       \
 750                         | 1L << 0x2c | 1L << 0x2d   /* stl stq */       \
 751                         | 1L << 0x0d | 1L << 0x0e ) /* stw stb */
 752
 753 #define R(x)    ((size_t) &((struct pt_regs *)0)->x)
 754
 755 static int unauser_reg_offsets[32] = {
 756         R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), R(r8),
 757         /* r9 ... r15 are stored in front of regs.  */
 758         -56, -48, -40, -32, -24, -16, -8,
 759         R(r16), R(r17), R(r18),
 760         R(r19), R(r20), R(r21), R(r22), R(r23), R(r24), R(r25), R(r26),
 761         R(r27), R(r28), R(gp),
 762         0, 0
 763 };
 764
 765 #undef R
 766
 767 asmlinkage void
 768 do_entUnaUser(void __user * va, unsigned long opcode,
 769               unsigned long reg, struct pt_regs *regs)
 770 {
 771         static int cnt = 0;
 772         static long last_time = 0;
 773
 774         unsigned long tmp1, tmp2, tmp3, tmp4;
 775         unsigned long fake_reg, *reg_addr = &fake_reg;
 776         siginfo_t info;
 777         long error;
 778
 779         /* Check the UAC bits to decide what the user wants us to do
 780            with the unaliged access.  */
 781
 782         if (!test_thread_flag (TIF_UAC_NOPRINT)) {
 783                 if (cnt >= 5 && jiffies - last_time > 5*HZ) {
 784                         cnt = 0;
 785                 }
 786                 if (++cnt < 5) {
 787                         printk("%s(%d): unaligned trap at %016lx: %p %lx %ld\n",
 788                                current->comm, current->pid,
 789                                regs->pc - 4, va, opcode, reg);
 790                 }
 791                 last_time = jiffies;
 792         }
 793         if (test_thread_flag (TIF_UAC_SIGBUS))
 794                 goto give_sigbus;
 795         /* Not sure why you'd want to use this, but... */
 796         if (test_thread_flag (TIF_UAC_NOFIX))
 797                 return;
 798
 799         /* Don't bother reading ds in the access check since we already
 800            know that this came from the user.  Also rely on the fact that
 801            the page at TASK_SIZE is unmapped and so can't be touched anyway. */
 802         if (!__access_ok((unsigned long)va, 0, USER_DS))
 803                 goto give_sigsegv;
 804
 805         ++unaligned[1].count;
 806         unaligned[1].va = (unsigned long)va;
 807         unaligned[1].pc = regs->pc - 4;
 808
 809         if ((1L << opcode) & OP_INT_MASK) {
 810                 /* it's an integer load/store */
 811                 if (reg < 30) {
 812                         reg_addr = (unsigned long *)
 813                           ((char *)regs + unauser_reg_offsets[reg]);
 814                 } else if (reg == 30) {
 815                         /* usp in PAL regs */
 816                         fake_reg = rdusp();
 817                 } else {
 818                         /* zero "register" */
 819                         fake_reg = 0;
 820                 }
 821         }
 822
 823         /* We don't want to use the generic get/put unaligned macros as
 824            we want to trap exceptions.  Only if we actually get an
 825            exception will we decide whether we should have caught it.  */
 826
 827         switch (opcode) {
 828         case 0x0c: /* ldwu */
 829                 __asm__ __volatile__(
 830                 "1:     ldq_u %1,0(%3)\n"
 831                 "2:     ldq_u %2,1(%3)\n"
 832                 "       extwl %1,%3,%1\n"
 833                 "       extwh %2,%3,%2\n"
 834                 "3:\n"
 835                 ".section __ex_table,\"a\"\n"
 836                 "       .long 1b - .\n"
 837                 "       lda %1,3b-1b(%0)\n"
 838                 "       .long 2b - .\n"
 839                 "       lda %2,3b-2b(%0)\n"
 840                 ".previous"
 841                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 842                         : "r"(va), "0"(0));
 843                 if (error)
 844                         goto give_sigsegv;
 845                 *reg_addr = tmp1|tmp2;
 846                 break;
 847
 848         case 0x22: /* lds */
 849                 __asm__ __volatile__(
 850                 "1:     ldq_u %1,0(%3)\n"
 851                 "2:     ldq_u %2,3(%3)\n"
 852                 "       extll %1,%3,%1\n"
 853                 "       extlh %2,%3,%2\n"
 854                 "3:\n"
 855                 ".section __ex_table,\"a\"\n"
 856                 "       .long 1b - .\n"
 857                 "       lda %1,3b-1b(%0)\n"
 858                 "       .long 2b - .\n"
 859                 "       lda %2,3b-2b(%0)\n"
 860                 ".previous"
 861                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 862                         : "r"(va), "0"(0));
 863                 if (error)
 864                         goto give_sigsegv;
 865                 alpha_write_fp_reg(reg, s_mem_to_reg((int)(tmp1|tmp2)));
 866                 return;
 867
 868         case 0x23: /* ldt */
 869                 __asm__ __volatile__(
 870                 "1:     ldq_u %1,0(%3)\n"
 871                 "2:     ldq_u %2,7(%3)\n"
 872                 "       extql %1,%3,%1\n"
 873                 "       extqh %2,%3,%2\n"
 874                 "3:\n"
 875                 ".section __ex_table,\"a\"\n"
 876                 "       .long 1b - .\n"
 877                 "       lda %1,3b-1b(%0)\n"
 878                 "       .long 2b - .\n"
 879                 "       lda %2,3b-2b(%0)\n"
 880                 ".previous"
 881                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 882                         : "r"(va), "0"(0));
 883                 if (error)
 884                         goto give_sigsegv;
 885                 alpha_write_fp_reg(reg, tmp1|tmp2);
 886                 return;
 887
 888         case 0x28: /* ldl */
 889                 __asm__ __volatile__(
 890                 "1:     ldq_u %1,0(%3)\n"
 891                 "2:     ldq_u %2,3(%3)\n"
 892                 "       extll %1,%3,%1\n"
 893                 "       extlh %2,%3,%2\n"
 894                 "3:\n"
 895                 ".section __ex_table,\"a\"\n"
 896                 "       .long 1b - .\n"
 897                 "       lda %1,3b-1b(%0)\n"
 898                 "       .long 2b - .\n"
 899                 "       lda %2,3b-2b(%0)\n"
 900                 ".previous"
 901                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 902                         : "r"(va), "0"(0));
 903                 if (error)
 904                         goto give_sigsegv;
 905                 *reg_addr = (int)(tmp1|tmp2);
 906                 break;
 907
 908         case 0x29: /* ldq */
 909                 __asm__ __volatile__(
 910                 "1:     ldq_u %1,0(%3)\n"
 911                 "2:     ldq_u %2,7(%3)\n"
 912                 "       extql %1,%3,%1\n"
 913                 "       extqh %2,%3,%2\n"
 914                 "3:\n"
 915                 ".section __ex_table,\"a\"\n"
 916                 "       .long 1b - .\n"
 917                 "       lda %1,3b-1b(%0)\n"
 918                 "       .long 2b - .\n"
 919                 "       lda %2,3b-2b(%0)\n"
 920                 ".previous"
 921                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 922                         : "r"(va), "0"(0));
 923                 if (error)
 924                         goto give_sigsegv;
 925                 *reg_addr = tmp1|tmp2;
 926                 break;
 927
 928         /* Note that the store sequences do not indicate that they change
 929            memory because it _should_ be affecting nothing in this context.
 930            (Otherwise we have other, much larger, problems.)  */
 931         case 0x0d: /* stw */
 932                 __asm__ __volatile__(
 933                 "1:     ldq_u %2,1(%5)\n"
 934                 "2:     ldq_u %1,0(%5)\n"
 935                 "       inswh %6,%5,%4\n"
 936                 "       inswl %6,%5,%3\n"
 937                 "       mskwh %2,%5,%2\n"
 938                 "       mskwl %1,%5,%1\n"
 939                 "       or %2,%4,%2\n"
 940                 "       or %1,%3,%1\n"
 941                 "3:     stq_u %2,1(%5)\n"
 942                 "4:     stq_u %1,0(%5)\n"
 943                 "5:\n"
 944                 ".section __ex_table,\"a\"\n"
 945                 "       .long 1b - .\n"
 946                 "       lda %2,5b-1b(%0)\n"
 947                 "       .long 2b - .\n"
 948                 "       lda %1,5b-2b(%0)\n"
 949                 "       .long 3b - .\n"
 950                 "       lda $31,5b-3b(%0)\n"
 951                 "       .long 4b - .\n"
 952                 "       lda $31,5b-4b(%0)\n"
 953                 ".previous"
 954                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
 955                           "=&r"(tmp3), "=&r"(tmp4)
 956                         : "r"(va), "r"(*reg_addr), "0"(0));
 957                 if (error)
 958                         goto give_sigsegv;
 959                 return;
 960
 961         case 0x26: /* sts */
 962                 fake_reg = s_reg_to_mem(alpha_read_fp_reg(reg));
 963                 /* FALLTHRU */
 964
 965         case 0x2c: /* stl */
 966                 __asm__ __volatile__(
 967                 "1:     ldq_u %2,3(%5)\n"
 968                 "2:     ldq_u %1,0(%5)\n"
 969                 "       inslh %6,%5,%4\n"
 970                 "       insll %6,%5,%3\n"
 971                 "       msklh %2,%5,%2\n"
 972                 "       mskll %1,%5,%1\n"
 973                 "       or %2,%4,%2\n"
 974                 "       or %1,%3,%1\n"
 975                 "3:     stq_u %2,3(%5)\n"
 976                 "4:     stq_u %1,0(%5)\n"
 977                 "5:\n"
 978                 ".section __ex_table,\"a\"\n"
 979                 "       .long 1b - .\n"
 980                 "       lda %2,5b-1b(%0)\n"
 981                 "       .long 2b - .\n"
 982                 "       lda %1,5b-2b(%0)\n"
 983                 "       .long 3b - .\n"
 984                 "       lda $31,5b-3b(%0)\n"
 985                 "       .long 4b - .\n"
 986                 "       lda $31,5b-4b(%0)\n"
 987                 ".previous"
 988                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
 989                           "=&r"(tmp3), "=&r"(tmp4)
 990                         : "r"(va), "r"(*reg_addr), "0"(0));
 991                 if (error)
 992                         goto give_sigsegv;
 993                 return;
 994
 995         case 0x27: /* stt */
 996                 fake_reg = alpha_read_fp_reg(reg);
 997                 /* FALLTHRU */
 998
 999         case 0x2d: /* stq */
1000                 __asm__ __volatile__(
1001                 "1:     ldq_u %2,7(%5)\n"
1002                 "2:     ldq_u %1,0(%5)\n"
1003                 "       insqh %6,%5,%4\n"
1004                 "       insql %6,%5,%3\n"
1005                 "       mskqh %2,%5,%2\n"
1006                 "       mskql %1,%5,%1\n"
1007                 "       or %2,%4,%2\n"
1008                 "       or %1,%3,%1\n"
1009                 "3:     stq_u %2,7(%5)\n"
1010                 "4:     stq_u %1,0(%5)\n"
1011                 "5:\n"
1012                 ".section __ex_table,\"a\"\n\t"
1013                 "       .long 1b - .\n"
1014                 "       lda %2,5b-1b(%0)\n"
1015                 "       .long 2b - .\n"
1016                 "       lda %1,5b-2b(%0)\n"
1017                 "       .long 3b - .\n"
1018                 "       lda $31,5b-3b(%0)\n"
1019                 "       .long 4b - .\n"
1020                 "       lda $31,5b-4b(%0)\n"
1021                 ".previous"
1022                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
1023                           "=&r"(tmp3), "=&r"(tmp4)
1024                         : "r"(va), "r"(*reg_addr), "0"(0));
1025                 if (error)
1026                         goto give_sigsegv;
1027                 return;
1028
1029         default:
1030                 /* What instruction were you trying to use, exactly?  */
1031                 goto give_sigbus;
1032         }
1033
1034         /* Only integer loads should get here; everyone else returns early. */
1035         if (reg == 30)
1036                 wrusp(fake_reg);
1037         return;
1038
1039 give_sigsegv:
1040         regs->pc -= 4;  /* make pc point to faulting insn */
1041         info.si_signo = SIGSEGV;
1042         info.si_errno = 0;
1043
1044         /* We need to replicate some of the logic in mm/fault.c,
1045            since we don't have access to the fault code in the
1046            exception handling return path.  */
1047         if (!__access_ok((unsigned long)va, 0, USER_DS))
1048                 info.si_code = SEGV_ACCERR;
1049         else {
1050                 struct mm_struct *mm = current->mm;
1051                 down_read(&mm->mmap_sem);
1052                 if (find_vma(mm, (unsigned long)va))
1053                         info.si_code = SEGV_ACCERR;
1054                 else
1055                         info.si_code = SEGV_MAPERR;
1056                 up_read(&mm->mmap_sem);
1057         }
1058         info.si_addr = va;
1059         send_sig_info(SIGSEGV, &info, current);
1060         return;
1061
1062 give_sigbus:
1063         regs->pc -= 4;
1064         info.si_signo = SIGBUS;
1065         info.si_errno = 0;
1066         info.si_code = BUS_ADRALN;
1067         info.si_addr = va;
1068         send_sig_info(SIGBUS, &info, current);
1069         return;
1070 }
1071
1072 void __init
1073 trap_init(void)
1074 {
1075         /* Tell PAL-code what global pointer we want in the kernel.  */
1076         register unsigned long gptr __asm__("$29");
1077         wrkgp(gptr);
1078
1079         /* Hack for Multia (UDB) and JENSEN: some of their SRMs have
1080            a bug in the handling of the opDEC fault.  Fix it up if so.  */
1081         if (implver() == IMPLVER_EV4)
1082                 opDEC_check();
1083
1084         wrent(entArith, 1);
1085         wrent(entMM, 2);
1086         wrent(entIF, 3);
1087         wrent(entUna, 4);
1088         wrent(entSys, 5);
1089         wrent(entDbg, 6);
1090 }