arch/arm/kernel/debug.S

   1 /*
   2  *  linux/arch/arm/kernel/debug-armv.S
   3  *
   4  *  Copyright (C) 1994-1999 Russell King
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  *  32-bit debugging code
  11  */
  12 #include <linux/config.h>
  13 #include <linux/linkage.h>
  14 #include <asm/hardware.h>
  15
  16                 .text
  17
  18 /*
  19  * Some debugging routines (useful if you've got MM problems and
  20  * printk isn't working).  For DEBUGGING ONLY!!!  Do not leave
  21  * references to these in a production kernel!
  22  */
  23 #if defined(CONFIG_ARCH_RPC)
  24                 .macro  addruart,rx
  25                 mov     \rx, #0xe0000000
  26                 orr     \rx, \rx, #0x00010000
  27                 orr     \rx, \rx, #0x00000fe0
  28                 .endm
  29
  30                 .macro  senduart,rd,rx
  31                 strb    \rd, [\rx]
  32                 .endm
  33
  34                 .macro  busyuart,rd,rx
  35 1001:           ldrb    \rd, [\rx, #0x14]
  36                 and     \rd, \rd, #0x60
  37                 teq     \rd, #0x60
  38                 bne     1001b
  39                 .endm
  40
  41                 .macro  waituart,rd,rx
  42 1001:           ldrb    \rd, [\rx, #0x18]
  43                 tst     \rd, #0x10
  44                 beq     1001b
  45                 .endm
  46
  47 #elif defined(CONFIG_DEBUG_ICEDCC)
  48                 @@ debug using ARM EmbeddedICE DCC channel
  49                 .macro  addruart, rx
  50                 .endm
  51
  52                 .macro  senduart, rd, rx
  53                 mcr     p14, 0, \rd, c1, c0, 0
  54                 .endm
  55
  56                 .macro  busyuart, rd, rx
  57 1001:
  58                 mrc     p14, 0, \rx, c0, c0, 0
  59                 tst     \rx, #2
  60                 beq     1001b
  61
  62                 .endm
  63
  64                 .macro  waituart, rd, rx
  65                 mov     \rd, #0x2000000
  66 1001:
  67                 subs    \rd, \rd, #1
  68                 bmi     1002f
  69                 mrc     p14, 0, \rx, c0, c0, 0
  70                 tst     \rx, #2
  71                 bne     1001b
  72 1002:
  73                 .endm
  74
  75 #elif defined(CONFIG_ARCH_EBSA110)
  76                 .macro  addruart,rx
  77                 mov     \rx, #0xf0000000
  78                 orr     \rx, \rx, #0x00000be0
  79                 .endm
  80
  81                 .macro  senduart,rd,rx
  82                 strb    \rd, [\rx]
  83                 .endm
  84
  85                 .macro  busyuart,rd,rx
  86 1002:           ldrb    \rd, [\rx, #0x14]
  87                 and     \rd, \rd, #0x60
  88                 teq     \rd, #0x60
  89                 bne     1002b
  90                 .endm
  91
  92                 .macro  waituart,rd,rx
  93 1001:           ldrb    \rd, [\rx, #0x18]
  94                 tst     \rd, #0x10
  95                 beq     1001b
  96                 .endm
  97
  98 #elif defined(CONFIG_ARCH_SHARK)
  99                 .macro  addruart,rx
 100                 mov     \rx, #0xe0000000
 101                 orr     \rx, \rx, #0x000003f8
 102                 .endm
 103
 104                 .macro  senduart,rd,rx
 105                 strb    \rd, [\rx]
 106                 .endm
 107
 108                 .macro  busyuart,rd,rx
 109                 mov     \rd, #0
 110 1001:           add     \rd, \rd, #1
 111                 teq     \rd, #0x10000
 112                 bne     1001b
 113                 .endm
 114
 115                 .macro  waituart,rd,rx
 116                 .endm
 117
 118 #elif defined(CONFIG_FOOTBRIDGE)
 119
 120 #include <asm/hardware/dec21285.h>
 121
 122 #ifndef CONFIG_DEBUG_DC21285_PORT
 123         /* For NetWinder debugging */
 124                 .macro  addruart,rx
 125                 mrc     p15, 0, \rx, c1, c0
 126                 tst     \rx, #1                 @ MMU enabled?
 127                 moveq   \rx, #0x7c000000        @ physical
 128                 movne   \rx, #0xff000000        @ virtual
 129                 orr     \rx, \rx, #0x000003f8
 130                 .endm
 131
 132                 .macro  senduart,rd,rx
 133                 strb    \rd, [\rx]
 134                 .endm
 135
 136                 .macro  busyuart,rd,rx
 137 1002:           ldrb    \rd, [\rx, #0x5]
 138                 and     \rd, \rd, #0x60
 139                 teq     \rd, #0x60
 140                 bne     1002b
 141                 .endm
 142
 143                 .macro  waituart,rd,rx
 144 1001:           ldrb    \rd, [\rx, #0x6]
 145                 tst     \rd, #0x10
 146                 beq     1001b
 147                 .endm
 148 #else
 149         /* For EBSA285 debugging */
 150                 .equ    dc21285_high, ARMCSR_BASE & 0xff000000
 151                 .equ    dc21285_low,  ARMCSR_BASE & 0x00ffffff
 152
 153                 .macro  addruart,rx
 154                 mov     \rx, #dc21285_high
 155                 .if     dc21285_low
 156                 orr     \rx, \rx, #dc21285_low
 157                 .endif
 158                 .endm
 159
 160                 .macro  senduart,rd,rx
 161                 str     \rd, [\rx, #0x160]      @ UARTDR
 162                 .endm
 163
 164                 .macro  busyuart,rd,rx
 165 1001:           ldr     \rd, [\rx, #0x178]      @ UARTFLG
 166                 tst     \rd, #1 << 3
 167                 bne     1001b
 168                 .endm
 169
 170                 .macro  waituart,rd,rx
 171                 .endm
 172 #endif
 173 #elif defined(CONFIG_ARCH_FTVPCI)
 174                 .macro  addruart,rx
 175                 mrc     p15, 0, \rx, c1, c0
 176                 tst     \rx, #1                 @ MMU enabled?
 177                 movne   \rx, #0xe0000000
 178                 moveq   \rx, #0x10000000
 179                 .endm
 180
 181                 .macro  senduart,rd,rx
 182                 str     \rd, [\rx, #0xc]
 183                 .endm
 184
 185                 .macro  busyuart,rd,rx
 186 1001:           ldr     \rd, [\rx, #0x4]
 187                 tst     \rd, #1 << 2
 188                 beq     1001b
 189                 .endm
 190
 191                 .macro  waituart,rd,rx
 192                 .endm
 193
 194 #elif defined(CONFIG_ARCH_SA1100)
 195
 196                 .macro  addruart,rx
 197                 mrc     p15, 0, \rx, c1, c0
 198                 tst     \rx, #1                 @ MMU enabled?
 199                 moveq   \rx, #0x80000000        @ physical base address
 200                 movne   \rx, #0xf8000000        @ virtual address
 201
 202                 @ We probe for the active serial port here, coherently with
 203                 @ the comment in include/asm-arm/arch-sa1100/uncompress.h.
 204                 @ We assume r1 can be clobbered.
 205
 206                 @ see if Ser3 is active
 207                 add     \rx, \rx, #0x00050000
 208                 ldr     r1, [\rx, #UTCR3]
 209                 tst     r1, #UTCR3_TXE
 210
 211                 @ if Ser3 is inactive, then try Ser1
 212                 addeq   \rx, \rx, #(0x00010000 - 0x00050000)
 213                 ldreq   r1, [\rx, #UTCR3]
 214                 tsteq   r1, #UTCR3_TXE
 215
 216                 @ if Ser1 is inactive, then try Ser2
 217                 addeq   \rx, \rx, #(0x00030000 - 0x00010000)
 218                 ldreq   r1, [\rx, #UTCR3]
 219                 tsteq   r1, #UTCR3_TXE
 220
 221                 @ if all ports are inactive, then there is nothing we can do
 222                 moveq   pc, lr
 223                 .endm
 224
 225                 .macro  senduart,rd,rx
 226                 str     \rd, [\rx, #UTDR]
 227                 .endm
 228
 229                 .macro  waituart,rd,rx
 230 1001:           ldr     \rd, [\rx, #UTSR1]
 231                 tst     \rd, #UTSR1_TNF
 232                 beq     1001b
 233                 .endm
 234
 235                 .macro  busyuart,rd,rx
 236 1001:           ldr     \rd, [\rx, #UTSR1]
 237                 tst     \rd, #UTSR1_TBY
 238                 bne     1001b
 239                 .endm
 240
 241 #elif defined(CONFIG_ARCH_PXA)
 242
 243                 .macro  addruart,rx
 244                 mrc     p15, 0, \rx, c1, c0
 245                 tst     \rx, #1                 @ MMU enabled?
 246                 moveq   \rx, #0x40000000                @ physical
 247                 movne   \rx, #io_p2v(0x40000000)        @ virtual
 248                 orr     \rx, \rx, #0x00100000
 249                 .endm
 250
 251                 .macro  senduart,rd,rx
 252                 str     \rd, [\rx, #0]
 253                 .endm
 254
 255                 .macro  busyuart,rd,rx
 256 1002:           ldr     \rd, [\rx, #0x14]
 257                 tst     \rd, #(1 << 6)
 258                 beq     1002b
 259                 .endm
 260
 261                 .macro  waituart,rd,rx
 262 1001:           ldr     \rd, [\rx, #0x14]
 263                 tst     \rd, #(1 << 5)
 264                 beq     1001b
 265                 .endm
 266 #elif defined(CONFIG_ARCH_CLPS7500)
 267                 .macro  addruart,rx
 268                 mov     \rx, #0xe0000000
 269                 orr     \rx, \rx, #0x00010000
 270                 orr     \rx, \rx, #0x00000be0
 271                 .endm
 272
 273                 .macro  senduart,rd,rx
 274                 strb    \rd, [\rx]
 275                 .endm
 276
 277                 .macro  busyuart,rd,rx
 278                 .endm
 279
 280                 .macro  waituart,rd,rx
 281 1001:           ldrb    \rd, [\rx, #0x14]
 282                 tst     \rd, #0x20
 283                 beq     1001b
 284                 .endm
 285
 286 #elif defined(CONFIG_ARCH_L7200)
 287
 288                 .equ    io_virt, IO_BASE
 289                 .equ    io_phys, IO_START
 290
 291                 .macro  addruart,rx
 292                 mrc     p15, 0, \rx, c1, c0
 293                 tst     \rx, #1                 @ MMU enabled?
 294                 moveq   \rx, #io_phys           @ physical base address
 295                 movne   \rx, #io_virt           @ virtual address
 296                 add     \rx, \rx, #0x00044000   @ UART1
 297 @               add     \rx, \rx, #0x00045000   @ UART2
 298                 .endm
 299
 300                 .macro  senduart,rd,rx
 301                 str     \rd, [\rx, #0x0]        @ UARTDR
 302                 .endm
 303
 304                 .macro  waituart,rd,rx
 305 1001:           ldr     \rd, [\rx, #0x18]       @ UARTFLG
 306                 tst     \rd, #1 << 5            @ UARTFLGUTXFF - 1 when full
 307                 bne     1001b
 308                 .endm
 309
 310                 .macro  busyuart,rd,rx
 311 1001:           ldr     \rd, [\rx, #0x18]       @ UARTFLG
 312                 tst     \rd, #1 << 3            @ UARTFLGUBUSY - 1 when busy
 313                 bne     1001b
 314                 .endm
 315
 316 #elif defined(CONFIG_ARCH_INTEGRATOR)
 317
 318 #include <asm/hardware/amba_serial.h>
 319
 320                 .macro  addruart,rx
 321                 mrc     p15, 0, \rx, c1, c0
 322                 tst     \rx, #1                 @ MMU enabled?
 323                 moveq   \rx, #0x16000000        @ physical base address
 324                 movne   \rx, #0xf0000000        @ virtual base
 325                 addne   \rx, \rx, #0x16000000 >> 4
 326                 .endm
 327
 328                 .macro  senduart,rd,rx
 329                 strb    \rd, [\rx, #UART01x_DR]
 330                 .endm
 331
 332                 .macro  waituart,rd,rx
 333 1001:           ldr     \rd, [\rx, #0x18]       @ UARTFLG
 334                 tst     \rd, #1 << 5            @ UARTFLGUTXFF - 1 when full
 335                 bne     1001b
 336                 .endm
 337
 338                 .macro  busyuart,rd,rx
 339 1001:           ldr     \rd, [\rx, #0x18]       @ UARTFLG
 340                 tst     \rd, #1 << 3            @ UARTFLGUBUSY - 1 when busy
 341                 bne     1001b
 342                 .endm
 343
 344 #elif defined(CONFIG_ARCH_CLPS711X)
 345
 346 #include <asm/hardware/clps7111.h>
 347
 348                 .macro  addruart,rx
 349                 mrc     p15, 0, \rx, c1, c0
 350                 tst     \rx, #1                 @ MMU enabled?
 351                 moveq   \rx, #CLPS7111_PHYS_BASE
 352                 movne   \rx, #CLPS7111_VIRT_BASE
 353 #ifndef CONFIG_DEBUG_CLPS711X_UART2
 354                 add     \rx, \rx, #0x0000       @ UART1
 355 #else
 356                 add     \rx, \rx, #0x1000       @ UART2
 357 #endif
 358                 .endm
 359
 360                 .macro  senduart,rd,rx
 361                 str     \rd, [\rx, #0x0480]     @ UARTDR
 362                 .endm
 363
 364                 .macro  waituart,rd,rx
 365 1001:           ldr     \rd, [\rx, #0x0140]     @ SYSFLGx
 366                 tst     \rd, #1 << 11           @ UBUSYx
 367                 bne     1001b
 368                 .endm
 369
 370                 .macro  busyuart,rd,rx
 371                 tst     \rx, #0x1000            @ UART2 does not have CTS here
 372                 bne     1002f
 373 1001:           ldr     \rd, [\rx, #0x0140]     @ SYSFLGx
 374                 tst     \rd, #1 << 8            @ CTS
 375                 bne     1001b
 376 1002:
 377                 .endm
 378
 379 #elif defined(CONFIG_ARCH_CAMELOT)
 380
 381 #include <asm/arch/excalibur.h>
 382 #define UART00_TYPE
 383 #include <asm/arch/uart00.h>
 384
 385                 .macro  addruart,rx
 386                 mrc     p15, 0, \rx, c1, c0
 387                 tst     \rx, #1                 @ MMU enabled?
 388                 ldr     \rx, =EXC_UART00_BASE   @ physical base address
 389                 orrne   \rx, \rx, #0xff000000   @ virtual base
 390                 orrne   \rx, \rx, #0x00f00000
 391                 .endm
 392
 393                 .macro  senduart,rd,rx
 394                 str     \rd, [\rx, #UART_TD(0)]
 395                 .endm
 396
 397                 .macro  waituart,rd,rx
 398 1001:           ldr     \rd, [\rx, #UART_TSR(0)]
 399                 and     \rd, \rd,  #UART_TSR_TX_LEVEL_MSK
 400                 cmp     \rd, #15
 401                 beq     1001b
 402                 .endm
 403
 404                 .macro  busyuart,rd,rx
 405 1001:           ldr     \rd, [\rx, #UART_TSR(0)]
 406                 ands    \rd, \rd,  #UART_TSR_TX_LEVEL_MSK
 407                 bne     1001b
 408                 .endm
 409
 410 #elif defined(CONFIG_ARCH_IOP3XX)
 411
 412                 .macro  addruart,rx
 413                 mov     \rx, #0xfe000000        @ physical
 414 #ifdef CONFIG_ARCH_IQ80310
 415                 orr     \rx, \rx, #0x00810000   @ location of the UART
 416 #elif defined(CONFIG_ARCH_IQ80321)
 417                 orr     \rx, \rx, #0x00800000   @ location of the UART
 418 #else
 419 #error Unknown IOP3XX implementation
 420 #endif
 421                 .endm
 422
 423                 .macro  senduart,rd,rx
 424                 strb    \rd, [\rx]
 425                 .endm
 426
 427                 .macro  busyuart,rd,rx
 428 1002:           ldrb    \rd, [\rx, #0x5]
 429                 and     \rd, \rd, #0x60
 430                 teq     \rd, #0x60
 431                 bne     1002b
 432                 .endm
 433
 434                 .macro  waituart,rd,rx
 435 #ifndef CONFIG_ARCH_IQ80321
 436 1001:           ldrb    \rd, [\rx, #0x6]
 437                 tst     \rd, #0x10
 438                 beq     1001b
 439 #endif
 440                 .endm
 441
 442 #elif defined(CONFIG_ARCH_ADI_EVB)
 443
 444                 .macro  addruart,rx
 445                 mrc     p15, 0, \rx, c1, c0
 446                 tst     \rx, #1                 @ MMU enabled?
 447                 mov     \rx, #0x00400000        @ physical base address
 448                 orrne   \rx, \rx, #0xff000000   @ virtual base
 449                 .endm
 450
 451                 .macro  senduart,rd,rx
 452                 strb    \rd, [\rx]
 453                 .endm
 454
 455                 .macro  busyuart,rd,rx
 456 1002:           ldrb    \rd, [\rx, #0x5]
 457                 and     \rd, \rd, #0x60
 458                 teq     \rd, #0x60
 459                 bne     1002b
 460                 .endm
 461
 462                 .macro  waituart,rd,rx
 463 1001:           ldrb    \rd, [\rx, #0x6]
 464                 tst     \rd, #0x10
 465                 beq     1001b
 466                 .endm
 467
 468 #elif defined(CONFIG_ARCH_IXP4XX)
 469
 470                 .macro  addruart,rx
 471                 mrc     p15, 0, \rx, c1, c0
 472                 tst     \rx, #1                 @ MMU enabled?
 473                 moveq   \rx, #0xc8000000
 474                 movne   \rx, #0xff000000
 475                 add     \rx,\rx,#3              @ Uart regs are at off set of 3 if
 476                                                 @ byte writes used - Big Endian.
 477                 .endm
 478
 479                .macro  senduart,rd,rx
 480                 strb    \rd, [\rx]
 481                 .endm
 482
 483                 .macro  waituart,rd,rx
 484 1002:           ldrb    \rd, [\rx, #0x14]
 485                 and     \rd, \rd, #0x60         @ check THRE and TEMT bits
 486                 teq     \rd, #0x60
 487                 bne     1002b
 488                 .endm
 489
 490                 .macro  busyuart,rd,rx
 491                 .endm
 492
 493 #elif defined(CONFIG_ARCH_OMAP)
 494
 495                 .macro  addruart,rx
 496                 mrc     p15, 0, \rx, c1, c0
 497                 tst     \rx, #1                 @ MMU enabled?
 498                 moveq   \rx, #0xff000000        @ physical base address
 499                 movne   \rx, #0xfe000000        @ virtual base
 500                 orr     \rx, \rx, #0x00fb0000
 501 #ifdef CONFIG_OMAP_LL_DEBUG_UART3
 502                 orr     \rx, \rx, #0x00009000   @ UART 3
 503 #endif
 504 #if defined(CONFIG_OMAP_LL_DEBUG_UART2) || defined(CONFIG_OMAP_LL_DEBUG_UART3)
 505                 orr     \rx, \rx, #0x00000800   @ UART 2 & 3
 506 #endif
 507                 .endm
 508
 509                 .macro  senduart,rd,rx
 510                 strb    \rd, [\rx]
 511                 .endm
 512
 513                 .macro  busyuart,rd,rx
 514 1001:           ldrb    \rd, [\rx, #(0x5 << 2)] @ OMAP-1510 and friends
 515                 and     \rd, \rd, #0x60
 516                 teq     \rd, #0x60
 517                 beq     1002f
 518                 ldrb    \rd, [\rx, #(0x5 << 0)] @ OMAP-730 only
 519                 and     \rd, \rd, #0x60
 520                 teq     \rd, #0x60
 521                 bne     1001b
 522 1002:
 523                 .endm
 524
 525                 .macro  waituart,rd,rx
 526                 .endm
 527
 528 #elif defined(CONFIG_ARCH_S3C2410)
 529 #include <asm/arch/map.h>
 530 #include <asm/arch/regs-serial.h>
 531
 532                 .macro addruart, rx
 533                 mrc     p15, 0, \rx, c1, c0
 534                 tst     \rx, #1
 535                 ldreq   \rx, = S3C2410_PA_UART
 536                 ldrne   \rx, = S3C2410_VA_UART
 537 #if CONFIG_DEBUG_S3C2410_UART != 0
 538                 add     \rx, \rx, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C2410_UART)
 539 #endif
 540                 .endm
 541
 542                 .macro  senduart,rd,rx
 543                 str     \rd, [\rx, # S3C2410_UTXH ]
 544                 .endm
 545
 546                 .macro  busyuart, rd, rx
 547                 ldr     \rd, [ \rx, # S3C2410_UFCON ]
 548                 tst     \rd, #S3C2410_UFCON_FIFOMODE    @ fifo enabled?
 549                 beq     1001f                           @
 550                 @ FIFO enabled...
 551 1003:
 552                 ldr     \rd, [ \rx, # S3C2410_UFSTAT ]
 553                 tst     \rd, #S3C2410_UFSTAT_TXFULL
 554                 bne     1003b
 555                 b       1002f
 556
 557 1001:
 558                 @ busy waiting for non fifo
 559                 ldr     \rd, [ \rx, # S3C2410_UTRSTAT ]
 560                 tst     \rd, #S3C2410_UTRSTAT_TXFE
 561                 beq     1001b
 562
 563 1002:           @ exit busyuart
 564                 .endm
 565
 566                 .macro  waituart,rd,rx
 567
 568                 ldr     \rd, [ \rx, # S3C2410_UFCON ]
 569                 tst     \rd, #S3C2410_UFCON_FIFOMODE    @ fifo enabled?
 570                 beq     1001f                           @
 571                 @ FIFO enabled...
 572 1003:
 573                 ldr     \rd, [ \rx, # S3C2410_UFSTAT ]
 574                 ands    \rd, \rd, #15<<S3C2410_UFSTAT_TXSHIFT
 575                 bne     1003b
 576                 b       1002f
 577
 578 1001:
 579                 @ idle waiting for non fifo
 580                 ldr     \rd, [ \rx, # S3C2410_UTRSTAT ]
 581                 tst     \rd, #S3C2410_UTRSTAT_TXFE
 582                 beq     1001b
 583
 584 1002:           @ exit busyuart
 585                 .endm
 586
 587 #elif defined(CONFIG_ARCH_LH7A40X)
 588         @ It is not known if this will be appropriate for every 40x
 589         @ board.
 590
 591                 .macro  addruart,rx
 592                 mrc     p15, 0, \rx, c1, c0
 593                 tst     \rx, #1                 @ MMU enabled?
 594                 ldr     \rx, =0x80000700        @ physical base address
 595                 orrne   \rx, \rx, #0xf8000000   @ virtual base
 596                 .endm
 597
 598                 .macro  senduart,rd,rx
 599                 strb    \rd, [\rx]              @ DATA
 600                 .endm
 601
 602                 .macro  busyuart,rd,rx          @ spin while busy
 603 1001:           ldr     \rd, [\rx, #0x10]       @ STATUS
 604                 tst     \rd, #1 << 3            @ BUSY (TX FIFO not empty)
 605                 bne     1001b                   @ yes, spin
 606                 .endm
 607
 608                 .macro  waituart,rd,rx          @ wait for Tx FIFO room
 609 1001:           ldrb    \rd, [\rx, #0x10]       @ STATUS
 610                 tst     \rd, #1 << 5            @ TXFF (TX FIFO full)
 611                 bne     1001b                   @ yes, spin
 612                 .endm
 613
 614
 615 #elif defined(CONFIG_ARCH_VERSATILE_PB)
 616
 617 #include <asm/hardware/amba_serial.h>
 618
 619                 .macro  addruart,rx
 620                 mrc     p15, 0, \rx, c1, c0
 621                 tst     \rx, #1                 @ MMU enabled?
 622                 moveq   \rx,      #0x10000000
 623                 movne   \rx,      #0xf1000000   @ virtual base
 624                 orr     \rx, \rx, #0x001F0000
 625                 orr     \rx, \rx, #0x00001000
 626                 .endm
 627
 628                 .macro  senduart,rd,rx
 629                 strb    \rd, [\rx, #UART01x_DR]
 630                 .endm
 631
 632                 .macro  waituart,rd,rx
 633 1001:           ldr     \rd, [\rx, #0x18]       @ UARTFLG
 634                 tst     \rd, #1 << 5            @ UARTFLGUTXFF - 1 when full
 635                 bne     1001b
 636                 .endm
 637
 638                 .macro  busyuart,rd,rx
 639 1001:           ldr     \rd, [\rx, #0x18]       @ UARTFLG
 640                 tst     \rd, #1 << 3            @ UARTFLGUBUSY - 1 when busy
 641                 bne     1001b
 642                 .endm
 643 #else
 644 #error Unknown architecture
 645 #endif
 646
 647 /*
 648  * Useful debugging routines
 649  */
 650 ENTRY(printhex8)
 651                 mov     r1, #8
 652                 b       printhex
 653
 654 ENTRY(printhex4)
 655                 mov     r1, #4
 656                 b       printhex
 657
 658 ENTRY(printhex2)
 659                 mov     r1, #2
 660 printhex:       adr     r2, hexbuf
 661                 add     r3, r2, r1
 662                 mov     r1, #0
 663                 strb    r1, [r3]
 664 1:              and     r1, r0, #15
 665                 mov     r0, r0, lsr #4
 666                 cmp     r1, #10
 667                 addlt   r1, r1, #'0'
 668                 addge   r1, r1, #'a' - 10
 669                 strb    r1, [r3, #-1]!
 670                 teq     r3, r2
 671                 bne     1b
 672                 mov     r0, r2
 673                 b       printascii
 674
 675                 .ltorg
 676
 677 ENTRY(printascii)
 678                 addruart r3
 679                 b       2f
 680 1:              waituart r2, r3
 681                 senduart r1, r3
 682                 busyuart r2, r3
 683                 teq     r1, #'\n'
 684                 moveq   r1, #'\r'
 685                 beq     1b
 686 2:              teq     r0, #0
 687                 ldrneb  r1, [r0], #1
 688                 teqne   r1, #0
 689                 bne     1b
 690                 mov     pc, lr
 691
 692 ENTRY(printch)
 693                 addruart r3
 694                 mov     r1, r0
 695                 mov     r0, #0
 696                 b       1b
 697
 698 hexbuf:         .space 16