2 * arch/arm/mach-iop3xx/iq80321-pci.c
4 * PCI support for the Intel IQ80321 reference board
6 * Author: Rory Bolt <rorybolt@pacbell.net>
7 * Copyright (C) 2002 Rory Bolt
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/pci.h>
15 #include <linux/init.h>
17 #include <asm/hardware.h>
19 #include <asm/mach/pci.h>
20 #include <asm/mach-types.h>
23 * The following macro is used to lookup irqs in a standard table
24 * format for those systems that do not already have PCI
25 * interrupts properly routed. We assume 1 <= pin <= 4
27 #define PCI_IRQ_TABLE_LOOKUP(minid,maxid) \
29 unsigned int _idsel = idsel - minid; \
30 if (_idsel <= maxid) \
31 _ctl_ = pci_irq_table[_idsel][pin-1]; \
34 #define INTA IRQ_IQ80321_INTA
35 #define INTB IRQ_IQ80321_INTB
36 #define INTC IRQ_IQ80321_INTC
37 #define INTD IRQ_IQ80321_INTD
39 #define INTE IRQ_IQ80321_I82544
41 static inline int __init
42 iq80321_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
44 static int pci_irq_table[][4] = {
46 * PCI IDSEL/INTPIN->INTLINE
49 {INTE, INTE, INTE, INTE}, /* Gig-E */
50 {-1, -1, -1, -1}, /* Unused */
51 {INTC, INTD, INTA, INTB}, /* PCI-X Slot */
55 BUG_ON(pin < 1 || pin > 4);
57 // return PCI_IRQ_TABLE_LOOKUP(4, 7);
58 return pci_irq_table[idsel%4][pin-1];
61 static int iq80321_setup(int nr, struct pci_sys_data *sys)
68 res = kmalloc(sizeof(struct resource) * 2, GFP_KERNEL);
70 panic("PCI: unable to alloc resources");
72 memset(res, 0, sizeof(struct resource) * 2);
74 res[0].start = IQ80321_PCI_IO_BASE + IQ80321_PCI_IO_OFFSET;
75 res[0].end = IQ80321_PCI_IO_BASE + IQ80321_PCI_IO_SIZE - 1 + IQ80321_PCI_IO_OFFSET;
76 res[0].name = "IQ80321 PCI I/O Space";
77 res[0].flags = IORESOURCE_IO;
79 res[1].start = IQ80321_PCI_MEM_BASE;
80 res[1].end = IQ80321_PCI_MEM_BASE + IQ80321_PCI_MEM_SIZE;
81 res[1].name = "IQ80321 PCI Memory Space";
82 res[1].flags = IORESOURCE_MEM;
84 request_resource(&ioport_resource, &res[0]);
85 request_resource(&iomem_resource, &res[1]);
88 * Since the IQ80321 is a slave card on a PCI backplane,
89 * it uses BAR1 to reserve a portion of PCI memory space for
90 * use with the private devices on the secondary bus
91 * (GigE and PCI-X slot). We read BAR1 and configure
92 * our outbound translation windows to target that
93 * address range and assign all devices in that
94 * address range. W/O this, certain BIOSes will fail
95 * to boot as the IQ80321 claims addresses that are
96 * in use by other devices.
98 * Note that the same cannot be done with I/O space,
99 * so hopefully the host will stick to the lower 64K for
100 * PCI I/O and leave us alone.
102 sys->mem_offset = IQ80321_PCI_MEM_BASE -
103 (*IOP321_IABAR1 & PCI_BASE_ADDRESS_MEM_MASK);
105 sys->resource[0] = &res[0];
106 sys->resource[1] = &res[1];
107 sys->resource[2] = NULL;
108 sys->io_offset = IQ80321_PCI_IO_OFFSET;
110 iop3xx_pcibios_min_io = IQ80321_PCI_IO_BASE;
111 iop3xx_pcibios_min_mem = IQ80321_PCI_MEM_BASE;
116 static void iq80321_preinit(void)
121 static struct hw_pci iq80321_pci __initdata = {
122 .swizzle = pci_std_swizzle,
124 .setup = iq80321_setup,
125 .scan = iop321_scan_bus,
126 .preinit = iq80321_preinit,
127 .map_irq = iq80321_map_irq
130 static int __init iq80321_pci_init(void)
132 if (machine_is_iq80321())
133 pci_common_init(&iq80321_pci);
137 subsys_initcall(iq80321_pci_init);