arch/arm/mach-omap/common.c

   1 /*
   2  * linux/arch/arm/mach-omap/common.c
   3  *
   4  * Code common to all OMAP machines.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10 #include <linux/config.h>
  11 #include <linux/module.h>
  12 #include <linux/kernel.h>
  13 #include <linux/init.h>
  14 #include <linux/delay.h>
  15 #include <linux/pm.h>
  16 #include <linux/console.h>
  17 #include <linux/serial.h>
  18 #include <linux/tty.h>
  19 #include <linux/serial_8250.h>
  20 #include <linux/serial_reg.h>
  21
  22 #include <asm/hardware.h>
  23 #include <asm/system.h>
  24 #include <asm/pgtable.h>
  25 #include <asm/mach/map.h>
  26 #include <asm/hardware/clock.h>
  27 #include <asm/io.h>
  28 #include <asm/mach-types.h>
  29
  30 #include <asm/arch/board.h>
  31 #include <asm/arch/mux.h>
  32 #include <asm/arch/fpga.h>
  33
  34 #include "clock.h"
  35
  36 #define DEBUG 1
  37
  38 struct omap_id {
  39         u16     jtag_id;        /* Used to determine OMAP type */
  40         u8      die_rev;        /* Processor revision */
  41         u32     omap_id;        /* OMAP revision */
  42         u32     type;           /* Cpu id bits [31:08], cpu class bits [07:00] */
  43 };
  44
  45 /* Register values to detect the OMAP version */
  46 static struct omap_id omap_ids[] __initdata = {
  47         { .jtag_id = 0x355f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300100},
  48         { .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300300},
  49         { .jtag_id = 0xb470, .die_rev = 0x0, .omap_id = 0x03310100, .type = 0x15100000},
  50         { .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x16100000},
  51         { .jtag_id = 0xb576, .die_rev = 0x2, .omap_id = 0x03320100, .type = 0x16110000},
  52         { .jtag_id = 0xb576, .die_rev = 0x3, .omap_id = 0x03320100, .type = 0x16100c00},
  53         { .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320200, .type = 0x16100d00},
  54         { .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00},
  55         { .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00},
  56         { .jtag_id = 0xb576, .die_rev = 0x1, .omap_id = 0x03320100, .type = 0x16110000},
  57         { .jtag_id = 0xb58c, .die_rev = 0x2, .omap_id = 0x03320200, .type = 0x16110b00},
  58         { .jtag_id = 0xb58c, .die_rev = 0x3, .omap_id = 0x03320200, .type = 0x16110c00},
  59         { .jtag_id = 0xb65f, .die_rev = 0x0, .omap_id = 0x03320400, .type = 0x16212300},
  60         { .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320400, .type = 0x16212300},
  61         { .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320500, .type = 0x16212300},
  62         { .jtag_id = 0xb5f7, .die_rev = 0x0, .omap_id = 0x03330000, .type = 0x17100000},
  63         { .jtag_id = 0xb5f7, .die_rev = 0x1, .omap_id = 0x03330100, .type = 0x17100000},
  64         { .jtag_id = 0xb5f7, .die_rev = 0x2, .omap_id = 0x03330100, .type = 0x17100000},
  65 };
  66
  67 /*
  68  * Get OMAP type from PROD_ID.
  69  * 1710 has the PROD_ID in bits 15:00, not in 16:01 as documented in TRM.
  70  * 1510 PROD_ID is empty, and 1610 PROD_ID does not make sense.
  71  * Undocumented register in TEST BLOCK is used as fallback; This seems to
  72  * work on 1510, 1610 & 1710. The official way hopefully will work in future
  73  * processors.
  74  */
  75 static u16 __init omap_get_jtag_id(void)
  76 {
  77         u32 prod_id, omap_id;
  78
  79         prod_id = omap_readl(OMAP_PRODUCTION_ID_1);
  80         omap_id = omap_readl(OMAP32_ID_1);
  81
  82         /* Check for unusable OMAP_PRODUCTION_ID_1 on 1611B/5912 and 730 */
  83         if (((prod_id >> 20) == 0) || (prod_id == omap_id))
  84                 prod_id = 0;
  85         else
  86                 prod_id &= 0xffff;
  87
  88         if (prod_id)
  89                 return prod_id;
  90
  91         /* Use OMAP32_ID_1 as fallback */
  92         prod_id = ((omap_id >> 12) & 0xffff);
  93
  94         return prod_id;
  95 }
  96
  97 /*
  98  * Get OMAP revision from DIE_REV.
  99  * Early 1710 processors may have broken OMAP_DIE_ID, it contains PROD_ID.
 100  * Undocumented register in the TEST BLOCK is used as fallback.
 101  * REVISIT: This does not seem to work on 1510
 102  */
 103 static u8 __init omap_get_die_rev(void)
 104 {
 105         u32 die_rev;
 106
 107         die_rev = omap_readl(OMAP_DIE_ID_1);
 108
 109         /* Check for broken OMAP_DIE_ID on early 1710 */
 110         if (((die_rev >> 12) & 0xffff) == omap_get_jtag_id())
 111                 die_rev = 0;
 112
 113         die_rev = (die_rev >> 17) & 0xf;
 114         if (die_rev)
 115                 return die_rev;
 116
 117         die_rev = (omap_readl(OMAP32_ID_1) >> 28) & 0xf;
 118
 119         return die_rev;
 120 }
 121
 122 static void __init omap_check_revision(void)
 123 {
 124         int i;
 125         u16 jtag_id;
 126         u8 die_rev;
 127         u32 omap_id;
 128         u8 cpu_type;
 129
 130         jtag_id = omap_get_jtag_id();
 131         die_rev = omap_get_die_rev();
 132         omap_id = omap_readl(OMAP32_ID_0);
 133
 134 #ifdef DEBUG
 135         printk("OMAP_DIE_ID_0: 0x%08x\n", omap_readl(OMAP_DIE_ID_0));
 136         printk("OMAP_DIE_ID_1: 0x%08x DIE_REV: %i\n",
 137                 omap_readl(OMAP_DIE_ID_1),
 138                (omap_readl(OMAP_DIE_ID_1) >> 17) & 0xf);
 139         printk("OMAP_PRODUCTION_ID_0: 0x%08x\n", omap_readl(OMAP_PRODUCTION_ID_0));
 140         printk("OMAP_PRODUCTION_ID_1: 0x%08x JTAG_ID: 0x%04x\n",
 141                 omap_readl(OMAP_PRODUCTION_ID_1),
 142                 omap_readl(OMAP_PRODUCTION_ID_1) & 0xffff);
 143         printk("OMAP32_ID_0: 0x%08x\n", omap_readl(OMAP32_ID_0));
 144         printk("OMAP32_ID_1: 0x%08x\n", omap_readl(OMAP32_ID_1));
 145         printk("JTAG_ID: 0x%04x DIE_REV: %i\n", jtag_id, die_rev);
 146 #endif
 147
 148         system_serial_high = omap_readl(OMAP_DIE_ID_0);
 149         system_serial_low = omap_readl(OMAP_DIE_ID_1);
 150
 151         /* First check only the major version in a safe way */
 152         for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
 153                 if (jtag_id == (omap_ids[i].jtag_id)) {
 154                         system_rev = omap_ids[i].type;
 155                         break;
 156                 }
 157         }
 158
 159         /* Check if we can find the die revision */
 160         for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
 161                 if (jtag_id == omap_ids[i].jtag_id && die_rev == omap_ids[i].die_rev) {
 162                         system_rev = omap_ids[i].type;
 163                         break;
 164                 }
 165         }
 166
 167         /* Finally check also the omap_id */
 168         for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
 169                 if (jtag_id == omap_ids[i].jtag_id
 170                     && die_rev == omap_ids[i].die_rev
 171                     && omap_id == omap_ids[i].omap_id) {
 172                         system_rev = omap_ids[i].type;
 173                         break;
 174                 }
 175         }
 176
 177         /* Add the cpu class info (7xx, 15xx, 16xx, 24xx) */
 178         cpu_type = system_rev >> 24;
 179
 180         switch (cpu_type) {
 181         case 0x07:
 182                 system_rev |= 0x07;
 183                 break;
 184         case 0x15:
 185                 system_rev |= 0x15;
 186                 break;
 187         case 0x16:
 188         case 0x17:
 189                 system_rev |= 0x16;
 190                 break;
 191         case 0x24:
 192                 system_rev |= 0x24;
 193                 break;
 194         default:
 195                 printk("Unknown OMAP cpu type: 0x%02x\n", cpu_type);
 196         }
 197
 198         printk("OMAP%04x", system_rev >> 16);
 199         if ((system_rev >> 8) & 0xff)
 200                 printk("%x", (system_rev >> 8) & 0xff);
 201         printk(" revision %i handled as %02xxx id: %08x%08x\n",
 202                die_rev, system_rev & 0xff, system_serial_low,
 203                system_serial_high);
 204 }
 205
 206 /*
 207  * ----------------------------------------------------------------------------
 208  * OMAP I/O mapping
 209  *
 210  * The machine specific code may provide the extra mapping besides the
 211  * default mapping provided here.
 212  * ----------------------------------------------------------------------------
 213  */
 214
 215 static struct map_desc omap_io_desc[] __initdata = {
 216  { IO_VIRT,             IO_PHYS,             IO_SIZE,              MT_DEVICE },
 217 };
 218
 219 #ifdef CONFIG_ARCH_OMAP730
 220 static struct map_desc omap730_io_desc[] __initdata = {
 221  { OMAP730_DSP_BASE,    OMAP730_DSP_START,    OMAP730_DSP_SIZE,    MT_DEVICE },
 222  { OMAP730_DSPREG_BASE, OMAP730_DSPREG_START, OMAP730_DSPREG_SIZE, MT_DEVICE },
 223  { OMAP730_SRAM_BASE,   OMAP730_SRAM_START,   OMAP730_SRAM_SIZE,   MT_DEVICE }
 224 };
 225 #endif
 226
 227 #ifdef CONFIG_ARCH_OMAP1510
 228 static struct map_desc omap1510_io_desc[] __initdata = {
 229  { OMAP1510_DSP_BASE,    OMAP1510_DSP_START,    OMAP1510_DSP_SIZE,    MT_DEVICE },
 230  { OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_START, OMAP1510_DSPREG_SIZE, MT_DEVICE },
 231  { OMAP1510_SRAM_BASE,   OMAP1510_SRAM_START,   OMAP1510_SRAM_SIZE,   MT_DEVICE }
 232 };
 233 #endif
 234
 235 #if defined(CONFIG_ARCH_OMAP16XX)
 236 static struct map_desc omap1610_io_desc[] __initdata = {
 237  { OMAP16XX_DSP_BASE,    OMAP16XX_DSP_START,    OMAP16XX_DSP_SIZE,    MT_DEVICE },
 238  { OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_START, OMAP16XX_DSPREG_SIZE, MT_DEVICE },
 239  { OMAP16XX_SRAM_BASE,   OMAP16XX_SRAM_START,   OMAP1610_SRAM_SIZE,   MT_DEVICE }
 240 };
 241
 242 static struct map_desc omap5912_io_desc[] __initdata = {
 243  { OMAP16XX_DSP_BASE,    OMAP16XX_DSP_START,    OMAP16XX_DSP_SIZE,    MT_DEVICE },
 244  { OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_START, OMAP16XX_DSPREG_SIZE, MT_DEVICE },
 245 /*
 246  * The OMAP5912 has 250kByte internal SRAM. Because the mapping is baseed on page
 247  * size (4kByte), it seems that the last 2kByte (=0x800) of the 250kByte are not mapped.
 248  * Add additional 2kByte (0x800) so that the last page is mapped and the last 2kByte
 249  * can be used.
 250  */
 251  { OMAP16XX_SRAM_BASE,   OMAP16XX_SRAM_START,   OMAP5912_SRAM_SIZE + 0x800,   MT_DEVICE }
 252 };
 253 #endif
 254
 255 static int initialized = 0;
 256
 257 static void __init _omap_map_io(void)
 258 {
 259         initialized = 1;
 260
 261         /* We have to initialize the IO space mapping before we can run
 262          * cpu_is_omapxxx() macros. */
 263         iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc));
 264         omap_check_revision();
 265
 266         /* clear BM to canonicalize CS0 (not CS3) at 0000:0000 */
 267         omap_writel(omap_readl(EMIFS_CONFIG) & 0x0d, EMIFS_CONFIG);
 268
 269 #ifdef CONFIG_ARCH_OMAP730
 270         if (cpu_is_omap730()) {
 271                 iotable_init(omap730_io_desc, ARRAY_SIZE(omap730_io_desc));
 272         }
 273 #endif
 274 #ifdef CONFIG_ARCH_OMAP1510
 275         if (cpu_is_omap1510()) {
 276                 iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc));
 277         }
 278 #endif
 279 #if defined(CONFIG_ARCH_OMAP16XX)
 280         if (cpu_is_omap1610() || cpu_is_omap1710()) {
 281                 iotable_init(omap1610_io_desc, ARRAY_SIZE(omap1610_io_desc));
 282         }
 283         if (cpu_is_omap5912()) {
 284                 iotable_init(omap5912_io_desc, ARRAY_SIZE(omap5912_io_desc));
 285         }
 286 #endif
 287
 288         /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
 289          * on a Posted Write in the TIPB Bridge".
 290          */
 291         omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL);
 292         omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL);
 293
 294         /* Must init clocks early to assure that timer interrupt works
 295          */
 296         clk_init();
 297 }
 298
 299 /*
 300  * This should only get called from board specific init
 301  */
 302 void omap_map_io(void)
 303 {
 304         if (!initialized)
 305                 _omap_map_io();
 306 }
 307
 308 static inline unsigned int omap_serial_in(struct plat_serial8250_port *up,
 309                                           int offset)
 310 {
 311         offset <<= up->regshift;
 312         return (unsigned int)__raw_readb(up->membase + offset);
 313 }
 314
 315 static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset,
 316                                     int value)
 317 {
 318         offset <<= p->regshift;
 319         __raw_writeb(value, p->membase + offset);
 320 }
 321
 322 /*
 323  * Internal UARTs need to be initialized for the 8250 autoconfig to work
 324  * properly. Note that the TX watermark initialization may not be needed
 325  * once the 8250.c watermark handling code is merged.
 326  */
 327 static void __init omap_serial_reset(struct plat_serial8250_port *p)
 328 {
 329         omap_serial_outp(p, UART_OMAP_MDR1, 0x07);      /* disable UART */
 330         omap_serial_outp(p, UART_OMAP_SCR, 0x08);       /* TX watermark */
 331         omap_serial_outp(p, UART_OMAP_MDR1, 0x00);      /* enable UART */
 332
 333         if (!cpu_is_omap1510()) {
 334                 omap_serial_outp(p, UART_OMAP_SYSC, 0x01);
 335                 while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01));
 336         }
 337 }
 338
 339 static struct plat_serial8250_port serial_platform_data[] = {
 340         {
 341                 .membase        = (char*)IO_ADDRESS(OMAP_UART1_BASE),
 342                 .mapbase        = (unsigned long)OMAP_UART1_BASE,
 343                 .irq            = INT_UART1,
 344                 .flags          = UPF_BOOT_AUTOCONF,
 345                 .iotype         = UPIO_MEM,
 346                 .regshift       = 2,
 347                 .uartclk        = OMAP16XX_BASE_BAUD * 16,
 348         },
 349         {
 350                 .membase        = (char*)IO_ADDRESS(OMAP_UART2_BASE),
 351                 .mapbase        = (unsigned long)OMAP_UART2_BASE,
 352                 .irq            = INT_UART2,
 353                 .flags          = UPF_BOOT_AUTOCONF,
 354                 .iotype         = UPIO_MEM,
 355                 .regshift       = 2,
 356                 .uartclk        = OMAP16XX_BASE_BAUD * 16,
 357         },
 358         {
 359                 .membase        = (char*)IO_ADDRESS(OMAP_UART3_BASE),
 360                 .mapbase        = (unsigned long)OMAP_UART3_BASE,
 361                 .irq            = INT_UART3,
 362                 .flags          = UPF_BOOT_AUTOCONF,
 363                 .iotype         = UPIO_MEM,
 364                 .regshift       = 2,
 365                 .uartclk        = OMAP16XX_BASE_BAUD * 16,
 366         },
 367         { },
 368 };
 369
 370 static struct platform_device serial_device = {
 371         .name                   = "serial8250",
 372         .id                     = 0,
 373         .dev                    = {
 374                 .platform_data  = serial_platform_data,
 375         },
 376 };
 377
 378 /*
 379  * Note that on Innovator-1510 UART2 pins conflict with USB2.
 380  * By default UART2 does not work on Innovator-1510 if you have
 381  * USB OHCI enabled. To use UART2, you must disable USB2 first.
 382  */
 383 void __init omap_serial_init(int ports[OMAP_MAX_NR_PORTS])
 384 {
 385         int i;
 386
 387         if (cpu_is_omap730()) {
 388                 serial_platform_data[0].regshift = 0;
 389                 serial_platform_data[1].regshift = 0;
 390                 serial_platform_data[0].irq = INT_730_UART_MODEM_1;
 391                 serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2;
 392         }
 393
 394         if (cpu_is_omap1510()) {
 395                 serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16;
 396                 serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16;
 397                 serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
 398         }
 399
 400         for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
 401                 unsigned char reg;
 402
 403                 if (ports[i] == 0) {
 404                         serial_platform_data[i].membase = 0;
 405                         serial_platform_data[i].mapbase = 0;
 406                         continue;
 407                 }
 408
 409                 switch (i) {
 410                 case 0:
 411                         if (cpu_is_omap1510()) {
 412                                 omap_cfg_reg(UART1_TX);
 413                                 omap_cfg_reg(UART1_RTS);
 414                                 if (machine_is_omap_innovator()) {
 415                                         reg = fpga_read(OMAP1510_FPGA_POWER);
 416                                         reg |= OMAP1510_FPGA_PCR_COM1_EN;
 417                                         fpga_write(reg, OMAP1510_FPGA_POWER);
 418                                         udelay(10);
 419                                 }
 420                         }
 421                         break;
 422                 case 1:
 423                         if (cpu_is_omap1510()) {
 424                                 omap_cfg_reg(UART2_TX);
 425                                 omap_cfg_reg(UART2_RTS);
 426                                 if (machine_is_omap_innovator()) {
 427                                         reg = fpga_read(OMAP1510_FPGA_POWER);
 428                                         reg |= OMAP1510_FPGA_PCR_COM2_EN;
 429                                         fpga_write(reg, OMAP1510_FPGA_POWER);
 430                                         udelay(10);
 431                                 }
 432                         }
 433                         break;
 434                 case 2:
 435                         if (cpu_is_omap1510()) {
 436                                 omap_cfg_reg(UART3_TX);
 437                                 omap_cfg_reg(UART3_RX);
 438                         }
 439                         break;
 440                 }
 441                 omap_serial_reset(&serial_platform_data[i]);
 442         }
 443 }
 444
 445 static int __init omap_init(void)
 446 {
 447         return platform_device_register(&serial_device);
 448 }
 449 arch_initcall(omap_init);
 450
 451 #define NO_LENGTH_CHECK 0xffffffff
 452
 453 extern int omap_bootloader_tag_len;
 454 extern u8 omap_bootloader_tag[];
 455
 456 struct omap_board_config_kernel *omap_board_config;
 457 int omap_board_config_size = 0;
 458
 459 static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out)
 460 {
 461         struct omap_board_config_kernel *kinfo = NULL;
 462         int i;
 463
 464 #ifdef CONFIG_OMAP_BOOT_TAG
 465         struct omap_board_config_entry *info = NULL;
 466
 467         if (omap_bootloader_tag_len > 4)
 468                 info = (struct omap_board_config_entry *) omap_bootloader_tag;
 469         while (info != NULL) {
 470                 u8 *next;
 471
 472                 if (info->tag == tag) {
 473                         if (skip == 0)
 474                                 break;
 475                         skip--;
 476                 }
 477
 478                 next = (u8 *) info + sizeof(*info) + info->len;
 479                 if (next >= omap_bootloader_tag + omap_bootloader_tag_len)
 480                         info = NULL;
 481                 else
 482                         info = (struct omap_board_config_entry *) next;
 483         }
 484         if (info != NULL) {
 485                 /* Check the length as a lame attempt to check for
 486                  * binary inconsistancy. */
 487                 if (len != NO_LENGTH_CHECK && info->len != len) {
 488                         printk(KERN_ERR "OMAP peripheral config: Length mismatch with tag %x (want %d, got %d)\n",
 489                                tag, len, info->len);
 490                         return NULL;
 491                 }
 492                 if (len_out != NULL)
 493                         *len_out = info->len;
 494                 return info->data;
 495         }
 496 #endif
 497         /* Try to find the config from the board-specific structures
 498          * in the kernel. */
 499         for (i = 0; i < omap_board_config_size; i++) {
 500                 if (omap_board_config[i].tag == tag) {
 501                         kinfo = &omap_board_config[i];
 502                         break;
 503                 }
 504         }
 505         if (kinfo == NULL)
 506                 return NULL;
 507         return kinfo->data;
 508 }
 509
 510 const void *__omap_get_config(u16 tag, size_t len, int nr)
 511 {
 512         return get_config(tag, len, nr, NULL);
 513 }
 514 EXPORT_SYMBOL(__omap_get_config);
 515
 516 const void *omap_get_var_config(u16 tag, size_t *len)
 517 {
 518         return get_config(tag, NO_LENGTH_CHECK, 0, len);
 519 }
 520 EXPORT_SYMBOL(omap_get_var_config);
 521
 522 static int __init omap_add_serial_console(void)
 523 {
 524         const struct omap_uart_config *info;
 525
 526         info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
 527         if (info != NULL && info->console_uart) {
 528                 static char speed[11], *opt = NULL;
 529
 530                 if (info->console_speed) {
 531                         snprintf(speed, sizeof(speed), "%u", info->console_speed);
 532                         opt = speed;
 533                 }
 534                 return add_preferred_console("ttyS", info->console_uart - 1, opt);
 535         }
 536         return 0;
 537 }
 538 console_initcall(omap_add_serial_console);