arch/arm/mach-s3c2410/s3c2440.c

   1 /* linux/arch/arm/mach-s3c2410/s3c2440.c
   2  *
   3  * Copyright (c) 2004-2005 Simtec Electronics
   4  *   Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * Samsung S3C2440 Mobile CPU support
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * Modifications:
  13  *      24-Aug-2004 BJD  Start of s3c2440 support
  14  *      12-Oct-2004 BJD  Moved clock info out to clock.c
  15  *      01-Nov-2004 BJD  Fixed clock build code
  16  *      09-Nov-2004 BJD  Added sysdev for power management
  17  *      04-Nov-2004 BJD  New serial registration
  18  *      15-Nov-2004 BJD  Rename the i2c device for the s3c2440
  19  *      14-Jan-2005 BJD  Moved clock init code into seperate function
  20  *      14-Jan-2005 BJD  Removed un-used clock bits
  21 */
  22
  23 #include <linux/kernel.h>
  24 #include <linux/types.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/list.h>
  27 #include <linux/timer.h>
  28 #include <linux/init.h>
  29 #include <linux/device.h>
  30 #include <linux/sysdev.h>
  31
  32 #include <asm/mach/arch.h>
  33 #include <asm/mach/map.h>
  34 #include <asm/mach/irq.h>
  35
  36 #include <asm/hardware.h>
  37 #include <asm/io.h>
  38 #include <asm/irq.h>
  39 #include <asm/hardware/clock.h>
  40
  41 #include <asm/arch/regs-clock.h>
  42 #include <asm/arch/regs-serial.h>
  43 #include <asm/arch/regs-gpio.h>
  44 #include <asm/arch/regs-gpioj.h>
  45 #include <asm/arch/regs-dsc.h>
  46
  47 #include "s3c2440.h"
  48 #include "clock.h"
  49 #include "devs.h"
  50 #include "cpu.h"
  51 #include "pm.h"
  52
  53
  54 static struct map_desc s3c2440_iodesc[] __initdata = {
  55         IODESC_ENT(USBHOST),
  56         IODESC_ENT(CLKPWR),
  57         IODESC_ENT(LCD),
  58         IODESC_ENT(TIMER),
  59         IODESC_ENT(ADC),
  60         IODESC_ENT(WATCHDOG),
  61 };
  62
  63 static struct resource s3c_uart0_resource[] = {
  64         [0] = {
  65                 .start = S3C2410_PA_UART0,
  66                 .end   = S3C2410_PA_UART0 + 0x3fff,
  67                 .flags = IORESOURCE_MEM,
  68         },
  69         [1] = {
  70                 .start = IRQ_S3CUART_RX0,
  71                 .end   = IRQ_S3CUART_ERR0,
  72                 .flags = IORESOURCE_IRQ,
  73         }
  74
  75 };
  76
  77 static struct resource s3c_uart1_resource[] = {
  78         [0] = {
  79                 .start = S3C2410_PA_UART1,
  80                 .end   = S3C2410_PA_UART1 + 0x3fff,
  81                 .flags = IORESOURCE_MEM,
  82         },
  83         [1] = {
  84                 .start = IRQ_S3CUART_RX1,
  85                 .end   = IRQ_S3CUART_ERR1,
  86                 .flags = IORESOURCE_IRQ,
  87         }
  88 };
  89
  90 static struct resource s3c_uart2_resource[] = {
  91         [0] = {
  92                 .start = S3C2410_PA_UART2,
  93                 .end   = S3C2410_PA_UART2 + 0x3fff,
  94                 .flags = IORESOURCE_MEM,
  95         },
  96         [1] = {
  97                 .start = IRQ_S3CUART_RX2,
  98                 .end   = IRQ_S3CUART_ERR2,
  99                 .flags = IORESOURCE_IRQ,
 100         }
 101 };
 102
 103 /* our uart devices */
 104
 105 static struct platform_device s3c_uart0 = {
 106         .name             = "s3c2440-uart",
 107         .id               = 0,
 108         .num_resources    = ARRAY_SIZE(s3c_uart0_resource),
 109         .resource         = s3c_uart0_resource,
 110 };
 111
 112
 113 static struct platform_device s3c_uart1 = {
 114         .name             = "s3c2440-uart",
 115         .id               = 1,
 116         .num_resources    = ARRAY_SIZE(s3c_uart1_resource),
 117         .resource         = s3c_uart1_resource,
 118 };
 119
 120 static struct platform_device s3c_uart2 = {
 121         .name             = "s3c2440-uart",
 122         .id               = 2,
 123         .num_resources    = ARRAY_SIZE(s3c_uart2_resource),
 124         .resource         = s3c_uart2_resource,
 125 };
 126
 127 static struct platform_device *uart_devices[] __initdata = {
 128         &s3c_uart0,
 129         &s3c_uart1,
 130         &s3c_uart2
 131 };
 132
 133 /* uart initialisation */
 134
 135 static int __initdata s3c2440_uart_count;
 136
 137 void __init s3c2440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
 138 {
 139         struct platform_device *platdev;
 140         int uart;
 141
 142         for (uart = 0; uart < no; uart++, cfg++) {
 143                 platdev = uart_devices[cfg->hwport];
 144
 145                 s3c24xx_uart_devs[uart] = platdev;
 146                 platdev->dev.platform_data = cfg;
 147         }
 148
 149         s3c2440_uart_count = uart;
 150 }
 151
 152 /* s3c2440 specific clock sources */
 153
 154 static struct clk s3c2440_clk_cam = {
 155         .name           = "camera",
 156         .enable         = s3c24xx_clkcon_enable,
 157         .ctrlbit        = S3C2440_CLKCON_CAMERA
 158 };
 159
 160 static struct clk s3c2440_clk_ac97 = {
 161         .name           = "ac97",
 162         .enable         = s3c24xx_clkcon_enable,
 163         .ctrlbit        = S3C2440_CLKCON_CAMERA
 164 };
 165
 166 #ifdef CONFIG_PM
 167
 168 struct sleep_save s3c2440_sleep[] = {
 169         SAVE_ITEM(S3C2440_DSC0),
 170         SAVE_ITEM(S3C2440_DSC1),
 171         SAVE_ITEM(S3C2440_GPJDAT),
 172         SAVE_ITEM(S3C2440_GPJCON),
 173         SAVE_ITEM(S3C2440_GPJUP)
 174 };
 175
 176 static int s3c2440_suspend(struct sys_device *dev, u32 state)
 177 {
 178         s3c2410_pm_do_save(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep));
 179         return 0;
 180 }
 181
 182 static int s3c2440_resume(struct sys_device *dev)
 183 {
 184         s3c2410_pm_do_restore(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep));
 185         return 0;
 186 }
 187
 188 #else
 189 #define s3c2440_suspend NULL
 190 #define s3c2440_resume  NULL
 191 #endif
 192
 193 static struct sysdev_class s3c2440_sysclass = {
 194         set_kset_name("s3c2440-core"),
 195         .suspend        = s3c2440_suspend,
 196         .resume         = s3c2440_resume
 197 };
 198
 199 static struct sys_device s3c2440_sysdev = {
 200         .cls            = &s3c2440_sysclass,
 201 };
 202
 203 void __init s3c2440_map_io(struct map_desc *mach_desc, int size)
 204 {
 205         /* register our io-tables */
 206
 207         iotable_init(s3c2440_iodesc, ARRAY_SIZE(s3c2440_iodesc));
 208         iotable_init(mach_desc, size);
 209         /* rename any peripherals used differing from the s3c2410 */
 210
 211         s3c_device_i2c.name = "s3c2440-i2c";
 212 }
 213
 214 void __init s3c2440_init_clocks(int xtal)
 215 {
 216         unsigned long clkdiv;
 217         unsigned long camdiv;
 218         int s3c2440_hdiv = 1;
 219
 220         /* now we've got our machine bits initialised, work out what
 221          * clocks we've got */
 222
 223         s3c24xx_fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON),
 224                                        s3c24xx_xtal) * 2;
 225
 226         clkdiv = __raw_readl(S3C2410_CLKDIVN);
 227         camdiv = __raw_readl(S3C2440_CAMDIVN);
 228
 229         /* work out clock scalings */
 230
 231         switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
 232         case S3C2440_CLKDIVN_HDIVN_1:
 233                 s3c2440_hdiv = 1;
 234                 break;
 235
 236         case S3C2440_CLKDIVN_HDIVN_2:
 237                 s3c2440_hdiv = 1;
 238                 break;
 239
 240         case S3C2440_CLKDIVN_HDIVN_4_8:
 241                 s3c2440_hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
 242                 break;
 243
 244         case S3C2440_CLKDIVN_HDIVN_3_6:
 245                 s3c2440_hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
 246                 break;
 247         }
 248
 249         s3c24xx_hclk = s3c24xx_fclk / s3c2440_hdiv;
 250         s3c24xx_pclk = s3c24xx_hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1);
 251
 252         /* print brief summary of clocks, etc */
 253
 254         printk("S3C2440: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
 255                print_mhz(s3c24xx_fclk), print_mhz(s3c24xx_hclk),
 256                print_mhz(s3c24xx_pclk));
 257
 258         /* initialise the clocks here, to allow other things like the
 259          * console to use them, and to add new ones after the initialisation
 260          */
 261
 262         s3c24xx_setup_clocks();
 263
 264         /* add s3c2440 specific clocks */
 265
 266         s3c2440_clk_cam.parent = clk_get(NULL, "hclk");
 267         s3c2440_clk_ac97.parent = clk_get(NULL, "pclk");
 268
 269         s3c24xx_register_clock(&s3c2440_clk_ac97);
 270         s3c24xx_register_clock(&s3c2440_clk_cam);
 271
 272         clk_disable(&s3c2440_clk_ac97);
 273         clk_disable(&s3c2440_clk_cam);
 274 }
 275
 276 int __init s3c2440_init(void)
 277 {
 278         int ret;
 279
 280         printk("S3C2440: Initialising architecture\n");
 281
 282         ret = sysdev_class_register(&s3c2440_sysclass);
 283         if (ret == 0)
 284                 ret = sysdev_register(&s3c2440_sysdev);
 285
 286         if (ret != 0)
 287                 printk(KERN_ERR "failed to register sysdev for s3c2440\n");
 288
 289         if (ret == 0)
 290                 ret = platform_add_devices(s3c24xx_uart_devs, s3c2440_uart_count);
 291
 292         return ret;
 293 }