2 * (C) 2004 Sebastian Witt <se.witt@gmx.net>
4 * Licensed under the terms of the GNU GPL License version 2.
5 * Based upon reverse engineered information
7 * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/moduleparam.h>
13 #include <linux/init.h>
14 #include <linux/cpufreq.h>
15 #include <linux/pci.h>
16 #include <linux/delay.h>
18 #define NFORCE2_XTAL 25
19 #define NFORCE2_BOOTFSB 0x48
20 #define NFORCE2_PLLENABLE 0xa8
21 #define NFORCE2_PLLREG 0xa4
22 #define NFORCE2_PLLADR 0xa0
23 #define NFORCE2_PLL(mul, div) (0x100000 | (mul << 8) | div)
25 #define NFORCE2_MIN_FSB 50
26 #define NFORCE2_SAFE_DISTANCE 50
28 /* Delay in ms between FSB changes */
29 //#define NFORCE2_DELAY 10
32 * FSB is changed using the chipset
34 static struct pci_dev *nforce2_chipset_dev;
42 * minimum and maximum FSB (= FSB at boot time)
44 static int min_fsb = 0;
45 static int max_fsb = 0;
47 MODULE_AUTHOR("Sebastian Witt <se.witt@gmx.net>");
48 MODULE_DESCRIPTION("nForce2 FSB changing cpufreq driver");
49 MODULE_LICENSE("GPL");
51 module_param(fid, int, 0444);
52 module_param(min_fsb, int, 0444);
54 MODULE_PARM_DESC(fid, "CPU multiplier to use (11.5 = 115)");
55 MODULE_PARM_DESC(min_fsb,
56 "Minimum FSB to use, if not defined: current FSB - 50");
59 * Define it if you want verbose debug output, e.g. for bug reporting
61 //#define NFORCE2_DEBUG
64 #define dprintk(msg...) printk(msg)
66 #define dprintk(msg...) do { } while(0)
70 * nforce2_calc_fsb - calculate FSB
73 * Calculates FSB from PLL value
75 static int nforce2_calc_fsb(int pll)
77 unsigned char mul, div;
79 mul = (pll >> 8) & 0xff;
83 return NFORCE2_XTAL * mul / div;
89 * nforce2_calc_pll - calculate PLL value
92 * Calculate PLL value for given FSB
94 static int nforce2_calc_pll(unsigned int fsb)
96 unsigned char xmul, xdiv;
97 unsigned char mul = 0, div = 0;
100 /* Try to calculate multiplier and divider up to 4 times */
101 while (((mul == 0) || (div == 0)) && (tried <= 3)) {
102 for (xdiv = 1; xdiv <= 0x80; xdiv++)
103 for (xmul = 1; xmul <= 0xfe; xmul++)
104 if (nforce2_calc_fsb(NFORCE2_PLL(xmul, xdiv)) ==
112 if ((mul == 0) || (div == 0))
115 return NFORCE2_PLL(mul, div);
119 * nforce2_write_pll - write PLL value to chipset
122 * Writes new FSB PLL value to chipset
124 static void nforce2_write_pll(int pll)
128 /* Set the pll addr. to 0x00 */
130 pci_write_config_dword(nforce2_chipset_dev, NFORCE2_PLLADR, temp);
132 /* Now write the value in all 64 registers */
133 for (temp = 0; temp <= 0x3f; temp++) {
134 pci_write_config_dword(nforce2_chipset_dev,
135 NFORCE2_PLLREG, pll);
142 * nforce2_fsb_read - Read FSB
144 * Read FSB from chipset
145 * If bootfsb != 0, return FSB at boot-time
147 static unsigned int nforce2_fsb_read(int bootfsb)
149 struct pci_dev *nforce2_sub5;
153 /* Get chipset boot FSB from subdevice 5 (FSB at boot-time) */
154 nforce2_sub5 = pci_get_subsys(PCI_VENDOR_ID_NVIDIA,
163 pci_read_config_dword(nforce2_sub5, NFORCE2_BOOTFSB, &fsb);
166 /* Check if PLL register is already set */
167 pci_read_config_byte(nforce2_chipset_dev,
168 NFORCE2_PLLENABLE, (u8 *)&temp);
173 /* Use PLL register FSB value */
174 pci_read_config_dword(nforce2_chipset_dev,
175 NFORCE2_PLLREG, &temp);
176 fsb = nforce2_calc_fsb(temp);
182 * nforce2_set_fsb - set new FSB
187 static int nforce2_set_fsb(unsigned int fsb)
193 if ((fsb > max_fsb) || (fsb < NFORCE2_MIN_FSB)) {
194 printk(KERN_ERR "cpufreq: FSB %d is out of range!\n", fsb);
198 tfsb = nforce2_fsb_read(0);
200 printk(KERN_ERR "cpufreq: Error while reading the FSB\n");
204 /* First write? Then set actual value */
205 pci_read_config_byte(nforce2_chipset_dev,
206 NFORCE2_PLLENABLE, (u8 *)&temp);
208 pll = nforce2_calc_pll(tfsb);
213 nforce2_write_pll(pll);
216 /* Enable write access */
218 pci_write_config_byte(nforce2_chipset_dev, NFORCE2_PLLENABLE, (u8)temp);
225 while ((tfsb != fsb) && (tfsb <= max_fsb) && (tfsb >= min_fsb)) {
231 /* Calculate the PLL reg. value */
232 if ((pll = nforce2_calc_pll(tfsb)) == -1)
235 nforce2_write_pll(pll);
237 mdelay(NFORCE2_DELAY);
242 pci_write_config_byte(nforce2_chipset_dev, NFORCE2_PLLADR, (u8)temp);
248 * nforce2_get - get the CPU frequency
251 * Returns the CPU frequency
253 static unsigned int nforce2_get(unsigned int cpu)
257 return nforce2_fsb_read(0) * fid * 100;
261 * nforce2_target - set a new CPUFreq policy
262 * @policy: new policy
263 * @target_freq: the target frequency
264 * @relation: how that frequency relates to achieved frequency (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
266 * Sets a new CPUFreq policy.
268 static int nforce2_target(struct cpufreq_policy *policy,
269 unsigned int target_freq, unsigned int relation)
271 // unsigned long flags;
272 struct cpufreq_freqs freqs;
273 unsigned int target_fsb;
275 if ((target_freq > policy->max) || (target_freq < policy->min))
278 target_fsb = target_freq / (fid * 100);
280 freqs.old = nforce2_get(policy->cpu);
281 freqs.new = target_fsb * fid * 100;
282 freqs.cpu = 0; /* Only one CPU on nForce2 plattforms */
284 if (freqs.old == freqs.new)
287 dprintk(KERN_INFO "cpufreq: Old CPU frequency %d kHz, new %d kHz\n",
288 freqs.old, freqs.new);
290 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
293 //local_irq_save(flags);
295 if (nforce2_set_fsb(target_fsb) < 0)
296 printk(KERN_ERR "cpufreq: Changing FSB to %d failed\n",
299 dprintk(KERN_INFO "cpufreq: Changed FSB successfully to %d\n",
303 //local_irq_restore(flags);
305 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
311 * nforce2_verify - verifies a new CPUFreq policy
312 * @policy: new policy
314 static int nforce2_verify(struct cpufreq_policy *policy)
316 unsigned int fsb_pol_max;
318 fsb_pol_max = policy->max / (fid * 100);
320 if (policy->min < (fsb_pol_max * fid * 100))
321 policy->max = (fsb_pol_max + 1) * fid * 100;
323 cpufreq_verify_within_limits(policy,
324 policy->cpuinfo.min_freq,
325 policy->cpuinfo.max_freq);
329 static int nforce2_cpu_init(struct cpufreq_policy *policy)
334 /* capability check */
335 if (policy->cpu != 0)
338 /* Get current FSB */
339 fsb = nforce2_fsb_read(0);
344 /* FIX: Get FID from CPU */
348 "cpufreq: cpu_khz not set, can't calculate multiplier!\n");
352 fid = cpu_khz / (fsb * 100);
363 printk(KERN_INFO "cpufreq: FSB currently at %i MHz, FID %d.%d\n", fsb,
366 /* Set maximum FSB to FSB at boot time */
367 max_fsb = nforce2_fsb_read(1);
373 min_fsb = max_fsb - NFORCE2_SAFE_DISTANCE;
375 if (min_fsb < NFORCE2_MIN_FSB)
376 min_fsb = NFORCE2_MIN_FSB;
378 /* cpuinfo and default policy values */
379 policy->cpuinfo.min_freq = min_fsb * fid * 100;
380 policy->cpuinfo.max_freq = max_fsb * fid * 100;
381 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
382 policy->cur = nforce2_get(policy->cpu);
383 policy->min = policy->cpuinfo.min_freq;
384 policy->max = policy->cpuinfo.max_freq;
385 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
390 static int nforce2_cpu_exit(struct cpufreq_policy *policy)
395 static struct cpufreq_driver nforce2_driver = {
397 .verify = nforce2_verify,
398 .target = nforce2_target,
400 .init = nforce2_cpu_init,
401 .exit = nforce2_cpu_exit,
402 .owner = THIS_MODULE,
406 * nforce2_detect_chipset - detect the Southbridge which contains FSB PLL logic
408 * Detects nForce2 A2 and C1 stepping
411 static unsigned int nforce2_detect_chipset(void)
415 nforce2_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_NVIDIA,
416 PCI_DEVICE_ID_NVIDIA_NFORCE2,
421 if (nforce2_chipset_dev == NULL)
424 pci_read_config_byte(nforce2_chipset_dev, PCI_REVISION_ID, &revision);
426 printk(KERN_INFO "cpufreq: Detected nForce2 chipset revision %X\n",
429 "cpufreq: FSB changing is maybe unstable and can lead to crashes and data loss.\n");
435 * nforce2_init - initializes the nForce2 CPUFreq driver
437 * Initializes the nForce2 FSB support. Returns -ENODEV on unsupported
438 * devices, -EINVAL on problems during initiatization, and zero on
441 static int __init nforce2_init(void)
443 /* TODO: do we need to detect the processor? */
446 if (nforce2_detect_chipset()) {
447 printk(KERN_ERR "cpufreq: No nForce2 chipset.\n");
451 return cpufreq_register_driver(&nforce2_driver);
455 * nforce2_exit - unregisters cpufreq module
457 * Unregisters nForce2 FSB change support.
459 static void __exit nforce2_exit(void)
461 cpufreq_unregister_driver(&nforce2_driver);
464 module_init(nforce2_init);
465 module_exit(nforce2_exit);