2 * cpufreq driver for Enhanced SpeedStep, as found in Intel's Pentium
3 * M (part of the Centrino chipset).
5 * Despite the "SpeedStep" in the name, this is almost entirely unlike
6 * traditional SpeedStep.
8 * Modelled on speedstep.c
10 * Copyright (C) 2003 Jeremy Fitzhardinge <jeremy@goop.org>
12 * WARNING WARNING WARNING
14 * This driver manipulates the PERF_CTL MSR, which is only somewhat
15 * documented. While it seems to work on my laptop, it has not been
16 * tested anywhere else, and it may not work for you, do strange
17 * things or simply crash.
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/init.h>
23 #include <linux/cpufreq.h>
24 #include <linux/config.h>
27 #include <asm/processor.h>
28 #include <asm/cpufeature.h>
30 #define PFX "speedstep-centrino: "
31 #define MAINTAINER "Jeremy Fitzhardinge <jeremy@goop.org>"
33 /*#define CENTRINO_DEBUG*/
36 #define dprintk(msg...) printk(msg)
38 #define dprintk(msg...) do { } while(0)
43 __u8 x86; /* CPU family */
44 __u8 x86_vendor; /* CPU vendor */
45 __u8 x86_model; /* model */
46 __u8 x86_mask; /* stepping */
49 static const struct cpu_id cpu_id_banias = {
50 .x86_vendor = X86_VENDOR_INTEL,
56 static const struct cpu_id cpu_id_dothan_a1 = {
57 .x86_vendor = X86_VENDOR_INTEL,
65 const struct cpu_id *cpu_id;
66 const char *model_name;
67 unsigned max_freq; /* max clock in kHz */
69 struct cpufreq_frequency_table *op_points; /* clock/voltage pairs */
71 static int centrino_verify_cpu_id(struct cpuinfo_x86 *c, const struct cpu_id *x);
73 /* Operating points for current CPU */
74 static struct cpu_model *centrino_model;
76 #ifdef CONFIG_X86_SPEEDSTEP_CENTRINO_TABLE
78 /* Computes the correct form for IA32_PERF_CTL MSR for a particular
79 frequency/voltage operating point; frequency in MHz, volts in mV.
80 This is stored as "index" in the structure. */
83 .frequency = (mhz) * 1000, \
84 .index = (((mhz)/100) << 8) | ((mv - 700) / 16) \
88 * These voltage tables were derived from the Intel Pentium M
89 * datasheet, document 25261202.pdf, Table 5. I have verified they
90 * are consistent with my IBM ThinkPad X31, which has a 1.3GHz Pentium
94 /* Ultra Low Voltage Intel Pentium M processor 900MHz (Banias) */
95 static struct cpufreq_frequency_table banias_900[] =
100 { .frequency = CPUFREQ_TABLE_END }
103 /* Ultra Low Voltage Intel Pentium M processor 1000MHz (Banias) */
104 static struct cpufreq_frequency_table banias_1000[] =
110 { .frequency = CPUFREQ_TABLE_END }
113 /* Low Voltage Intel Pentium M processor 1.10GHz (Banias) */
114 static struct cpufreq_frequency_table banias_1100[] =
121 { .frequency = CPUFREQ_TABLE_END }
125 /* Low Voltage Intel Pentium M processor 1.20GHz (Banias) */
126 static struct cpufreq_frequency_table banias_1200[] =
134 { .frequency = CPUFREQ_TABLE_END }
137 /* Intel Pentium M processor 1.30GHz (Banias) */
138 static struct cpufreq_frequency_table banias_1300[] =
145 { .frequency = CPUFREQ_TABLE_END }
148 /* Intel Pentium M processor 1.40GHz (Banias) */
149 static struct cpufreq_frequency_table banias_1400[] =
156 { .frequency = CPUFREQ_TABLE_END }
159 /* Intel Pentium M processor 1.50GHz (Banias) */
160 static struct cpufreq_frequency_table banias_1500[] =
168 { .frequency = CPUFREQ_TABLE_END }
171 /* Intel Pentium M processor 1.60GHz (Banias) */
172 static struct cpufreq_frequency_table banias_1600[] =
180 { .frequency = CPUFREQ_TABLE_END }
183 /* Intel Pentium M processor 1.70GHz (Banias) */
184 static struct cpufreq_frequency_table banias_1700[] =
192 { .frequency = CPUFREQ_TABLE_END }
196 #define _BANIAS(cpuid, max, name) \
198 .model_name = "Intel(R) Pentium(R) M processor " name "MHz", \
199 .max_freq = (max)*1000, \
200 .op_points = banias_##max, \
202 #define BANIAS(max) _BANIAS(&cpu_id_banias, max, #max)
204 /* CPU models, their operating frequency range, and freq/voltage
206 static struct cpu_model models[] =
208 _BANIAS(&cpu_id_banias, 900, " 900"),
222 static int centrino_cpu_init_table(struct cpufreq_policy *policy)
224 struct cpuinfo_x86 *cpu = &cpu_data[policy->cpu];
225 struct cpu_model *model;
227 for(model = models; model->model_name != NULL; model++)
228 if ((strcmp(cpu->x86_model_id, model->model_name) == 0) &&
229 (!centrino_verify_cpu_id(cpu, model->cpu_id)))
231 if (model->model_name == NULL) {
232 printk(KERN_INFO PFX "no support for CPU model \"%s\": "
233 "send /proc/cpuinfo to " MAINTAINER "\n",
238 centrino_model = model;
240 printk(KERN_INFO PFX "found \"%s\": max frequency: %dkHz\n",
241 model->model_name, model->max_freq);
247 static inline int centrino_cpu_init_table(struct cpufreq_policy *policy) { return -ENODEV; }
248 #endif /* CONFIG_X86_SPEEDSTEP_CENTRINO_TABLE */
250 static int centrino_verify_cpu_id(struct cpuinfo_x86 *c, const struct cpu_id *x)
252 if ((c->x86 == x->x86) &&
253 (c->x86_vendor == x->x86_vendor) &&
254 (c->x86_model == x->x86_model) &&
255 (c->x86_mask == x->x86_mask))
260 /* Extract clock in kHz from PERF_CTL value */
261 static unsigned extract_clock(unsigned msr)
263 msr = (msr >> 8) & 0xff;
267 /* Return the current CPU frequency in kHz */
268 static unsigned int get_cur_freq(unsigned int cpu)
274 rdmsr(MSR_IA32_PERF_STATUS, l, h);
275 return extract_clock(l);
279 #ifdef CONFIG_X86_SPEEDSTEP_CENTRINO_ACPI
281 static struct acpi_processor_performance p;
283 #include <linux/acpi.h>
284 #include <acpi/processor.h>
286 #define ACPI_PDC_CAPABILITY_ENHANCED_SPEEDSTEP 0x1
289 * centrino_cpu_init_acpi - register with ACPI P-States library
291 * Register with the ACPI P-States library (part of drivers/acpi/processor.c)
292 * in order to determine correct frequency and voltage pairings by reading
293 * the _PSS of the ACPI DSDT or SSDT tables.
295 static int centrino_cpu_init_acpi(struct cpufreq_policy *policy)
297 union acpi_object arg0 = {ACPI_TYPE_BUFFER};
299 struct acpi_object_list arg_list = {1, &arg0};
300 unsigned long cur_freq;
304 arg0.buffer.length = 12;
305 arg0.buffer.pointer = (u8 *) arg0_buf;
306 arg0_buf[0] = ACPI_PDC_REVISION_ID;
308 arg0_buf[2] = ACPI_PDC_CAPABILITY_ENHANCED_SPEEDSTEP;
312 /* register with ACPI core */
313 if (acpi_processor_register_performance(&p, 0))
316 /* verify the acpi_data */
317 if (p.state_count <= 1) {
318 printk(KERN_DEBUG "No P-States\n");
323 if ((p.control_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
324 (p.status_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
325 printk(KERN_DEBUG "Invalid control/status registers\n");
330 for (i=0; i<p.state_count; i++) {
331 if (p.states[i].control != p.states[i].status) {
332 printk(KERN_DEBUG "Different control and status values\n");
337 if (!p.states[i].core_frequency) {
338 printk(KERN_DEBUG "Zero core frequency\n");
343 if (extract_clock(p.states[i].control) !=
344 (p.states[i].core_frequency * 1000)) {
345 printk(KERN_DEBUG "Invalid encoded frequency\n");
351 centrino_model = kmalloc(sizeof(struct cpu_model), GFP_KERNEL);
352 if (!centrino_model) {
356 memset(centrino_model, 0, sizeof(struct cpu_model));
358 centrino_model->model_name=NULL;
359 centrino_model->max_freq = p.states[0].core_frequency * 1000;
360 centrino_model->op_points = kmalloc(sizeof(struct cpufreq_frequency_table) *
361 (p.state_count + 1), GFP_KERNEL);
362 if (!centrino_model->op_points) {
367 cur_freq = get_cur_freq(0);
369 for (i=0; i<p.state_count; i++) {
370 centrino_model->op_points[i].index = p.states[i].control;
371 centrino_model->op_points[i].frequency = p.states[i].core_frequency * 1000;
372 if (cur_freq == centrino_model->op_points[i].frequency)
375 centrino_model->op_points[p.state_count].frequency = CPUFREQ_TABLE_END;
380 kfree(centrino_model);
382 acpi_processor_unregister_performance(&p, 0);
386 static inline int centrino_cpu_init_acpi(struct cpufreq_policy *policy) { return -ENODEV; }
389 static int centrino_cpu_init(struct cpufreq_policy *policy)
391 struct cpuinfo_x86 *cpu = &cpu_data[policy->cpu];
396 if (policy->cpu != 0)
399 if (!cpu_has(cpu, X86_FEATURE_EST))
402 if ((centrino_verify_cpu_id(cpu, &cpu_id_banias)) &&
403 (centrino_verify_cpu_id(cpu, &cpu_id_dothan_a1))) {
404 printk(KERN_INFO PFX "found unsupported CPU with Enhanced SpeedStep: "
405 "send /proc/cpuinfo to " MAINTAINER "\n");
409 if (centrino_cpu_init_acpi(policy)) {
410 if (centrino_cpu_init_table(policy)) {
415 /* Check to see if Enhanced SpeedStep is enabled, and try to
417 rdmsr(MSR_IA32_MISC_ENABLE, l, h);
419 if (!(l & (1<<16))) {
421 wrmsr(MSR_IA32_MISC_ENABLE, l, h);
423 /* check to see if it stuck */
424 rdmsr(MSR_IA32_MISC_ENABLE, l, h);
425 if (!(l & (1<<16))) {
426 printk(KERN_INFO PFX "couldn't enable Enhanced SpeedStep\n");
431 freq = get_cur_freq(0);
433 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
434 policy->cpuinfo.transition_latency = 10000; /* 10uS transition latency */
437 dprintk(KERN_INFO PFX "centrino_cpu_init: policy=%d cur=%dkHz\n",
438 policy->policy, policy->cur);
440 ret = cpufreq_frequency_table_cpuinfo(policy, centrino_model->op_points);
444 cpufreq_frequency_table_get_attr(centrino_model->op_points, policy->cpu);
449 static int centrino_cpu_exit(struct cpufreq_policy *policy)
454 cpufreq_frequency_table_put_attr(policy->cpu);
456 #ifdef CONFIG_X86_SPEEDSTEP_CENTRINO_ACPI
457 if (!centrino_model->model_name) {
458 acpi_processor_unregister_performance(&p, 0);
459 kfree(centrino_model->op_points);
460 kfree(centrino_model);
464 centrino_model = NULL;
470 * centrino_verify - verifies a new CPUFreq policy
471 * @policy: new policy
473 * Limit must be within this model's frequency range at least one
476 static int centrino_verify (struct cpufreq_policy *policy)
478 return cpufreq_frequency_table_verify(policy, centrino_model->op_points);
482 * centrino_setpolicy - set a new CPUFreq policy
483 * @policy: new policy
484 * @target_freq: the target frequency
485 * @relation: how that frequency relates to achieved frequency (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
487 * Sets a new CPUFreq policy.
489 static int centrino_target (struct cpufreq_policy *policy,
490 unsigned int target_freq,
491 unsigned int relation)
493 unsigned int newstate = 0;
494 unsigned int msr, oldmsr, h;
495 struct cpufreq_freqs freqs;
497 if (centrino_model == NULL)
500 if (cpufreq_frequency_table_target(policy, centrino_model->op_points, target_freq,
501 relation, &newstate))
504 msr = centrino_model->op_points[newstate].index;
505 rdmsr(MSR_IA32_PERF_CTL, oldmsr, h);
507 if (msr == (oldmsr & 0xffff))
510 /* Hm, old frequency can either be the last value we put in
511 PERF_CTL, or whatever it is now. The trouble is that TM2
512 can change it behind our back, which means we never get to
513 see the speed change. Reading back the current speed would
514 tell us something happened, but it may leave the things on
515 the notifier chain confused; we therefore stick to using
516 the last programmed speed rather than the current speed for
519 TODO: work out how the TCC interrupts work, and try to
520 catch the CPU changing things under us.
523 freqs.old = extract_clock(oldmsr);
524 freqs.new = extract_clock(msr);
526 dprintk(KERN_INFO PFX "target=%dkHz old=%d new=%d msr=%04x\n",
527 target_freq, freqs.old, freqs.new, msr);
529 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
531 /* all but 16 LSB are "reserved", so treat them with
537 wrmsr(MSR_IA32_PERF_CTL, oldmsr, h);
539 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
544 static struct freq_attr* centrino_attr[] = {
545 &cpufreq_freq_attr_scaling_available_freqs,
549 static struct cpufreq_driver centrino_driver = {
550 .name = "centrino", /* should be speedstep-centrino,
551 but there's a 16 char limit */
552 .init = centrino_cpu_init,
553 .exit = centrino_cpu_exit,
554 .verify = centrino_verify,
555 .target = centrino_target,
557 .attr = centrino_attr,
558 .owner = THIS_MODULE,
563 * centrino_init - initializes the Enhanced SpeedStep CPUFreq driver
565 * Initializes the Enhanced SpeedStep support. Returns -ENODEV on
566 * unsupported devices, -ENOENT if there's no voltage table for this
567 * particular CPU model, -EINVAL on problems during initiatization,
568 * and zero on success.
570 * This is quite picky. Not only does the CPU have to advertise the
571 * "est" flag in the cpuid capability flags, we look for a specific
572 * CPU model and stepping, and we need to have the exact model name in
573 * our voltage tables. That is, be paranoid about not releasing
574 * someone's valuable magic smoke.
576 static int __init centrino_init(void)
578 struct cpuinfo_x86 *cpu = cpu_data;
580 if (!cpu_has(cpu, X86_FEATURE_EST))
583 return cpufreq_register_driver(¢rino_driver);
586 static void __exit centrino_exit(void)
588 cpufreq_unregister_driver(¢rino_driver);
591 MODULE_AUTHOR ("Jeremy Fitzhardinge <jeremy@goop.org>");
592 MODULE_DESCRIPTION ("Enhanced SpeedStep driver for Intel Pentium M processors.");
593 MODULE_LICENSE ("GPL");
595 late_initcall(centrino_init);
596 module_exit(centrino_exit);