2 * (C) 2001 Dave Jones, Arjan van de ven.
3 * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
5 * Licensed under the terms of the GNU GPL License version 2.
6 * Based upon reverse engineered information, and on Intel documentation
7 * for chipsets ICH2-M and ICH3-M.
9 * Many thanks to Ducrot Bruno for finding and fixing the last
10 * "missing link" for ICH2-M/ICH3-M support, and to Thomas Winkler
11 * for extensive testing.
13 * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
17 /*********************************************************************
18 * SPEEDSTEP - DEFINITIONS *
19 *********************************************************************/
21 #include <linux/kernel.h>
22 #include <linux/module.h>
23 #include <linux/init.h>
24 #include <linux/cpufreq.h>
25 #include <linux/pci.h>
26 #include <linux/slab.h>
28 #include "speedstep-lib.h"
32 * It is necessary to know which chipset is used. As accesses to
33 * this device occur at various places in this module, we need a
34 * static struct pci_dev * pointing to that device.
36 static struct pci_dev *speedstep_chipset_dev;
39 /* speedstep_processor
41 static unsigned int speedstep_processor = 0;
45 * There are only two frequency states for each processor. Values
46 * are in kHz for the time being.
48 static struct cpufreq_frequency_table speedstep_freqs[] = {
51 {0, CPUFREQ_TABLE_END},
56 * Define it if you want verbose debug output, e.g. for bug reporting
58 //#define SPEEDSTEP_DEBUG
60 #ifdef SPEEDSTEP_DEBUG
61 #define dprintk(msg...) printk(msg)
63 #define dprintk(msg...) do { } while(0)
68 * speedstep_set_state - set the SpeedStep state
69 * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
71 * Tries to change the SpeedStep state.
73 static void speedstep_set_state (unsigned int state)
80 if (!speedstep_chipset_dev || (state > 0x1))
84 pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase);
87 printk(KERN_ERR "cpufreq: could not find speedstep register\n");
93 printk(KERN_ERR "cpufreq: could not find speedstep register\n");
98 local_irq_save(flags);
101 value = inb(pmbase + 0x50);
103 dprintk(KERN_DEBUG "cpufreq: read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
105 /* write new state */
109 dprintk(KERN_DEBUG "cpufreq: writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase);
111 /* Disable bus master arbitration */
112 pm2_blk = inb(pmbase + 0x20);
114 outb(pm2_blk, (pmbase + 0x20));
116 /* Actual transition */
117 outb(value, (pmbase + 0x50));
119 /* Restore bus master arbitration */
121 outb(pm2_blk, (pmbase + 0x20));
123 /* check if transition was successful */
124 value = inb(pmbase + 0x50);
127 local_irq_restore(flags);
129 dprintk(KERN_DEBUG "cpufreq: read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
131 if (state == (value & 0x1)) {
132 dprintk (KERN_INFO "cpufreq: change to %u MHz succeeded\n", (speedstep_get_processor_frequency(speedstep_processor) / 1000));
134 printk (KERN_ERR "cpufreq: change failed - I/O error\n");
142 * speedstep_activate - activate SpeedStep control in the chipset
144 * Tries to activate the SpeedStep status and control registers.
145 * Returns -EINVAL on an unsupported chipset, and zero on success.
147 static int speedstep_activate (void)
151 if (!speedstep_chipset_dev)
154 pci_read_config_word(speedstep_chipset_dev,
156 if (!(value & 0x08)) {
158 dprintk(KERN_DEBUG "cpufreq: activating SpeedStep (TM) registers\n");
159 pci_write_config_word(speedstep_chipset_dev,
168 * speedstep_detect_chipset - detect the Southbridge which contains SpeedStep logic
170 * Detects ICH2-M, ICH3-M and ICH4-M so far. The pci_dev points to
171 * the LPC bridge / PM module which contains all power-management
172 * functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected
173 * chipset, or zero on failure.
175 static unsigned int speedstep_detect_chipset (void)
177 speedstep_chipset_dev = pci_find_subsys(PCI_VENDOR_ID_INTEL,
178 PCI_DEVICE_ID_INTEL_82801DB_12,
182 if (speedstep_chipset_dev)
185 speedstep_chipset_dev = pci_find_subsys(PCI_VENDOR_ID_INTEL,
186 PCI_DEVICE_ID_INTEL_82801CA_12,
190 if (speedstep_chipset_dev)
194 speedstep_chipset_dev = pci_find_subsys(PCI_VENDOR_ID_INTEL,
195 PCI_DEVICE_ID_INTEL_82801BA_10,
199 if (speedstep_chipset_dev) {
200 /* speedstep.c causes lockups on Dell Inspirons 8000 and
201 * 8100 which use a pretty old revision of the 82815
202 * host brige. Abort on these systems.
204 static struct pci_dev *hostbridge;
207 hostbridge = pci_find_subsys(PCI_VENDOR_ID_INTEL,
208 PCI_DEVICE_ID_INTEL_82815_MC,
216 pci_read_config_byte(hostbridge, PCI_REVISION_ID, &rev);
218 dprintk(KERN_INFO "cpufreq: hostbridge does not support speedstep\n");
219 speedstep_chipset_dev = NULL;
231 * speedstep_target - set a new CPUFreq policy
232 * @policy: new policy
233 * @target_freq: the target frequency
234 * @relation: how that frequency relates to achieved frequency (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
236 * Sets a new CPUFreq policy.
238 static int speedstep_target (struct cpufreq_policy *policy,
239 unsigned int target_freq,
240 unsigned int relation)
242 unsigned int newstate = 0;
243 struct cpufreq_freqs freqs;
244 cpumask_t cpus_allowed, affected_cpu_map;
247 if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0], target_freq, relation, &newstate))
250 /* no transition necessary */
251 if (freqs.old == freqs.new)
254 freqs.old = speedstep_get_processor_frequency(speedstep_processor);
255 freqs.new = speedstep_freqs[newstate].frequency;
256 freqs.cpu = policy->cpu;
258 cpus_allowed = current->cpus_allowed;
260 /* only run on CPU to be set, or on its sibling */
262 affected_cpu_map = cpu_sibling_map[policy->cpu];
264 affected_cpu_map = cpumask_of_cpu(policy->cpu);
267 for_each_cpu_mask(i, affected_cpu_map) {
269 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
272 /* switch to physical CPU where state is to be changed */
273 set_cpus_allowed(current, affected_cpu_map);
275 speedstep_set_state(newstate);
277 /* allow to be run on all CPUs */
278 set_cpus_allowed(current, cpus_allowed);
280 for_each_cpu_mask(i, affected_cpu_map) {
282 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
290 * speedstep_verify - verifies a new CPUFreq policy
291 * @policy: new policy
293 * Limit must be within speedstep_low_freq and speedstep_high_freq, with
294 * at least one border included.
296 static int speedstep_verify (struct cpufreq_policy *policy)
298 return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]);
302 static int speedstep_cpu_init(struct cpufreq_policy *policy)
306 cpumask_t cpus_allowed,affected_cpu_map;
309 /* capability check */
310 if (policy->cpu != 0) /* FIXME: better support for SMT in cpufreq core. Up until then, it's better to register only one CPU */
313 /* only run on CPU to be set, or on its sibling */
314 cpus_allowed = current->cpus_allowed;
316 affected_cpu_map = cpu_sibling_map[policy->cpu];
318 affected_cpu_map = cpumask_of_cpu(policy->cpu);
320 set_cpus_allowed(current, affected_cpu_map);
322 /* detect low and high frequency */
323 result = speedstep_get_freqs(speedstep_processor,
324 &speedstep_freqs[SPEEDSTEP_LOW].frequency,
325 &speedstep_freqs[SPEEDSTEP_HIGH].frequency,
326 &speedstep_set_state);
328 set_cpus_allowed(current, cpus_allowed);
332 /* get current speed setting */
333 speed = speedstep_get_processor_frequency(speedstep_processor);
334 set_cpus_allowed(current, cpus_allowed);
338 dprintk(KERN_INFO "cpufreq: currently at %s speed setting - %i MHz\n",
339 (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency) ? "low" : "high",
342 /* cpuinfo and default policy values */
343 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
344 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
347 result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs);
351 cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);
357 static int speedstep_cpu_exit(struct cpufreq_policy *policy)
359 cpufreq_frequency_table_put_attr(policy->cpu);
363 static unsigned int speedstep_get(unsigned int cpu)
365 return speedstep_get_processor_frequency(speedstep_processor);
368 static struct freq_attr* speedstep_attr[] = {
369 &cpufreq_freq_attr_scaling_available_freqs,
374 static struct cpufreq_driver speedstep_driver = {
375 .name = "speedstep-ich",
376 .verify = speedstep_verify,
377 .target = speedstep_target,
378 .init = speedstep_cpu_init,
379 .exit = speedstep_cpu_exit,
380 .get = speedstep_get,
381 .owner = THIS_MODULE,
382 .attr = speedstep_attr,
387 * speedstep_init - initializes the SpeedStep CPUFreq driver
389 * Initializes the SpeedStep support. Returns -ENODEV on unsupported
390 * devices, -EINVAL on problems during initiatization, and zero on
393 static int __init speedstep_init(void)
395 /* detect processor */
396 speedstep_processor = speedstep_detect_processor();
397 if (!speedstep_processor)
401 if (!speedstep_detect_chipset()) {
402 printk(KERN_INFO "cpufreq: Intel(R) SpeedStep(TM) for this chipset not (yet) available.\n");
406 /* activate speedstep support */
407 if (speedstep_activate())
410 return cpufreq_register_driver(&speedstep_driver);
415 * speedstep_exit - unregisters SpeedStep support
417 * Unregisters SpeedStep support.
419 static void __exit speedstep_exit(void)
421 cpufreq_unregister_driver(&speedstep_driver);
425 MODULE_AUTHOR ("Dave Jones <davej@codemonkey.org.uk>, Dominik Brodowski <linux@brodo.de>");
426 MODULE_DESCRIPTION ("Speedstep driver for Intel mobile processors on chipsets with ICH-M southbridges.");
427 MODULE_LICENSE ("GPL");
429 module_init(speedstep_init);
430 module_exit(speedstep_exit);