Merge to Fedora kernel-2.6.18-1.2224_FC5 patched with stable patch-2.6.18.1-vs2.0...
[linux-2.6.git] / arch / i386 / kernel / irq.c
1 /*
2  *      linux/arch/i386/kernel/irq.c
3  *
4  *      Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
5  *
6  * This file contains the lowest level x86-specific interrupt
7  * entry, irq-stacks and irq statistics code. All the remaining
8  * irq logic is done by the generic kernel/irq/ code and
9  * by the x86-specific irq controller code. (e.g. i8259.c and
10  * io_apic.c.)
11  */
12
13 #include <asm/uaccess.h>
14 #include <linux/module.h>
15 #include <linux/seq_file.h>
16 #include <linux/interrupt.h>
17 #include <linux/kernel_stat.h>
18 #include <linux/notifier.h>
19 #include <linux/cpu.h>
20 #include <linux/delay.h>
21 #include <linux/vs_context.h>
22
23 DEFINE_PER_CPU(irq_cpustat_t, irq_stat) ____cacheline_internodealigned_in_smp;
24 EXPORT_PER_CPU_SYMBOL(irq_stat);
25
26 #ifndef CONFIG_X86_LOCAL_APIC
27 /*
28  * 'what should we do if we get a hw irq event on an illegal vector'.
29  * each architecture has to answer this themselves.
30  */
31 void ack_bad_irq(unsigned int irq)
32 {
33         printk("unexpected IRQ trap at vector %02x\n", irq);
34 }
35 #endif
36
37 #ifdef CONFIG_4KSTACKS
38 /*
39  * per-CPU IRQ handling contexts (thread information and stack)
40  */
41 union irq_ctx {
42         struct thread_info      tinfo;
43         u32                     stack[THREAD_SIZE/sizeof(u32)];
44 };
45
46 static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly;
47 static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly;
48 #endif
49
50 /*
51  * do_IRQ handles all normal device IRQ's (the special
52  * SMP cross-CPU interrupts have their own specific
53  * handlers).
54  */
55 fastcall unsigned int do_IRQ(struct pt_regs *regs)
56 {       
57         /* high bit used in ret_from_ code */
58         int irq = ~regs->orig_eax;
59         struct vx_info_save vxis;
60 #ifdef CONFIG_4KSTACKS
61         union irq_ctx *curctx, *irqctx;
62         u32 *isp;
63 #endif
64
65         if (unlikely((unsigned)irq >= NR_IRQS)) {
66                 printk(KERN_EMERG "%s: cannot handle IRQ %d\n",
67                                         __FUNCTION__, irq);
68                 BUG();
69         }
70
71         irq_enter();
72 #ifdef CONFIG_DEBUG_STACKOVERFLOW
73         /* Debugging check for stack overflow: is there less than 1KB free? */
74         {
75                 long esp;
76
77                 __asm__ __volatile__("andl %%esp,%0" :
78                                         "=r" (esp) : "0" (THREAD_SIZE - 1));
79                 if (unlikely(esp < (sizeof(struct thread_info) + STACK_WARN))) {
80                         printk("do_IRQ: stack overflow: %ld\n",
81                                 esp - sizeof(struct thread_info));
82                         dump_stack();
83                 }
84         }
85 #endif
86         __enter_vx_admin(&vxis);
87 #ifdef CONFIG_4KSTACKS
88
89         curctx = (union irq_ctx *) current_thread_info();
90         irqctx = hardirq_ctx[smp_processor_id()];
91
92         /*
93          * this is where we switch to the IRQ stack. However, if we are
94          * already using the IRQ stack (because we interrupted a hardirq
95          * handler) we can't do that and just have to keep using the
96          * current stack (which is the irq stack already after all)
97          */
98         if (curctx != irqctx) {
99                 int arg1, arg2, ebx;
100
101                 /* build the stack frame on the IRQ stack */
102                 isp = (u32*) ((char*)irqctx + sizeof(*irqctx));
103                 irqctx->tinfo.task = curctx->tinfo.task;
104                 irqctx->tinfo.previous_esp = current_stack_pointer;
105
106                 /*
107                  * Copy the softirq bits in preempt_count so that the
108                  * softirq checks work in the hardirq context.
109                  */
110                 irqctx->tinfo.preempt_count =
111                         (irqctx->tinfo.preempt_count & ~SOFTIRQ_MASK) |
112                         (curctx->tinfo.preempt_count & SOFTIRQ_MASK);
113
114                 asm volatile(
115                         "       xchgl   %%ebx,%%esp      \n"
116                         "       call    __do_IRQ         \n"
117                         "       movl   %%ebx,%%esp      \n"
118                         : "=a" (arg1), "=d" (arg2), "=b" (ebx)
119                         :  "0" (irq),   "1" (regs),  "2" (isp)
120                         : "memory", "cc", "ecx"
121                 );
122         } else
123 #endif
124                 __do_IRQ(irq, regs);
125         __leave_vx_admin(&vxis);
126
127         irq_exit();
128
129         return 1;
130 }
131
132 #ifdef CONFIG_4KSTACKS
133
134 /*
135  * These should really be __section__(".bss.page_aligned") as well, but
136  * gcc's 3.0 and earlier don't handle that correctly.
137  */
138 static char softirq_stack[NR_CPUS * THREAD_SIZE]
139                 __attribute__((__aligned__(THREAD_SIZE)));
140
141 static char hardirq_stack[NR_CPUS * THREAD_SIZE]
142                 __attribute__((__aligned__(THREAD_SIZE)));
143
144 /*
145  * allocate per-cpu stacks for hardirq and for softirq processing
146  */
147 void irq_ctx_init(int cpu)
148 {
149         union irq_ctx *irqctx;
150
151         if (hardirq_ctx[cpu])
152                 return;
153
154         irqctx = (union irq_ctx*) &hardirq_stack[cpu*THREAD_SIZE];
155         irqctx->tinfo.task              = NULL;
156         irqctx->tinfo.exec_domain       = NULL;
157         irqctx->tinfo.cpu               = cpu;
158         irqctx->tinfo.preempt_count     = HARDIRQ_OFFSET;
159         irqctx->tinfo.addr_limit        = MAKE_MM_SEG(0);
160
161         hardirq_ctx[cpu] = irqctx;
162
163         irqctx = (union irq_ctx*) &softirq_stack[cpu*THREAD_SIZE];
164         irqctx->tinfo.task              = NULL;
165         irqctx->tinfo.exec_domain       = NULL;
166         irqctx->tinfo.cpu               = cpu;
167         irqctx->tinfo.preempt_count     = 0;
168         irqctx->tinfo.addr_limit        = MAKE_MM_SEG(0);
169
170         softirq_ctx[cpu] = irqctx;
171
172         printk("CPU %u irqstacks, hard=%p soft=%p\n",
173                 cpu,hardirq_ctx[cpu],softirq_ctx[cpu]);
174 }
175
176 void irq_ctx_exit(int cpu)
177 {
178         hardirq_ctx[cpu] = NULL;
179 }
180
181 extern asmlinkage void __do_softirq(void);
182
183 asmlinkage void do_softirq(void)
184 {
185         unsigned long flags;
186         struct thread_info *curctx;
187         union irq_ctx *irqctx;
188         u32 *isp;
189
190         if (in_interrupt())
191                 return;
192
193         local_irq_save(flags);
194
195         if (local_softirq_pending()) {
196                 curctx = current_thread_info();
197                 irqctx = softirq_ctx[smp_processor_id()];
198                 irqctx->tinfo.task = curctx->task;
199                 irqctx->tinfo.previous_esp = current_stack_pointer;
200
201                 /* build the stack frame on the softirq stack */
202                 isp = (u32*) ((char*)irqctx + sizeof(*irqctx));
203
204                 asm volatile(
205                         "       xchgl   %%ebx,%%esp     \n"
206                         "       call    __do_softirq    \n"
207                         "       movl    %%ebx,%%esp     \n"
208                         : "=b"(isp)
209                         : "0"(isp)
210                         : "memory", "cc", "edx", "ecx", "eax"
211                 );
212                 /*
213                  * Shouldnt happen, we returned above if in_interrupt():
214                  */
215                 WARN_ON_ONCE(softirq_count());
216         }
217
218         local_irq_restore(flags);
219 }
220
221 EXPORT_SYMBOL(do_softirq);
222 #endif
223
224 /*
225  * Interrupt statistics:
226  */
227
228 atomic_t irq_err_count;
229
230 /*
231  * /proc/interrupts printing:
232  */
233
234 int show_interrupts(struct seq_file *p, void *v)
235 {
236         int i = *(loff_t *) v, j;
237         struct irqaction * action;
238         unsigned long flags;
239
240         if (i == 0) {
241                 seq_printf(p, "           ");
242                 for_each_online_cpu(j)
243                         seq_printf(p, "CPU%-8d",j);
244                 seq_putc(p, '\n');
245         }
246
247         if (i < NR_IRQS) {
248                 spin_lock_irqsave(&irq_desc[i].lock, flags);
249                 action = irq_desc[i].action;
250                 if (!action)
251                         goto skip;
252                 seq_printf(p, "%3d: ",i);
253 #ifndef CONFIG_SMP
254                 seq_printf(p, "%10u ", kstat_irqs(i));
255 #else
256                 for_each_online_cpu(j)
257                         seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
258 #endif
259                 seq_printf(p, " %14s", irq_desc[i].chip->typename);
260                 seq_printf(p, "  %s", action->name);
261
262                 for (action=action->next; action; action = action->next)
263                         seq_printf(p, ", %s", action->name);
264
265                 seq_putc(p, '\n');
266 skip:
267                 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
268         } else if (i == NR_IRQS) {
269                 seq_printf(p, "NMI: ");
270                 for_each_online_cpu(j)
271                         seq_printf(p, "%10u ", nmi_count(j));
272                 seq_putc(p, '\n');
273 #ifdef CONFIG_X86_LOCAL_APIC
274                 seq_printf(p, "LOC: ");
275                 for_each_online_cpu(j)
276                         seq_printf(p, "%10u ",
277                                 per_cpu(irq_stat,j).apic_timer_irqs);
278                 seq_putc(p, '\n');
279 #endif
280                 seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
281 #if defined(CONFIG_X86_IO_APIC)
282                 seq_printf(p, "MIS: %10u\n", atomic_read(&irq_mis_count));
283 #endif
284         }
285         return 0;
286 }
287
288 #ifdef CONFIG_HOTPLUG_CPU
289 #include <mach_apic.h>
290
291 void fixup_irqs(cpumask_t map)
292 {
293         unsigned int irq;
294         static int warned;
295
296         for (irq = 0; irq < NR_IRQS; irq++) {
297                 cpumask_t mask;
298                 if (irq == 2)
299                         continue;
300
301                 cpus_and(mask, irq_desc[irq].affinity, map);
302                 if (any_online_cpu(mask) == NR_CPUS) {
303                         printk("Breaking affinity for irq %i\n", irq);
304                         mask = map;
305                 }
306                 if (irq_desc[irq].chip->set_affinity)
307                         irq_desc[irq].chip->set_affinity(irq, mask);
308                 else if (irq_desc[irq].action && !(warned++))
309                         printk("Cannot set affinity for irq %i\n", irq);
310         }
311
312 #if 0
313         barrier();
314         /* Ingo Molnar says: "after the IO-APIC masks have been redirected
315            [note the nop - the interrupt-enable boundary on x86 is two
316            instructions from sti] - to flush out pending hardirqs and
317            IPIs. After this point nothing is supposed to reach this CPU." */
318         __asm__ __volatile__("sti; nop; cli");
319         barrier();
320 #else
321         /* That doesn't seem sufficient.  Give it 1ms. */
322         local_irq_enable();
323         mdelay(1);
324         local_irq_disable();
325 #endif
326 }
327 #endif
328