2 * linux/arch/i386/traps.c
4 * Copyright (C) 1991, 1992 Linus Torvalds
6 * Pentium III FXSR, SSE support
7 * Gareth Hughes <gareth@valinux.com>, May 2000
11 * 'Traps.c' handles hardware traps and faults after we have saved some
14 #include <linux/config.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
17 #include <linux/string.h>
18 #include <linux/errno.h>
19 #include <linux/timer.h>
21 #include <linux/init.h>
22 #include <linux/delay.h>
23 #include <linux/spinlock.h>
24 #include <linux/interrupt.h>
25 #include <linux/highmem.h>
26 #include <linux/kallsyms.h>
27 #include <linux/ptrace.h>
28 #include <linux/version.h>
31 #include <linux/ioport.h>
32 #include <linux/eisa.h>
36 #include <linux/mca.h>
39 #include <asm/processor.h>
40 #include <asm/system.h>
41 #include <asm/uaccess.h>
43 #include <asm/atomic.h>
44 #include <asm/debugreg.h>
50 #include <asm/pgalloc.h>
51 #include <asm/arch_hooks.h>
53 #include <linux/irq.h>
54 #include <linux/module.h>
56 #include "mach_traps.h"
58 asmlinkage int system_call(void);
59 asmlinkage void lcall7(void);
60 asmlinkage void lcall27(void);
62 struct desc_struct default_ldt[] = { { 0, 0 }, { 0, 0 }, { 0, 0 },
65 /* Do we ignore FPU interrupts ? */
66 char ignore_fpu_irq = 0;
69 * The IDT has to be page-aligned to simplify the Pentium
70 * F0 0F bug workaround.. We have a special link segment
73 struct desc_struct idt_table[256] __attribute__((__section__(".data.idt"))) = { {0, 0}, };
75 asmlinkage void divide_error(void);
76 asmlinkage void debug(void);
77 asmlinkage void nmi(void);
78 asmlinkage void int3(void);
79 asmlinkage void overflow(void);
80 asmlinkage void bounds(void);
81 asmlinkage void invalid_op(void);
82 asmlinkage void device_not_available(void);
83 asmlinkage void coprocessor_segment_overrun(void);
84 asmlinkage void invalid_TSS(void);
85 asmlinkage void segment_not_present(void);
86 asmlinkage void stack_segment(void);
87 asmlinkage void general_protection(void);
88 asmlinkage void page_fault(void);
89 asmlinkage void coprocessor_error(void);
90 asmlinkage void simd_coprocessor_error(void);
91 asmlinkage void alignment_check(void);
92 asmlinkage void spurious_interrupt_bug(void);
93 asmlinkage void machine_check(void);
95 static int kstack_depth_to_print = 24;
97 void show_trace(struct task_struct *task, unsigned long * stack)
102 stack = (unsigned long*)&stack;
104 printk("Call Trace:");
105 #ifdef CONFIG_KALLSYMS
109 struct thread_info *context;
110 context = (struct thread_info*) ((unsigned long)stack & (~(THREAD_SIZE - 1)));
111 while (!kstack_end(stack)) {
113 if (kernel_text_address(addr)) {
114 printk(" [<%08lx>] ", addr);
115 print_symbol("%s\n", addr);
118 stack = (unsigned long*)context->previous_esp;
121 printk(" =======================\n");
126 void show_stack(struct task_struct *task, unsigned long *esp)
128 unsigned long *stack;
133 esp = (unsigned long*)task->thread.esp;
135 esp = (unsigned long *)&esp;
139 for(i = 0; i < kstack_depth_to_print; i++) {
140 if (kstack_end(stack))
142 if (i && ((i % 8) == 0))
144 printk("%08lx ", *stack++);
147 show_trace(task, esp);
151 * The architecture-independent dump_stack generator
153 void dump_stack(void)
157 show_trace(current, &stack);
160 EXPORT_SYMBOL(dump_stack);
162 void show_registers(struct pt_regs *regs)
169 esp = (unsigned long) (®s->esp);
174 ss = regs->xss & 0xffff;
177 printk("CPU: %d\nEIP: %04x:[<%08lx>] %s\nEFLAGS: %08lx"
179 smp_processor_id(), 0xffff & regs->xcs, regs->eip,
180 print_tainted(), regs->eflags, UTS_RELEASE);
181 print_symbol("EIP is at %s\n", regs->eip);
182 printk("eax: %08lx ebx: %08lx ecx: %08lx edx: %08lx\n",
183 regs->eax, regs->ebx, regs->ecx, regs->edx);
184 printk("esi: %08lx edi: %08lx ebp: %08lx esp: %08lx\n",
185 regs->esi, regs->edi, regs->ebp, esp);
186 printk("ds: %04x es: %04x ss: %04x\n",
187 regs->xds & 0xffff, regs->xes & 0xffff, ss);
188 printk("Process %s (pid: %d, threadinfo=%p task=%p)",
189 current->comm, current->pid, current_thread_info(), current);
191 * When in-kernel, we also print out the stack and code at the
192 * time of the fault..
197 show_stack(NULL, (unsigned long*)esp);
200 if(regs->eip < PAGE_OFFSET)
206 if(__get_user(c, &((unsigned char*)regs->eip)[i])) {
208 printk(" Bad EIP value.");
217 static void handle_BUG(struct pt_regs *regs)
226 goto no_bug; /* Not in kernel */
230 if (eip < PAGE_OFFSET)
232 if (__get_user(ud2, (unsigned short *)eip))
236 if (__get_user(line, (unsigned short *)(eip + 2)))
238 if (__get_user(file, (char **)(eip + 4)) ||
239 (unsigned long)file < PAGE_OFFSET || __get_user(c, file))
240 file = "<bad filename>";
242 printk("------------[ cut here ]------------\n");
243 printk("kernel BUG at %s:%d!\n", file, line);
248 /* Here we know it was a BUG but file-n-line is unavailable */
250 printk("Kernel BUG\n");
253 spinlock_t die_lock = SPIN_LOCK_UNLOCKED;
255 void die(const char * str, struct pt_regs * regs, long err)
257 static int die_counter;
261 spin_lock_irq(&die_lock);
264 printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
265 #ifdef CONFIG_PREEMPT
273 #ifdef CONFIG_DEBUG_PAGEALLOC
274 printk("DEBUG_PAGEALLOC");
279 show_registers(regs);
281 spin_unlock_irq(&die_lock);
283 panic("Fatal exception in interrupt");
286 printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
287 set_current_state(TASK_UNINTERRUPTIBLE);
288 schedule_timeout(5 * HZ);
289 panic("Fatal exception");
294 static inline void die_if_kernel(const char * str, struct pt_regs * regs, long err)
296 if (!(regs->eflags & VM_MASK) && !(3 & regs->xcs))
300 static inline unsigned long get_cr2(void)
302 unsigned long address;
304 /* get the address */
305 __asm__("movl %%cr2,%0":"=r" (address));
309 static inline void do_trap(int trapnr, int signr, char *str, int vm86,
310 struct pt_regs * regs, long error_code, siginfo_t *info)
312 if (regs->eflags & VM_MASK) {
318 if (!(regs->xcs & 3))
322 struct task_struct *tsk = current;
323 tsk->thread.error_code = error_code;
324 tsk->thread.trap_no = trapnr;
326 force_sig_info(signr, info, tsk);
328 force_sig(signr, tsk);
333 if (!fixup_exception(regs))
334 die(str, regs, error_code);
339 int ret = handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, trapnr);
340 if (ret) goto trap_signal;
345 #define DO_ERROR(trapnr, signr, str, name) \
346 asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
348 do_trap(trapnr, signr, str, 0, regs, error_code, NULL); \
351 #define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
352 asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
355 info.si_signo = signr; \
357 info.si_code = sicode; \
358 info.si_addr = (void *)siaddr; \
359 do_trap(trapnr, signr, str, 0, regs, error_code, &info); \
362 #define DO_VM86_ERROR(trapnr, signr, str, name) \
363 asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
365 do_trap(trapnr, signr, str, 1, regs, error_code, NULL); \
368 #define DO_VM86_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
369 asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
372 info.si_signo = signr; \
374 info.si_code = sicode; \
375 info.si_addr = (void *)siaddr; \
376 do_trap(trapnr, signr, str, 1, regs, error_code, &info); \
379 DO_VM86_ERROR_INFO( 0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->eip)
380 DO_VM86_ERROR( 3, SIGTRAP, "int3", int3)
381 DO_VM86_ERROR( 4, SIGSEGV, "overflow", overflow)
382 DO_VM86_ERROR( 5, SIGSEGV, "bounds", bounds)
383 DO_ERROR_INFO( 6, SIGILL, "invalid operand", invalid_op, ILL_ILLOPN, regs->eip)
384 DO_ERROR( 9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
385 DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
386 DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
387 DO_ERROR(12, SIGBUS, "stack segment", stack_segment)
388 DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, get_cr2())
390 asmlinkage void do_general_protection(struct pt_regs * regs, long error_code)
392 if (regs->eflags & X86_EFLAGS_IF)
395 if (regs->eflags & VM_MASK)
398 if (!(regs->xcs & 3))
401 current->thread.error_code = error_code;
402 current->thread.trap_no = 13;
403 force_sig(SIGSEGV, current);
408 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
412 if (!fixup_exception(regs))
413 die("general protection fault", regs, error_code);
416 static void mem_parity_error(unsigned char reason, struct pt_regs * regs)
418 printk("Uhhuh. NMI received. Dazed and confused, but trying to continue\n");
419 printk("You probably have a hardware problem with your RAM chips\n");
421 /* Clear and disable the memory parity error line. */
422 clear_mem_error(reason);
425 static void io_check_error(unsigned char reason, struct pt_regs * regs)
429 printk("NMI: IOCK error (debug interrupt?)\n");
430 show_registers(regs);
432 /* Re-enable the IOCK line, wait for a few seconds */
433 reason = (reason & 0xf) | 8;
436 while (--i) udelay(1000);
441 static void unknown_nmi_error(unsigned char reason, struct pt_regs * regs)
444 /* Might actually be able to figure out what the guilty party
451 printk("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
452 reason, smp_processor_id());
453 printk("Dazed and confused, but trying to continue\n");
454 printk("Do you have a strange power saving mode enabled?\n");
457 static void default_do_nmi(struct pt_regs * regs)
459 unsigned char reason = get_nmi_reason();
461 if (!(reason & 0xc0)) {
462 #ifdef CONFIG_X86_LOCAL_APIC
464 * Ok, so this is none of the documented NMI sources,
465 * so it must be the NMI watchdog.
468 nmi_watchdog_tick(regs);
472 unknown_nmi_error(reason, regs);
476 mem_parity_error(reason, regs);
478 io_check_error(reason, regs);
480 * Reassert NMI in case it became active meanwhile
481 * as it's edge-triggered.
486 static int dummy_nmi_callback(struct pt_regs * regs, int cpu)
491 static nmi_callback_t nmi_callback = dummy_nmi_callback;
493 asmlinkage void do_nmi(struct pt_regs * regs, long error_code)
499 cpu = smp_processor_id();
502 if (!nmi_callback(regs, cpu))
503 default_do_nmi(regs);
508 void set_nmi_callback(nmi_callback_t callback)
510 nmi_callback = callback;
513 void unset_nmi_callback(void)
515 nmi_callback = dummy_nmi_callback;
519 * Our handling of the processor debug registers is non-trivial.
520 * We do not clear them on entry and exit from the kernel. Therefore
521 * it is possible to get a watchpoint trap here from inside the kernel.
522 * However, the code in ./ptrace.c has ensured that the user can
523 * only set watchpoints on userspace addresses. Therefore the in-kernel
524 * watchpoint trap can only occur in code which is reading/writing
525 * from user space. Such code must not hold kernel locks (since it
526 * can equally take a page fault), therefore it is safe to call
527 * force_sig_info even though that claims and releases locks.
529 * Code in ./signal.c ensures that the debug control register
530 * is restored before we deliver any signal, and therefore that
531 * user code runs with the correct debug control register even though
534 * Being careful here means that we don't have to be as careful in a
535 * lot of more complicated places (task switching can be a bit lazy
536 * about restoring all the debug state, and ptrace doesn't have to
537 * find every occurrence of the TF bit that could be saved away even
540 asmlinkage void do_debug(struct pt_regs * regs, long error_code)
542 unsigned int condition;
543 struct task_struct *tsk = current;
546 __asm__ __volatile__("movl %%db6,%0" : "=r" (condition));
548 /* It's safe to allow irq's after DR6 has been saved */
549 if (regs->eflags & X86_EFLAGS_IF)
552 /* Mask out spurious debug traps due to lazy DR7 setting */
553 if (condition & (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)) {
554 if (!tsk->thread.debugreg[7])
558 if (regs->eflags & VM_MASK)
561 /* Save debug status register where ptrace can see it */
562 tsk->thread.debugreg[6] = condition;
564 /* Mask out spurious TF errors due to lazy TF clearing */
565 if (condition & DR_STEP) {
567 * The TF error should be masked out only if the current
568 * process is not traced and if the TRAP flag has been set
569 * previously by a tracing process (condition detected by
570 * the PT_DTRACE flag); remember that the i386 TRAP flag
571 * can be modified by the process itself in user mode,
572 * allowing programs to debug themselves without the ptrace()
575 if ((regs->xcs & 3) == 0)
576 goto clear_TF_reenable;
577 if ((tsk->ptrace & (PT_DTRACE|PT_PTRACED)) == PT_DTRACE)
581 /* Ok, finally something we can handle */
582 tsk->thread.trap_no = 1;
583 tsk->thread.error_code = error_code;
584 info.si_signo = SIGTRAP;
586 info.si_code = TRAP_BRKPT;
588 /* If this is a kernel mode trap, save the user PC on entry to
589 * the kernel, that's what the debugger can make sense of.
591 info.si_addr = ((regs->xcs & 3) == 0) ? (void *)tsk->thread.eip :
593 force_sig_info(SIGTRAP, &info, tsk);
595 /* Disable additional traps. They'll be re-enabled when
596 * the signal is delivered.
599 __asm__("movl %0,%%db7"
605 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 1);
609 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
611 regs->eflags &= ~TF_MASK;
616 * Note that we play around with the 'TS' bit in an attempt to get
617 * the correct behaviour even in the presence of the asynchronous
620 void math_error(void *eip)
622 struct task_struct * task;
624 unsigned short cwd, swd;
627 * Save the info for the exception handler and clear the error.
631 task->thread.trap_no = 16;
632 task->thread.error_code = 0;
633 info.si_signo = SIGFPE;
635 info.si_code = __SI_FAULT;
638 * (~cwd & swd) will mask out exceptions that are not set to unmasked
639 * status. 0x3f is the exception bits in these regs, 0x200 is the
640 * C1 reg you need in case of a stack fault, 0x040 is the stack
641 * fault bit. We should only be taking one exception at a time,
642 * so if this combination doesn't produce any single exception,
643 * then we have a bad program that isn't syncronizing its FPU usage
644 * and it will suffer the consequences since we won't be able to
645 * fully reproduce the context of the exception
647 cwd = get_fpu_cwd(task);
648 swd = get_fpu_swd(task);
649 switch (((~cwd) & swd & 0x3f) | (swd & 0x240)) {
653 case 0x001: /* Invalid Op */
654 case 0x041: /* Stack Fault */
655 case 0x241: /* Stack Fault | Direction */
656 info.si_code = FPE_FLTINV;
657 /* Should we clear the SF or let user space do it ???? */
659 case 0x002: /* Denormalize */
660 case 0x010: /* Underflow */
661 info.si_code = FPE_FLTUND;
663 case 0x004: /* Zero Divide */
664 info.si_code = FPE_FLTDIV;
666 case 0x008: /* Overflow */
667 info.si_code = FPE_FLTOVF;
669 case 0x020: /* Precision */
670 info.si_code = FPE_FLTRES;
673 force_sig_info(SIGFPE, &info, task);
676 asmlinkage void do_coprocessor_error(struct pt_regs * regs, long error_code)
679 math_error((void *)regs->eip);
682 void simd_math_error(void *eip)
684 struct task_struct * task;
686 unsigned short mxcsr;
689 * Save the info for the exception handler and clear the error.
693 task->thread.trap_no = 19;
694 task->thread.error_code = 0;
695 info.si_signo = SIGFPE;
697 info.si_code = __SI_FAULT;
700 * The SIMD FPU exceptions are handled a little differently, as there
701 * is only a single status/control register. Thus, to determine which
702 * unmasked exception was caught we must mask the exception mask bits
703 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
705 mxcsr = get_fpu_mxcsr(task);
706 switch (~((mxcsr & 0x1f80) >> 7) & (mxcsr & 0x3f)) {
710 case 0x001: /* Invalid Op */
711 info.si_code = FPE_FLTINV;
713 case 0x002: /* Denormalize */
714 case 0x010: /* Underflow */
715 info.si_code = FPE_FLTUND;
717 case 0x004: /* Zero Divide */
718 info.si_code = FPE_FLTDIV;
720 case 0x008: /* Overflow */
721 info.si_code = FPE_FLTOVF;
723 case 0x020: /* Precision */
724 info.si_code = FPE_FLTRES;
727 force_sig_info(SIGFPE, &info, task);
730 asmlinkage void do_simd_coprocessor_error(struct pt_regs * regs,
734 /* Handle SIMD FPU exceptions on PIII+ processors. */
736 simd_math_error((void *)regs->eip);
739 * Handle strange cache flush from user space exception
740 * in all other cases. This is undocumented behaviour.
742 if (regs->eflags & VM_MASK) {
743 handle_vm86_fault((struct kernel_vm86_regs *)regs,
747 die_if_kernel("cache flush denied", regs, error_code);
748 current->thread.trap_no = 19;
749 current->thread.error_code = error_code;
750 force_sig(SIGSEGV, current);
754 asmlinkage void do_spurious_interrupt_bug(struct pt_regs * regs,
758 /* No need to warn about this any longer. */
759 printk("Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
764 * 'math_state_restore()' saves the current math information in the
765 * old math state array, and gets the new ones from the current task
767 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
768 * Don't touch unless you *really* know how it works.
770 * Must be called with kernel preemption disabled (in this case,
771 * local interrupts are disabled at the call-site in entry.S).
773 asmlinkage void math_state_restore(struct pt_regs regs)
775 struct thread_info *thread = current_thread_info();
776 struct task_struct *tsk = thread->task;
778 clts(); /* Allow maths ops (or we recurse) */
782 thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */
785 #ifndef CONFIG_MATH_EMULATION
787 asmlinkage void math_emulate(long arg)
789 printk("math-emulation not enabled and no coprocessor found.\n");
790 printk("killing %s.\n",current->comm);
791 force_sig(SIGFPE,current);
795 #endif /* CONFIG_MATH_EMULATION */
797 #ifdef CONFIG_X86_F00F_BUG
798 void __init trap_init_f00f_bug(void)
800 __set_fixmap(FIX_F00F_IDT, __pa(&idt_table), PAGE_KERNEL_RO);
803 * Update the IDT descriptor and reload the IDT so that
804 * it uses the read-only mapped virtual address.
806 idt_descr.address = fix_to_virt(FIX_F00F_IDT);
807 __asm__ __volatile__("lidt %0" : : "m" (idt_descr));
811 #define _set_gate(gate_addr,type,dpl,addr,seg) \
814 __asm__ __volatile__ ("movw %%dx,%%ax\n\t" \
816 "movl %%eax,%0\n\t" \
818 :"=m" (*((long *) (gate_addr))), \
819 "=m" (*(1+(long *) (gate_addr))), "=&a" (__d0), "=&d" (__d1) \
820 :"i" ((short) (0x8000+(dpl<<13)+(type<<8))), \
821 "3" ((char *) (addr)),"2" ((seg) << 16)); \
826 * This needs to use 'idt_table' rather than 'idt', and
827 * thus use the _nonmapped_ version of the IDT, as the
828 * Pentium F0 0F bugfix can have resulted in the mapped
829 * IDT being write-protected.
831 void set_intr_gate(unsigned int n, void *addr)
833 _set_gate(idt_table+n,14,0,addr,__KERNEL_CS);
836 static void __init set_trap_gate(unsigned int n, void *addr)
838 _set_gate(idt_table+n,15,0,addr,__KERNEL_CS);
841 static void __init set_system_gate(unsigned int n, void *addr)
843 _set_gate(idt_table+n,15,3,addr,__KERNEL_CS);
846 static void __init set_call_gate(void *a, void *addr)
848 _set_gate(a,12,3,addr,__KERNEL_CS);
851 static void __init set_task_gate(unsigned int n, unsigned int gdt_entry)
853 _set_gate(idt_table+n,5,0,0,(gdt_entry<<3));
857 void __init trap_init(void)
860 if (isa_readl(0x0FFFD9) == 'E'+('I'<<8)+('S'<<16)+('A'<<24)) {
865 #ifdef CONFIG_X86_LOCAL_APIC
866 init_apic_mappings();
869 set_trap_gate(0,÷_error);
870 set_intr_gate(1,&debug);
871 set_intr_gate(2,&nmi);
872 set_system_gate(3,&int3); /* int3-5 can be called from all */
873 set_system_gate(4,&overflow);
874 set_system_gate(5,&bounds);
875 set_trap_gate(6,&invalid_op);
876 set_trap_gate(7,&device_not_available);
877 set_task_gate(8,GDT_ENTRY_DOUBLEFAULT_TSS);
878 set_trap_gate(9,&coprocessor_segment_overrun);
879 set_trap_gate(10,&invalid_TSS);
880 set_trap_gate(11,&segment_not_present);
881 set_trap_gate(12,&stack_segment);
882 set_trap_gate(13,&general_protection);
883 set_intr_gate(14,&page_fault);
884 set_trap_gate(15,&spurious_interrupt_bug);
885 set_trap_gate(16,&coprocessor_error);
886 set_trap_gate(17,&alignment_check);
887 #ifdef CONFIG_X86_MCE
888 set_trap_gate(18,&machine_check);
890 set_trap_gate(19,&simd_coprocessor_error);
892 set_system_gate(SYSCALL_VECTOR,&system_call);
895 * default LDT is a single-entry callgate to lcall7 for iBCS
896 * and a callgate to lcall27 for Solaris/x86 binaries
898 set_call_gate(&default_ldt[0],lcall7);
899 set_call_gate(&default_ldt[4],lcall27);
902 * Should be a barrier for any external CPU state.