2 * linux/arch/i386/traps.c
4 * Copyright (C) 1991, 1992 Linus Torvalds
6 * Pentium III FXSR, SSE support
7 * Gareth Hughes <gareth@valinux.com>, May 2000
11 * 'Traps.c' handles hardware traps and faults after we have saved some
14 #include <linux/config.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
17 #include <linux/string.h>
18 #include <linux/errno.h>
19 #include <linux/timer.h>
21 #include <linux/init.h>
22 #include <linux/delay.h>
23 #include <linux/spinlock.h>
24 #include <linux/interrupt.h>
25 #include <linux/highmem.h>
26 #include <linux/kallsyms.h>
27 #include <linux/ptrace.h>
28 #include <linux/version.h>
31 #include <linux/ioport.h>
32 #include <linux/eisa.h>
36 #include <linux/mca.h>
39 #include <asm/processor.h>
40 #include <asm/system.h>
41 #include <asm/uaccess.h>
43 #include <asm/atomic.h>
44 #include <asm/debugreg.h>
50 #include <asm/pgalloc.h>
51 #include <asm/arch_hooks.h>
53 #include <linux/irq.h>
54 #include <linux/module.h>
56 #include "mach_traps.h"
58 asmlinkage int system_call(void);
59 asmlinkage void lcall7(void);
60 asmlinkage void lcall27(void);
62 struct desc_struct default_ldt[] = { { 0, 0 }, { 0, 0 }, { 0, 0 },
65 /* Do we ignore FPU interrupts ? */
66 char ignore_fpu_irq = 0;
69 * The IDT has to be page-aligned to simplify the Pentium
70 * F0 0F bug workaround.. We have a special link segment
73 struct desc_struct idt_table[256] __attribute__((__section__(".data.idt"))) = { {0, 0}, };
75 asmlinkage void divide_error(void);
76 asmlinkage void debug(void);
77 asmlinkage void nmi(void);
78 asmlinkage void int3(void);
79 asmlinkage void overflow(void);
80 asmlinkage void bounds(void);
81 asmlinkage void invalid_op(void);
82 asmlinkage void device_not_available(void);
83 asmlinkage void coprocessor_segment_overrun(void);
84 asmlinkage void invalid_TSS(void);
85 asmlinkage void segment_not_present(void);
86 asmlinkage void stack_segment(void);
87 asmlinkage void general_protection(void);
88 asmlinkage void page_fault(void);
89 asmlinkage void coprocessor_error(void);
90 asmlinkage void simd_coprocessor_error(void);
91 asmlinkage void alignment_check(void);
92 asmlinkage void spurious_interrupt_bug(void);
93 asmlinkage void machine_check(void);
95 static int kstack_depth_to_print = 24;
97 static int valid_stack_ptr(struct task_struct *task, void *p)
99 if (p <= (void *)task->thread_info)
106 #ifdef CONFIG_FRAME_POINTER
107 void print_context_stack(struct task_struct *task, unsigned long *stack,
112 while (valid_stack_ptr(task, (void *)ebp)) {
113 addr = *(unsigned long *)(ebp + 4);
114 printk(" [<%08lx>] ", addr);
115 print_symbol("%s", addr);
117 ebp = *(unsigned long *)ebp;
121 void print_context_stack(struct task_struct *task, unsigned long *stack,
126 while (!kstack_end(stack)) {
128 if (kernel_text_address(addr)) {
129 printk(" [<%08lx>] ", addr);
130 print_symbol("%s\n", addr);
136 void show_trace(struct task_struct *task, unsigned long * stack)
143 if (!valid_stack_ptr(task, stack)) {
144 printk("Stack pointer is garbage, not printing trace\n");
148 if (task == current) {
149 /* Grab ebp right from our regs */
150 asm ("movl %%ebp, %0" : "=r" (ebp) : );
152 /* ebp is the last reg pushed by switch_to */
153 ebp = *(unsigned long *) task->thread.esp;
157 struct thread_info *context;
158 context = (struct thread_info *)
159 ((unsigned long)stack & (~(THREAD_SIZE - 1)));
160 print_context_stack(task, stack, ebp);
161 stack = (unsigned long*)context->previous_esp;
164 printk(" =======================\n");
169 void show_stack(struct task_struct *task, unsigned long *esp)
171 unsigned long *stack;
176 esp = (unsigned long*)task->thread.esp;
178 esp = (unsigned long *)&esp;
182 for(i = 0; i < kstack_depth_to_print; i++) {
183 if (kstack_end(stack))
185 if (i && ((i % 8) == 0))
187 printk("%08lx ", *stack++);
189 printk("\nCall Trace:\n");
190 show_trace(task, esp);
194 * The architecture-independent dump_stack generator
196 void dump_stack(void)
200 show_trace(current, &stack);
203 EXPORT_SYMBOL(dump_stack);
205 void show_registers(struct pt_regs *regs)
212 esp = (unsigned long) (®s->esp);
217 ss = regs->xss & 0xffff;
220 printk("CPU: %d\nEIP: %04x:[<%08lx>] %s\nEFLAGS: %08lx"
222 smp_processor_id(), 0xffff & regs->xcs, regs->eip,
223 print_tainted(), regs->eflags, UTS_RELEASE);
224 print_symbol("EIP is at %s\n", regs->eip);
225 printk("eax: %08lx ebx: %08lx ecx: %08lx edx: %08lx\n",
226 regs->eax, regs->ebx, regs->ecx, regs->edx);
227 printk("esi: %08lx edi: %08lx ebp: %08lx esp: %08lx\n",
228 regs->esi, regs->edi, regs->ebp, esp);
229 printk("ds: %04x es: %04x ss: %04x\n",
230 regs->xds & 0xffff, regs->xes & 0xffff, ss);
231 printk("Process %s (pid: %d, threadinfo=%p task=%p)",
232 current->comm, current->pid, current_thread_info(), current);
234 * When in-kernel, we also print out the stack and code at the
235 * time of the fault..
240 show_stack(NULL, (unsigned long*)esp);
243 if(regs->eip < PAGE_OFFSET)
249 if(__get_user(c, &((unsigned char*)regs->eip)[i])) {
251 printk(" Bad EIP value.");
260 static void handle_BUG(struct pt_regs *regs)
269 goto no_bug; /* Not in kernel */
273 if (eip < PAGE_OFFSET)
275 if (__get_user(ud2, (unsigned short *)eip))
279 if (__get_user(line, (unsigned short *)(eip + 2)))
281 if (__get_user(file, (char **)(eip + 4)) ||
282 (unsigned long)file < PAGE_OFFSET || __get_user(c, file))
283 file = "<bad filename>";
285 printk("------------[ cut here ]------------\n");
286 printk(KERN_ALERT "kernel BUG at %s:%d!\n", file, line);
291 /* Here we know it was a BUG but file-n-line is unavailable */
293 printk("Kernel BUG\n");
296 spinlock_t die_lock = SPIN_LOCK_UNLOCKED;
298 void die(const char * str, struct pt_regs * regs, long err)
300 static int die_counter;
304 spin_lock_irq(&die_lock);
307 printk(KERN_ALERT "%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
308 #ifdef CONFIG_PREEMPT
316 #ifdef CONFIG_DEBUG_PAGEALLOC
317 printk("DEBUG_PAGEALLOC");
322 show_registers(regs);
324 spin_unlock_irq(&die_lock);
326 panic("Fatal exception in interrupt");
329 printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
330 set_current_state(TASK_UNINTERRUPTIBLE);
331 schedule_timeout(5 * HZ);
332 panic("Fatal exception");
337 static inline void die_if_kernel(const char * str, struct pt_regs * regs, long err)
339 if (!(regs->eflags & VM_MASK) && !(3 & regs->xcs))
343 static inline unsigned long get_cr2(void)
345 unsigned long address;
347 /* get the address */
348 __asm__("movl %%cr2,%0":"=r" (address));
352 static inline void do_trap(int trapnr, int signr, char *str, int vm86,
353 struct pt_regs * regs, long error_code, siginfo_t *info)
355 if (regs->eflags & VM_MASK) {
361 if (!(regs->xcs & 3))
365 struct task_struct *tsk = current;
366 tsk->thread.error_code = error_code;
367 tsk->thread.trap_no = trapnr;
369 force_sig_info(signr, info, tsk);
371 force_sig(signr, tsk);
376 if (!fixup_exception(regs))
377 die(str, regs, error_code);
382 int ret = handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, trapnr);
383 if (ret) goto trap_signal;
388 #define DO_ERROR(trapnr, signr, str, name) \
389 asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
391 do_trap(trapnr, signr, str, 0, regs, error_code, NULL); \
394 #define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
395 asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
398 info.si_signo = signr; \
400 info.si_code = sicode; \
401 info.si_addr = (void *)siaddr; \
402 do_trap(trapnr, signr, str, 0, regs, error_code, &info); \
405 #define DO_VM86_ERROR(trapnr, signr, str, name) \
406 asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
408 do_trap(trapnr, signr, str, 1, regs, error_code, NULL); \
411 #define DO_VM86_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
412 asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
415 info.si_signo = signr; \
417 info.si_code = sicode; \
418 info.si_addr = (void *)siaddr; \
419 do_trap(trapnr, signr, str, 1, regs, error_code, &info); \
422 DO_VM86_ERROR_INFO( 0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->eip)
423 DO_VM86_ERROR( 3, SIGTRAP, "int3", int3)
424 DO_VM86_ERROR( 4, SIGSEGV, "overflow", overflow)
425 DO_VM86_ERROR( 5, SIGSEGV, "bounds", bounds)
426 DO_ERROR_INFO( 6, SIGILL, "invalid operand", invalid_op, ILL_ILLOPN, regs->eip)
427 DO_ERROR( 9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
428 DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
429 DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
430 DO_ERROR(12, SIGBUS, "stack segment", stack_segment)
431 DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, get_cr2())
433 asmlinkage void do_general_protection(struct pt_regs * regs, long error_code)
435 if (regs->eflags & X86_EFLAGS_IF)
438 if (regs->eflags & VM_MASK)
441 if (!(regs->xcs & 3))
444 current->thread.error_code = error_code;
445 current->thread.trap_no = 13;
446 force_sig(SIGSEGV, current);
451 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
455 if (!fixup_exception(regs))
456 die("general protection fault", regs, error_code);
459 static void mem_parity_error(unsigned char reason, struct pt_regs * regs)
461 printk("Uhhuh. NMI received. Dazed and confused, but trying to continue\n");
462 printk("You probably have a hardware problem with your RAM chips\n");
464 /* Clear and disable the memory parity error line. */
465 clear_mem_error(reason);
468 static void io_check_error(unsigned char reason, struct pt_regs * regs)
472 printk("NMI: IOCK error (debug interrupt?)\n");
473 show_registers(regs);
475 /* Re-enable the IOCK line, wait for a few seconds */
476 reason = (reason & 0xf) | 8;
479 while (--i) udelay(1000);
484 static void unknown_nmi_error(unsigned char reason, struct pt_regs * regs)
487 /* Might actually be able to figure out what the guilty party
494 printk("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
495 reason, smp_processor_id());
496 printk("Dazed and confused, but trying to continue\n");
497 printk("Do you have a strange power saving mode enabled?\n");
500 static void default_do_nmi(struct pt_regs * regs)
502 unsigned char reason = get_nmi_reason();
504 if (!(reason & 0xc0)) {
505 #ifdef CONFIG_X86_LOCAL_APIC
507 * Ok, so this is none of the documented NMI sources,
508 * so it must be the NMI watchdog.
511 nmi_watchdog_tick(regs);
515 unknown_nmi_error(reason, regs);
519 mem_parity_error(reason, regs);
521 io_check_error(reason, regs);
523 * Reassert NMI in case it became active meanwhile
524 * as it's edge-triggered.
529 static int dummy_nmi_callback(struct pt_regs * regs, int cpu)
534 static nmi_callback_t nmi_callback = dummy_nmi_callback;
536 asmlinkage void do_nmi(struct pt_regs * regs, long error_code)
542 cpu = smp_processor_id();
545 if (!nmi_callback(regs, cpu))
546 default_do_nmi(regs);
551 void set_nmi_callback(nmi_callback_t callback)
553 nmi_callback = callback;
556 void unset_nmi_callback(void)
558 nmi_callback = dummy_nmi_callback;
562 * Our handling of the processor debug registers is non-trivial.
563 * We do not clear them on entry and exit from the kernel. Therefore
564 * it is possible to get a watchpoint trap here from inside the kernel.
565 * However, the code in ./ptrace.c has ensured that the user can
566 * only set watchpoints on userspace addresses. Therefore the in-kernel
567 * watchpoint trap can only occur in code which is reading/writing
568 * from user space. Such code must not hold kernel locks (since it
569 * can equally take a page fault), therefore it is safe to call
570 * force_sig_info even though that claims and releases locks.
572 * Code in ./signal.c ensures that the debug control register
573 * is restored before we deliver any signal, and therefore that
574 * user code runs with the correct debug control register even though
577 * Being careful here means that we don't have to be as careful in a
578 * lot of more complicated places (task switching can be a bit lazy
579 * about restoring all the debug state, and ptrace doesn't have to
580 * find every occurrence of the TF bit that could be saved away even
583 asmlinkage void do_debug(struct pt_regs * regs, long error_code)
585 unsigned int condition;
586 struct task_struct *tsk = current;
589 __asm__ __volatile__("movl %%db6,%0" : "=r" (condition));
591 /* It's safe to allow irq's after DR6 has been saved */
592 if (regs->eflags & X86_EFLAGS_IF)
595 /* Mask out spurious debug traps due to lazy DR7 setting */
596 if (condition & (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)) {
597 if (!tsk->thread.debugreg[7])
601 if (regs->eflags & VM_MASK)
604 /* Save debug status register where ptrace can see it */
605 tsk->thread.debugreg[6] = condition;
607 /* Mask out spurious TF errors due to lazy TF clearing */
608 if (condition & DR_STEP) {
610 * The TF error should be masked out only if the current
611 * process is not traced and if the TRAP flag has been set
612 * previously by a tracing process (condition detected by
613 * the PT_DTRACE flag); remember that the i386 TRAP flag
614 * can be modified by the process itself in user mode,
615 * allowing programs to debug themselves without the ptrace()
618 if ((regs->xcs & 3) == 0)
619 goto clear_TF_reenable;
620 if ((tsk->ptrace & (PT_DTRACE|PT_PTRACED)) == PT_DTRACE)
624 /* Ok, finally something we can handle */
625 tsk->thread.trap_no = 1;
626 tsk->thread.error_code = error_code;
627 info.si_signo = SIGTRAP;
629 info.si_code = TRAP_BRKPT;
631 /* If this is a kernel mode trap, save the user PC on entry to
632 * the kernel, that's what the debugger can make sense of.
634 info.si_addr = ((regs->xcs & 3) == 0) ? (void *)tsk->thread.eip :
636 force_sig_info(SIGTRAP, &info, tsk);
638 /* Disable additional traps. They'll be re-enabled when
639 * the signal is delivered.
642 __asm__("movl %0,%%db7"
648 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 1);
652 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
654 regs->eflags &= ~TF_MASK;
659 * Note that we play around with the 'TS' bit in an attempt to get
660 * the correct behaviour even in the presence of the asynchronous
663 void math_error(void *eip)
665 struct task_struct * task;
667 unsigned short cwd, swd;
670 * Save the info for the exception handler and clear the error.
674 task->thread.trap_no = 16;
675 task->thread.error_code = 0;
676 info.si_signo = SIGFPE;
678 info.si_code = __SI_FAULT;
681 * (~cwd & swd) will mask out exceptions that are not set to unmasked
682 * status. 0x3f is the exception bits in these regs, 0x200 is the
683 * C1 reg you need in case of a stack fault, 0x040 is the stack
684 * fault bit. We should only be taking one exception at a time,
685 * so if this combination doesn't produce any single exception,
686 * then we have a bad program that isn't syncronizing its FPU usage
687 * and it will suffer the consequences since we won't be able to
688 * fully reproduce the context of the exception
690 cwd = get_fpu_cwd(task);
691 swd = get_fpu_swd(task);
692 switch (((~cwd) & swd & 0x3f) | (swd & 0x240)) {
696 case 0x001: /* Invalid Op */
697 case 0x041: /* Stack Fault */
698 case 0x241: /* Stack Fault | Direction */
699 info.si_code = FPE_FLTINV;
700 /* Should we clear the SF or let user space do it ???? */
702 case 0x002: /* Denormalize */
703 case 0x010: /* Underflow */
704 info.si_code = FPE_FLTUND;
706 case 0x004: /* Zero Divide */
707 info.si_code = FPE_FLTDIV;
709 case 0x008: /* Overflow */
710 info.si_code = FPE_FLTOVF;
712 case 0x020: /* Precision */
713 info.si_code = FPE_FLTRES;
716 force_sig_info(SIGFPE, &info, task);
719 asmlinkage void do_coprocessor_error(struct pt_regs * regs, long error_code)
722 math_error((void *)regs->eip);
725 void simd_math_error(void *eip)
727 struct task_struct * task;
729 unsigned short mxcsr;
732 * Save the info for the exception handler and clear the error.
736 task->thread.trap_no = 19;
737 task->thread.error_code = 0;
738 info.si_signo = SIGFPE;
740 info.si_code = __SI_FAULT;
743 * The SIMD FPU exceptions are handled a little differently, as there
744 * is only a single status/control register. Thus, to determine which
745 * unmasked exception was caught we must mask the exception mask bits
746 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
748 mxcsr = get_fpu_mxcsr(task);
749 switch (~((mxcsr & 0x1f80) >> 7) & (mxcsr & 0x3f)) {
753 case 0x001: /* Invalid Op */
754 info.si_code = FPE_FLTINV;
756 case 0x002: /* Denormalize */
757 case 0x010: /* Underflow */
758 info.si_code = FPE_FLTUND;
760 case 0x004: /* Zero Divide */
761 info.si_code = FPE_FLTDIV;
763 case 0x008: /* Overflow */
764 info.si_code = FPE_FLTOVF;
766 case 0x020: /* Precision */
767 info.si_code = FPE_FLTRES;
770 force_sig_info(SIGFPE, &info, task);
773 asmlinkage void do_simd_coprocessor_error(struct pt_regs * regs,
777 /* Handle SIMD FPU exceptions on PIII+ processors. */
779 simd_math_error((void *)regs->eip);
782 * Handle strange cache flush from user space exception
783 * in all other cases. This is undocumented behaviour.
785 if (regs->eflags & VM_MASK) {
786 handle_vm86_fault((struct kernel_vm86_regs *)regs,
790 die_if_kernel("cache flush denied", regs, error_code);
791 current->thread.trap_no = 19;
792 current->thread.error_code = error_code;
793 force_sig(SIGSEGV, current);
797 asmlinkage void do_spurious_interrupt_bug(struct pt_regs * regs,
801 /* No need to warn about this any longer. */
802 printk("Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
807 * 'math_state_restore()' saves the current math information in the
808 * old math state array, and gets the new ones from the current task
810 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
811 * Don't touch unless you *really* know how it works.
813 * Must be called with kernel preemption disabled (in this case,
814 * local interrupts are disabled at the call-site in entry.S).
816 asmlinkage void math_state_restore(struct pt_regs regs)
818 struct thread_info *thread = current_thread_info();
819 struct task_struct *tsk = thread->task;
821 clts(); /* Allow maths ops (or we recurse) */
825 thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */
828 #ifndef CONFIG_MATH_EMULATION
830 asmlinkage void math_emulate(long arg)
832 printk("math-emulation not enabled and no coprocessor found.\n");
833 printk("killing %s.\n",current->comm);
834 force_sig(SIGFPE,current);
838 #endif /* CONFIG_MATH_EMULATION */
840 #ifdef CONFIG_X86_F00F_BUG
841 void __init trap_init_f00f_bug(void)
843 __set_fixmap(FIX_F00F_IDT, __pa(&idt_table), PAGE_KERNEL_RO);
846 * Update the IDT descriptor and reload the IDT so that
847 * it uses the read-only mapped virtual address.
849 idt_descr.address = fix_to_virt(FIX_F00F_IDT);
850 __asm__ __volatile__("lidt %0" : : "m" (idt_descr));
854 #define _set_gate(gate_addr,type,dpl,addr,seg) \
857 __asm__ __volatile__ ("movw %%dx,%%ax\n\t" \
859 "movl %%eax,%0\n\t" \
861 :"=m" (*((long *) (gate_addr))), \
862 "=m" (*(1+(long *) (gate_addr))), "=&a" (__d0), "=&d" (__d1) \
863 :"i" ((short) (0x8000+(dpl<<13)+(type<<8))), \
864 "3" ((char *) (addr)),"2" ((seg) << 16)); \
869 * This needs to use 'idt_table' rather than 'idt', and
870 * thus use the _nonmapped_ version of the IDT, as the
871 * Pentium F0 0F bugfix can have resulted in the mapped
872 * IDT being write-protected.
874 void set_intr_gate(unsigned int n, void *addr)
876 _set_gate(idt_table+n,14,0,addr,__KERNEL_CS);
879 static void __init set_trap_gate(unsigned int n, void *addr)
881 _set_gate(idt_table+n,15,0,addr,__KERNEL_CS);
884 static void __init set_system_gate(unsigned int n, void *addr)
886 _set_gate(idt_table+n,15,3,addr,__KERNEL_CS);
889 static void __init set_call_gate(void *a, void *addr)
891 _set_gate(a,12,3,addr,__KERNEL_CS);
894 static void __init set_task_gate(unsigned int n, unsigned int gdt_entry)
896 _set_gate(idt_table+n,5,0,0,(gdt_entry<<3));
900 void __init trap_init(void)
903 if (isa_readl(0x0FFFD9) == 'E'+('I'<<8)+('S'<<16)+('A'<<24)) {
908 #ifdef CONFIG_X86_LOCAL_APIC
909 init_apic_mappings();
912 set_trap_gate(0,÷_error);
913 set_intr_gate(1,&debug);
914 set_intr_gate(2,&nmi);
915 set_system_gate(3,&int3); /* int3-5 can be called from all */
916 set_system_gate(4,&overflow);
917 set_system_gate(5,&bounds);
918 set_trap_gate(6,&invalid_op);
919 set_trap_gate(7,&device_not_available);
920 set_task_gate(8,GDT_ENTRY_DOUBLEFAULT_TSS);
921 set_trap_gate(9,&coprocessor_segment_overrun);
922 set_trap_gate(10,&invalid_TSS);
923 set_trap_gate(11,&segment_not_present);
924 set_trap_gate(12,&stack_segment);
925 set_trap_gate(13,&general_protection);
926 set_intr_gate(14,&page_fault);
927 set_trap_gate(15,&spurious_interrupt_bug);
928 set_trap_gate(16,&coprocessor_error);
929 set_trap_gate(17,&alignment_check);
930 #ifdef CONFIG_X86_MCE
931 set_trap_gate(18,&machine_check);
933 set_trap_gate(19,&simd_coprocessor_error);
935 set_system_gate(SYSCALL_VECTOR,&system_call);
938 * default LDT is a single-entry callgate to lcall7 for iBCS
939 * and a callgate to lcall27 for Solaris/x86 binaries
941 set_call_gate(&default_ldt[0],lcall7);
942 set_call_gate(&default_ldt[4],lcall27);
945 * Should be a barrier for any external CPU state.