2 * Low-Level PCI Support for PC -- Routing of Interrupts
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
7 #include <linux/types.h>
8 #include <linux/kernel.h>
10 #include <linux/init.h>
11 #include <linux/slab.h>
12 #include <linux/interrupt.h>
13 #include <linux/dmi.h>
16 #include <asm/io_apic.h>
17 #include <linux/irq.h>
18 #include <linux/acpi.h>
22 #define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
23 #define PIRQ_VERSION 0x0100
25 static int broken_hp_bios_irq9;
26 static int acer_tm360_irqrouting;
28 static struct irq_routing_table *pirq_table;
30 static int pirq_enable_irq(struct pci_dev *dev);
33 * Never use: 0, 1, 2 (timer, keyboard, and cascade)
34 * Avoid using: 13, 14 and 15 (FP error and IDE).
35 * Penalize: 3, 4, 6, 7, 12 (known ISA uses: serial, floppy, parallel and mouse)
37 unsigned int pcibios_irq_mask = 0xfff8;
39 static int pirq_penalty[16] = {
40 1000000, 1000000, 1000000, 1000, 1000, 0, 1000, 1000,
41 0, 0, 0, 0, 1000, 100000, 100000, 100000
47 int (*get)(struct pci_dev *router, struct pci_dev *dev, int pirq);
48 int (*set)(struct pci_dev *router, struct pci_dev *dev, int pirq, int new);
51 struct irq_router_handler {
53 int (*probe)(struct irq_router *r, struct pci_dev *router, u16 device);
56 int (*pcibios_enable_irq)(struct pci_dev *dev) = NULL;
57 void (*pcibios_disable_irq)(struct pci_dev *dev) = NULL;
60 * Check passed address for the PCI IRQ Routing Table signature
61 * and perform checksum verification.
64 static inline struct irq_routing_table * pirq_check_routing_table(u8 *addr)
66 struct irq_routing_table *rt;
70 rt = (struct irq_routing_table *) addr;
71 if (rt->signature != PIRQ_SIGNATURE ||
72 rt->version != PIRQ_VERSION ||
74 rt->size < sizeof(struct irq_routing_table))
77 for (i=0; i < rt->size; i++)
80 DBG(KERN_DEBUG "PCI: Interrupt Routing Table found at 0x%p\n", rt);
89 * Search 0xf0000 -- 0xfffff for the PCI IRQ Routing Table.
92 static struct irq_routing_table * __init pirq_find_routing_table(void)
95 struct irq_routing_table *rt;
98 if (!is_initial_xendomain())
101 if (pirq_table_addr) {
103 rt = pirq_check_routing_table((u8 *) isa_bus_to_virt(pirq_table_addr));
105 rt = pirq_check_routing_table((u8 *) __va(pirq_table_addr));
109 printk(KERN_WARNING "PCI: PIRQ table NOT found at pirqaddr\n");
112 for(addr = (u8 *) isa_bus_to_virt(0xf0000); addr < (u8 *) isa_bus_to_virt(0x100000); addr += 16) {
114 for(addr = (u8 *) __va(0xf0000); addr < (u8 *) __va(0x100000); addr += 16) {
116 rt = pirq_check_routing_table(addr);
124 * If we have a IRQ routing table, use it to search for peer host
125 * bridges. It's a gross hack, but since there are no other known
126 * ways how to get a list of buses, we have to go this way.
129 static void __init pirq_peer_trick(void)
131 struct irq_routing_table *rt = pirq_table;
136 memset(busmap, 0, sizeof(busmap));
137 for(i=0; i < (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info); i++) {
142 DBG(KERN_DEBUG "%02x:%02x slot=%02x", e->bus, e->devfn/8, e->slot);
144 DBG(" %d:%02x/%04x", j, e->irq[j].link, e->irq[j].bitmap);
150 for(i = 1; i < 256; i++) {
151 if (!busmap[i] || pci_find_bus(0, i))
153 if (pci_scan_bus(i, &pci_root_ops, NULL))
154 printk(KERN_INFO "PCI: Discovered primary peer bus %02x [IRQ]\n", i);
156 pcibios_last_bus = -1;
160 * Code for querying and setting of IRQ routes on various interrupt routers.
163 void eisa_set_level_irq(unsigned int irq)
165 unsigned char mask = 1 << (irq & 7);
166 unsigned int port = 0x4d0 + (irq >> 3);
168 static u16 eisa_irq_mask;
170 if (irq >= 16 || (1 << irq) & eisa_irq_mask)
173 eisa_irq_mask |= (1 << irq);
174 printk(KERN_DEBUG "PCI: setting IRQ %u as level-triggered\n", irq);
177 DBG(KERN_DEBUG " -> edge");
178 outb(val | mask, port);
183 * Common IRQ routing practice: nybbles in config space,
184 * offset by some magic constant.
186 static unsigned int read_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr)
189 unsigned reg = offset + (nr >> 1);
191 pci_read_config_byte(router, reg, &x);
192 return (nr & 1) ? (x >> 4) : (x & 0xf);
195 static void write_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr, unsigned int val)
198 unsigned reg = offset + (nr >> 1);
200 pci_read_config_byte(router, reg, &x);
201 x = (nr & 1) ? ((x & 0x0f) | (val << 4)) : ((x & 0xf0) | val);
202 pci_write_config_byte(router, reg, x);
206 * ALI pirq entries are damn ugly, and completely undocumented.
207 * This has been figured out from pirq tables, and it's not a pretty
210 static int pirq_ali_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
212 static const unsigned char irqmap[16] = { 0, 9, 3, 10, 4, 5, 7, 6, 1, 11, 0, 12, 0, 14, 0, 15 };
214 return irqmap[read_config_nybble(router, 0x48, pirq-1)];
217 static int pirq_ali_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
219 static const unsigned char irqmap[16] = { 0, 8, 0, 2, 4, 5, 7, 6, 0, 1, 3, 9, 11, 0, 13, 15 };
220 unsigned int val = irqmap[irq];
223 write_config_nybble(router, 0x48, pirq-1, val);
230 * The Intel PIIX4 pirq rules are fairly simple: "pirq" is
231 * just a pointer to the config space.
233 static int pirq_piix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
237 pci_read_config_byte(router, pirq, &x);
238 return (x < 16) ? x : 0;
241 static int pirq_piix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
243 pci_write_config_byte(router, pirq, irq);
248 * The VIA pirq rules are nibble-based, like ALI,
249 * but without the ugly irq number munging.
250 * However, PIRQD is in the upper instead of lower 4 bits.
252 static int pirq_via_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
254 return read_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq);
257 static int pirq_via_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
259 write_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq, irq);
264 * The VIA pirq rules are nibble-based, like ALI,
265 * but without the ugly irq number munging.
266 * However, for 82C586, nibble map is different .
268 static int pirq_via586_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
270 static const unsigned int pirqmap[5] = { 3, 2, 5, 1, 1 };
271 return read_config_nybble(router, 0x55, pirqmap[pirq-1]);
274 static int pirq_via586_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
276 static const unsigned int pirqmap[5] = { 3, 2, 5, 1, 1 };
277 write_config_nybble(router, 0x55, pirqmap[pirq-1], irq);
282 * ITE 8330G pirq rules are nibble-based
283 * FIXME: pirqmap may be { 1, 0, 3, 2 },
284 * 2+3 are both mapped to irq 9 on my system
286 static int pirq_ite_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
288 static const unsigned char pirqmap[4] = { 1, 0, 2, 3 };
289 return read_config_nybble(router,0x43, pirqmap[pirq-1]);
292 static int pirq_ite_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
294 static const unsigned char pirqmap[4] = { 1, 0, 2, 3 };
295 write_config_nybble(router, 0x43, pirqmap[pirq-1], irq);
300 * OPTI: high four bits are nibble pointer..
301 * I wonder what the low bits do?
303 static int pirq_opti_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
305 return read_config_nybble(router, 0xb8, pirq >> 4);
308 static int pirq_opti_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
310 write_config_nybble(router, 0xb8, pirq >> 4, irq);
315 * Cyrix: nibble offset 0x5C
316 * 0x5C bits 7:4 is INTB bits 3:0 is INTA
317 * 0x5D bits 7:4 is INTD bits 3:0 is INTC
319 static int pirq_cyrix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
321 return read_config_nybble(router, 0x5C, (pirq-1)^1);
324 static int pirq_cyrix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
326 write_config_nybble(router, 0x5C, (pirq-1)^1, irq);
331 * PIRQ routing for SiS 85C503 router used in several SiS chipsets.
332 * We have to deal with the following issues here:
333 * - vendors have different ideas about the meaning of link values
334 * - some onboard devices (integrated in the chipset) have special
335 * links and are thus routed differently (i.e. not via PCI INTA-INTD)
336 * - different revision of the router have a different layout for
337 * the routing registers, particularly for the onchip devices
339 * For all routing registers the common thing is we have one byte
340 * per routeable link which is defined as:
341 * bit 7 IRQ mapping enabled (0) or disabled (1)
342 * bits [6:4] reserved (sometimes used for onchip devices)
343 * bits [3:0] IRQ to map to
344 * allowed: 3-7, 9-12, 14-15
345 * reserved: 0, 1, 2, 8, 13
347 * The config-space registers located at 0x41/0x42/0x43/0x44 are
348 * always used to route the normal PCI INT A/B/C/D respectively.
349 * Apparently there are systems implementing PCI routing table using
350 * link values 0x01-0x04 and others using 0x41-0x44 for PCI INTA..D.
351 * We try our best to handle both link mappings.
353 * Currently (2003-05-21) it appears most SiS chipsets follow the
354 * definition of routing registers from the SiS-5595 southbridge.
355 * According to the SiS 5595 datasheets the revision id's of the
356 * router (ISA-bridge) should be 0x01 or 0xb0.
358 * Furthermore we've also seen lspci dumps with revision 0x00 and 0xb1.
359 * Looks like these are used in a number of SiS 5xx/6xx/7xx chipsets.
360 * They seem to work with the current routing code. However there is
361 * some concern because of the two USB-OHCI HCs (original SiS 5595
362 * had only one). YMMV.
364 * Onchip routing for router rev-id 0x01/0xb0 and probably 0x00/0xb1:
367 * bits [6:5] must be written 01
368 * bit 4 channel-select primary (0), secondary (1)
371 * bit 6 OHCI function disabled (0), enabled (1)
373 * 0x6a: ACPI/SCI IRQ: bits 4-6 reserved
375 * 0x7e: Data Acq. Module IRQ - bits 4-6 reserved
377 * We support USBIRQ (in addition to INTA-INTD) and keep the
378 * IDE, ACPI and DAQ routing untouched as set by the BIOS.
380 * Currently the only reported exception is the new SiS 65x chipset
381 * which includes the SiS 69x southbridge. Here we have the 85C503
382 * router revision 0x04 and there are changes in the register layout
383 * mostly related to the different USB HCs with USB 2.0 support.
385 * Onchip routing for router rev-id 0x04 (try-and-error observation)
387 * 0x60/0x61/0x62/0x63: 1xEHCI and 3xOHCI (companion) USB-HCs
388 * bit 6-4 are probably unused, not like 5595
391 #define PIRQ_SIS_IRQ_MASK 0x0f
392 #define PIRQ_SIS_IRQ_DISABLE 0x80
393 #define PIRQ_SIS_USB_ENABLE 0x40
395 static int pirq_sis_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
401 if (reg >= 0x01 && reg <= 0x04)
403 pci_read_config_byte(router, reg, &x);
404 return (x & PIRQ_SIS_IRQ_DISABLE) ? 0 : (x & PIRQ_SIS_IRQ_MASK);
407 static int pirq_sis_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
413 if (reg >= 0x01 && reg <= 0x04)
415 pci_read_config_byte(router, reg, &x);
416 x &= ~(PIRQ_SIS_IRQ_MASK | PIRQ_SIS_IRQ_DISABLE);
417 x |= irq ? irq: PIRQ_SIS_IRQ_DISABLE;
418 pci_write_config_byte(router, reg, x);
424 * VLSI: nibble offset 0x74 - educated guess due to routing table and
425 * config space of VLSI 82C534 PCI-bridge/router (1004:0102)
426 * Tested on HP OmniBook 800 covering PIRQ 1, 2, 4, 8 for onboard
427 * devices, PIRQ 3 for non-pci(!) soundchip and (untested) PIRQ 6
428 * for the busbridge to the docking station.
431 static int pirq_vlsi_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
434 printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
437 return read_config_nybble(router, 0x74, pirq-1);
440 static int pirq_vlsi_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
443 printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
446 write_config_nybble(router, 0x74, pirq-1, irq);
451 * ServerWorks: PCI interrupts mapped to system IRQ lines through Index
452 * and Redirect I/O registers (0x0c00 and 0x0c01). The Index register
453 * format is (PCIIRQ## | 0x10), e.g.: PCIIRQ10=0x1a. The Redirect
454 * register is a straight binary coding of desired PIC IRQ (low nibble).
456 * The 'link' value in the PIRQ table is already in the correct format
457 * for the Index register. There are some special index values:
458 * 0x00 for ACPI (SCI), 0x01 for USB, 0x02 for IDE0, 0x04 for IDE1,
459 * and 0x03 for SMBus.
461 static int pirq_serverworks_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
464 return inb(0xc01) & 0xf;
467 static int pirq_serverworks_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
474 /* Support for AMD756 PCI IRQ Routing
475 * Jhon H. Caicedo <jhcaiced@osso.org.co>
476 * Jun/21/2001 0.2.0 Release, fixed to use "nybble" functions... (jhcaiced)
477 * Jun/19/2001 Alpha Release 0.1.0 (jhcaiced)
478 * The AMD756 pirq rules are nibble-based
479 * offset 0x56 0-3 PIRQA 4-7 PIRQB
480 * offset 0x57 0-3 PIRQC 4-7 PIRQD
482 static int pirq_amd756_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
488 irq = read_config_nybble(router, 0x56, pirq - 1);
490 printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d get irq : %2d\n",
491 dev->vendor, dev->device, pirq, irq);
495 static int pirq_amd756_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
497 printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d SET irq : %2d\n",
498 dev->vendor, dev->device, pirq, irq);
501 write_config_nybble(router, 0x56, pirq - 1, irq);
506 #ifdef CONFIG_PCI_BIOS
508 static int pirq_bios_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
510 struct pci_dev *bridge;
511 int pin = pci_get_interrupt_pin(dev, &bridge);
512 return pcibios_set_irq_routing(bridge, pin, irq);
517 static __init int intel_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
519 static struct pci_device_id __initdata pirq_440gx[] = {
520 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_0) },
521 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_2) },
525 /* 440GX has a proprietary PIRQ router -- don't use it */
526 if (pci_dev_present(pirq_440gx))
531 case PCI_DEVICE_ID_INTEL_82371FB_0:
532 case PCI_DEVICE_ID_INTEL_82371SB_0:
533 case PCI_DEVICE_ID_INTEL_82371AB_0:
534 case PCI_DEVICE_ID_INTEL_82371MX:
535 case PCI_DEVICE_ID_INTEL_82443MX_0:
536 case PCI_DEVICE_ID_INTEL_82801AA_0:
537 case PCI_DEVICE_ID_INTEL_82801AB_0:
538 case PCI_DEVICE_ID_INTEL_82801BA_0:
539 case PCI_DEVICE_ID_INTEL_82801BA_10:
540 case PCI_DEVICE_ID_INTEL_82801CA_0:
541 case PCI_DEVICE_ID_INTEL_82801CA_12:
542 case PCI_DEVICE_ID_INTEL_82801DB_0:
543 case PCI_DEVICE_ID_INTEL_82801E_0:
544 case PCI_DEVICE_ID_INTEL_82801EB_0:
545 case PCI_DEVICE_ID_INTEL_ESB_1:
546 case PCI_DEVICE_ID_INTEL_ICH6_0:
547 case PCI_DEVICE_ID_INTEL_ICH6_1:
548 case PCI_DEVICE_ID_INTEL_ICH7_0:
549 case PCI_DEVICE_ID_INTEL_ICH7_1:
550 case PCI_DEVICE_ID_INTEL_ICH7_30:
551 case PCI_DEVICE_ID_INTEL_ICH7_31:
552 case PCI_DEVICE_ID_INTEL_ESB2_0:
553 case PCI_DEVICE_ID_INTEL_ICH8_0:
554 case PCI_DEVICE_ID_INTEL_ICH8_1:
555 case PCI_DEVICE_ID_INTEL_ICH8_2:
556 case PCI_DEVICE_ID_INTEL_ICH8_3:
557 case PCI_DEVICE_ID_INTEL_ICH8_4:
558 case PCI_DEVICE_ID_INTEL_ICH9_0:
559 case PCI_DEVICE_ID_INTEL_ICH9_1:
560 case PCI_DEVICE_ID_INTEL_ICH9_2:
561 case PCI_DEVICE_ID_INTEL_ICH9_3:
562 case PCI_DEVICE_ID_INTEL_ICH9_4:
563 case PCI_DEVICE_ID_INTEL_ICH9_5:
564 r->name = "PIIX/ICH";
565 r->get = pirq_piix_get;
566 r->set = pirq_piix_set;
572 static __init int via_router_probe(struct irq_router *r,
573 struct pci_dev *router, u16 device)
575 /* FIXME: We should move some of the quirk fixup stuff here */
578 * work arounds for some buggy BIOSes
580 if (device == PCI_DEVICE_ID_VIA_82C586_0) {
581 switch(router->device) {
582 case PCI_DEVICE_ID_VIA_82C686:
584 * Asus k7m bios wrongly reports 82C686A
587 device = PCI_DEVICE_ID_VIA_82C686;
589 case PCI_DEVICE_ID_VIA_8235:
591 * Asus a7v-x bios wrongly reports 8235
594 device = PCI_DEVICE_ID_VIA_8235;
600 case PCI_DEVICE_ID_VIA_82C586_0:
602 r->get = pirq_via586_get;
603 r->set = pirq_via586_set;
605 case PCI_DEVICE_ID_VIA_82C596:
606 case PCI_DEVICE_ID_VIA_82C686:
607 case PCI_DEVICE_ID_VIA_8231:
608 case PCI_DEVICE_ID_VIA_8233A:
609 case PCI_DEVICE_ID_VIA_8235:
610 case PCI_DEVICE_ID_VIA_8237:
611 /* FIXME: add new ones for 8233/5 */
613 r->get = pirq_via_get;
614 r->set = pirq_via_set;
620 static __init int vlsi_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
624 case PCI_DEVICE_ID_VLSI_82C534:
625 r->name = "VLSI 82C534";
626 r->get = pirq_vlsi_get;
627 r->set = pirq_vlsi_set;
634 static __init int serverworks_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
638 case PCI_DEVICE_ID_SERVERWORKS_OSB4:
639 case PCI_DEVICE_ID_SERVERWORKS_CSB5:
640 r->name = "ServerWorks";
641 r->get = pirq_serverworks_get;
642 r->set = pirq_serverworks_set;
648 static __init int sis_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
650 if (device != PCI_DEVICE_ID_SI_503)
654 r->get = pirq_sis_get;
655 r->set = pirq_sis_set;
659 static __init int cyrix_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
663 case PCI_DEVICE_ID_CYRIX_5520:
665 r->get = pirq_cyrix_get;
666 r->set = pirq_cyrix_set;
672 static __init int opti_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
676 case PCI_DEVICE_ID_OPTI_82C700:
678 r->get = pirq_opti_get;
679 r->set = pirq_opti_set;
685 static __init int ite_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
689 case PCI_DEVICE_ID_ITE_IT8330G_0:
691 r->get = pirq_ite_get;
692 r->set = pirq_ite_set;
698 static __init int ali_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
702 case PCI_DEVICE_ID_AL_M1533:
703 case PCI_DEVICE_ID_AL_M1563:
704 printk(KERN_DEBUG "PCI: Using ALI IRQ Router\n");
706 r->get = pirq_ali_get;
707 r->set = pirq_ali_set;
713 static __init int amd_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
717 case PCI_DEVICE_ID_AMD_VIPER_740B:
720 case PCI_DEVICE_ID_AMD_VIPER_7413:
723 case PCI_DEVICE_ID_AMD_VIPER_7443:
729 r->get = pirq_amd756_get;
730 r->set = pirq_amd756_set;
734 static __initdata struct irq_router_handler pirq_routers[] = {
735 { PCI_VENDOR_ID_INTEL, intel_router_probe },
736 { PCI_VENDOR_ID_AL, ali_router_probe },
737 { PCI_VENDOR_ID_ITE, ite_router_probe },
738 { PCI_VENDOR_ID_VIA, via_router_probe },
739 { PCI_VENDOR_ID_OPTI, opti_router_probe },
740 { PCI_VENDOR_ID_SI, sis_router_probe },
741 { PCI_VENDOR_ID_CYRIX, cyrix_router_probe },
742 { PCI_VENDOR_ID_VLSI, vlsi_router_probe },
743 { PCI_VENDOR_ID_SERVERWORKS, serverworks_router_probe },
744 { PCI_VENDOR_ID_AMD, amd_router_probe },
745 /* Someone with docs needs to add the ATI Radeon IGP */
748 static struct irq_router pirq_router;
749 static struct pci_dev *pirq_router_dev;
753 * FIXME: should we have an option to say "generic for
757 static void __init pirq_find_router(struct irq_router *r)
759 struct irq_routing_table *rt = pirq_table;
760 struct irq_router_handler *h;
762 #ifdef CONFIG_PCI_BIOS
763 if (!rt->signature) {
764 printk(KERN_INFO "PCI: Using BIOS for IRQ routing\n");
765 r->set = pirq_bios_set;
771 /* Default unless a driver reloads it */
776 DBG(KERN_DEBUG "PCI: Attempting to find IRQ router for %04x:%04x\n",
777 rt->rtr_vendor, rt->rtr_device);
779 pirq_router_dev = pci_get_bus_and_slot(rt->rtr_bus, rt->rtr_devfn);
780 if (!pirq_router_dev) {
781 DBG(KERN_DEBUG "PCI: Interrupt router not found at "
782 "%02x:%02x\n", rt->rtr_bus, rt->rtr_devfn);
786 for( h = pirq_routers; h->vendor; h++) {
787 /* First look for a router match */
788 if (rt->rtr_vendor == h->vendor && h->probe(r, pirq_router_dev, rt->rtr_device))
790 /* Fall back to a device match */
791 if (pirq_router_dev->vendor == h->vendor && h->probe(r, pirq_router_dev, pirq_router_dev->device))
794 printk(KERN_INFO "PCI: Using IRQ router %s [%04x/%04x] at %s\n",
796 pirq_router_dev->vendor,
797 pirq_router_dev->device,
798 pci_name(pirq_router_dev));
800 /* The device remains referenced for the kernel lifetime */
803 static struct irq_info *pirq_get_info(struct pci_dev *dev)
805 struct irq_routing_table *rt = pirq_table;
806 int entries = (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
807 struct irq_info *info;
809 for (info = rt->slots; entries--; info++)
810 if (info->bus == dev->bus->number && PCI_SLOT(info->devfn) == PCI_SLOT(dev->devfn))
815 static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
818 struct irq_info *info;
822 struct irq_router *r = &pirq_router;
823 struct pci_dev *dev2 = NULL;
827 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
829 DBG(KERN_DEBUG " -> no interrupt pin\n");
834 /* Find IRQ routing entry */
839 DBG(KERN_DEBUG "IRQ for %s[%c]", pci_name(dev), 'A' + pin);
840 info = pirq_get_info(dev);
842 DBG(" -> not found in routing table\n" KERN_DEBUG);
845 pirq = info->irq[pin].link;
846 mask = info->irq[pin].bitmap;
848 DBG(" -> not routed\n" KERN_DEBUG);
851 DBG(" -> PIRQ %02x, mask %04x, excl %04x", pirq, mask, pirq_table->exclusive_irqs);
852 mask &= pcibios_irq_mask;
854 /* Work around broken HP Pavilion Notebooks which assign USB to
855 IRQ 9 even though it is actually wired to IRQ 11 */
857 if (broken_hp_bios_irq9 && pirq == 0x59 && dev->irq == 9) {
859 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
860 r->set(pirq_router_dev, dev, pirq, 11);
863 /* same for Acer Travelmate 360, but with CB and irq 11 -> 10 */
864 if (acer_tm360_irqrouting && dev->irq == 11 && dev->vendor == PCI_VENDOR_ID_O2) {
867 dev->irq = r->get(pirq_router_dev, dev, pirq);
868 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
872 * Find the best IRQ to assign: use the one
873 * reported by the device if possible.
876 if (newirq && !((1 << newirq) & mask)) {
877 if ( pci_probe & PCI_USE_PIRQ_MASK) newirq = 0;
878 else printk("\n" KERN_WARNING
879 "PCI: IRQ %i for device %s doesn't match PIRQ mask "
880 "- try pci=usepirqmask\n" KERN_DEBUG, newirq,
883 if (!newirq && assign) {
884 for (i = 0; i < 16; i++) {
885 if (!(mask & (1 << i)))
887 if (pirq_penalty[i] < pirq_penalty[newirq] && can_request_irq(i, IRQF_SHARED))
891 DBG(" -> newirq=%d", newirq);
893 /* Check if it is hardcoded */
894 if ((pirq & 0xf0) == 0xf0) {
896 DBG(" -> hardcoded IRQ %d\n", irq);
898 } else if ( r->get && (irq = r->get(pirq_router_dev, dev, pirq)) && \
899 ((!(pci_probe & PCI_USE_PIRQ_MASK)) || ((1 << irq) & mask)) ) {
900 DBG(" -> got IRQ %d\n", irq);
902 eisa_set_level_irq(irq);
903 } else if (newirq && r->set && (dev->class >> 8) != PCI_CLASS_DISPLAY_VGA) {
904 DBG(" -> assigning IRQ %d", newirq);
905 if (r->set(pirq_router_dev, dev, pirq, newirq)) {
906 eisa_set_level_irq(newirq);
914 DBG(" ... failed\n");
915 if (newirq && mask == (1 << newirq)) {
921 printk(KERN_INFO "PCI: %s IRQ %d for device %s\n", msg, irq, pci_name(dev));
923 /* Update IRQ for all devices with the same pirq value */
924 while ((dev2 = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev2)) != NULL) {
925 pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin);
929 info = pirq_get_info(dev2);
932 if (info->irq[pin].link == pirq) {
933 /* We refuse to override the dev->irq information. Give a warning! */
934 if ( dev2->irq && dev2->irq != irq && \
935 (!(pci_probe & PCI_USE_PIRQ_MASK) || \
936 ((1 << dev2->irq) & mask)) ) {
937 #ifndef CONFIG_PCI_MSI
938 printk(KERN_INFO "IRQ routing conflict for %s, have irq %d, want irq %d\n",
939 pci_name(dev2), dev2->irq, irq);
946 printk(KERN_INFO "PCI: Sharing IRQ %d with %s\n", irq, pci_name(dev2));
952 static void __init pcibios_fixup_irqs(void)
954 struct pci_dev *dev = NULL;
957 DBG(KERN_DEBUG "PCI: IRQ fixup\n");
958 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
960 * If the BIOS has set an out of range IRQ number, just ignore it.
961 * Also keep track of which IRQ's are already in use.
963 if (dev->irq >= 16) {
964 DBG(KERN_DEBUG "%s: ignoring bogus IRQ %d\n", pci_name(dev), dev->irq);
967 /* If the IRQ is already assigned to a PCI device, ignore its ISA use penalty */
968 if (pirq_penalty[dev->irq] >= 100 && pirq_penalty[dev->irq] < 100000)
969 pirq_penalty[dev->irq] = 0;
970 pirq_penalty[dev->irq]++;
974 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
975 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
976 #ifdef CONFIG_X86_IO_APIC
978 * Recalculate IRQ numbers if we use the I/O APIC.
980 if (io_apic_assign_pci_irqs)
985 pin--; /* interrupt pins are numbered starting from 1 */
986 irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin);
988 * Busses behind bridges are typically not listed in the MP-table.
989 * In this case we have to look up the IRQ based on the parent bus,
990 * parent slot, and pin number. The SMP code detects such bridged
991 * busses itself so we should get into this branch reliably.
993 if (irq < 0 && dev->bus->parent) { /* go back to the bridge */
994 struct pci_dev * bridge = dev->bus->self;
996 pin = (pin + PCI_SLOT(dev->devfn)) % 4;
997 irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
998 PCI_SLOT(bridge->devfn), pin);
1000 printk(KERN_WARNING "PCI: using PPB %s[%c] to get irq %d\n",
1001 pci_name(bridge), 'A' + pin, irq);
1004 printk(KERN_INFO "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
1005 pci_name(dev), 'A' + pin, irq);
1012 * Still no IRQ? Try to lookup one...
1014 if (pin && !dev->irq)
1015 pcibios_lookup_irq(dev, 0);
1020 * Work around broken HP Pavilion Notebooks which assign USB to
1021 * IRQ 9 even though it is actually wired to IRQ 11
1023 static int __init fix_broken_hp_bios_irq9(struct dmi_system_id *d)
1025 if (!broken_hp_bios_irq9) {
1026 broken_hp_bios_irq9 = 1;
1027 printk(KERN_INFO "%s detected - fixing broken IRQ routing\n", d->ident);
1033 * Work around broken Acer TravelMate 360 Notebooks which assign
1034 * Cardbus to IRQ 11 even though it is actually wired to IRQ 10
1036 static int __init fix_acer_tm360_irqrouting(struct dmi_system_id *d)
1038 if (!acer_tm360_irqrouting) {
1039 acer_tm360_irqrouting = 1;
1040 printk(KERN_INFO "%s detected - fixing broken IRQ routing\n", d->ident);
1045 static struct dmi_system_id __initdata pciirq_dmi_table[] = {
1047 .callback = fix_broken_hp_bios_irq9,
1048 .ident = "HP Pavilion N5400 Series Laptop",
1050 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1051 DMI_MATCH(DMI_BIOS_VERSION, "GE.M1.03"),
1052 DMI_MATCH(DMI_PRODUCT_VERSION, "HP Pavilion Notebook Model GE"),
1053 DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
1057 .callback = fix_acer_tm360_irqrouting,
1058 .ident = "Acer TravelMate 36x Laptop",
1060 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
1061 DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
1067 static int __init pcibios_irq_init(void)
1069 DBG(KERN_DEBUG "PCI: IRQ init\n");
1071 if (pcibios_enable_irq || raw_pci_ops == NULL)
1074 dmi_check_system(pciirq_dmi_table);
1076 pirq_table = pirq_find_routing_table();
1078 #ifdef CONFIG_PCI_BIOS
1079 if (!pirq_table && (pci_probe & PCI_BIOS_IRQ_SCAN))
1080 pirq_table = pcibios_get_irq_routing_table();
1084 pirq_find_router(&pirq_router);
1085 if (pirq_table->exclusive_irqs) {
1087 for (i=0; i<16; i++)
1088 if (!(pirq_table->exclusive_irqs & (1 << i)))
1089 pirq_penalty[i] += 100;
1091 /* If we're using the I/O APIC, avoid using the PCI IRQ routing table */
1092 if (io_apic_assign_pci_irqs)
1096 pcibios_enable_irq = pirq_enable_irq;
1098 pcibios_fixup_irqs();
1102 subsys_initcall(pcibios_irq_init);
1105 static void pirq_penalize_isa_irq(int irq, int active)
1108 * If any ISAPnP device reports an IRQ in its list of possible
1109 * IRQ's, we try to avoid assigning it to PCI devices.
1113 pirq_penalty[irq] += 1000;
1115 pirq_penalty[irq] += 100;
1119 void pcibios_penalize_isa_irq(int irq, int active)
1123 acpi_penalize_isa_irq(irq, active);
1126 pirq_penalize_isa_irq(irq, active);
1129 static int pirq_enable_irq(struct pci_dev *dev)
1132 struct pci_dev *temp_dev;
1134 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
1135 if (pin && !pcibios_lookup_irq(dev, 1) && !dev->irq) {
1138 pin--; /* interrupt pins are numbered starting from 1 */
1140 if (io_apic_assign_pci_irqs) {
1143 irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin);
1145 * Busses behind bridges are typically not listed in the MP-table.
1146 * In this case we have to look up the IRQ based on the parent bus,
1147 * parent slot, and pin number. The SMP code detects such bridged
1148 * busses itself so we should get into this branch reliably.
1151 while (irq < 0 && dev->bus->parent) { /* go back to the bridge */
1152 struct pci_dev * bridge = dev->bus->self;
1154 pin = (pin + PCI_SLOT(dev->devfn)) % 4;
1155 irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
1156 PCI_SLOT(bridge->devfn), pin);
1158 printk(KERN_WARNING "PCI: using PPB %s[%c] to get irq %d\n",
1159 pci_name(bridge), 'A' + pin, irq);
1164 printk(KERN_INFO "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
1165 pci_name(dev), 'A' + pin, irq);
1169 msg = " Probably buggy MP table.";
1170 } else if (pci_probe & PCI_BIOS_IRQ_SCAN)
1173 msg = " Please try using pci=biosirq.";
1175 /* With IDE legacy devices the IRQ lookup failure is not a problem.. */
1176 if (dev->class >> 8 == PCI_CLASS_STORAGE_IDE && !(dev->class & 0x5))
1179 printk(KERN_WARNING "PCI: No IRQ known for interrupt pin %c of device %s.%s\n",
1180 'A' + pin, pci_name(dev), msg);