2 * Suspend support specific for i386.
4 * Distribute under GPLv2
6 * Copyright (c) 2002 Pavel Machek <pavel@suse.cz>
7 * Copyright (c) 2001 Patrick Mochel <mochel@osdl.org>
10 #include <linux/config.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/init.h>
14 #include <linux/types.h>
15 #include <linux/spinlock.h>
16 #include <linux/poll.h>
17 #include <linux/delay.h>
18 #include <linux/sysrq.h>
19 #include <linux/proc_fs.h>
20 #include <linux/irq.h>
22 #include <linux/device.h>
23 #include <linux/suspend.h>
24 #include <linux/acpi.h>
25 #include <asm/uaccess.h>
27 #include <asm/tlbflush.h>
29 static struct saved_context saved_context;
31 unsigned long saved_context_eax, saved_context_ebx;
32 unsigned long saved_context_ecx, saved_context_edx;
33 unsigned long saved_context_esp, saved_context_ebp;
34 unsigned long saved_context_esi, saved_context_edi;
35 unsigned long saved_context_eflags;
37 extern void enable_sep_cpu(void *);
39 void __save_processor_state(struct saved_context *ctxt)
46 asm volatile ("sgdt %0" : "=m" (ctxt->gdt_limit));
47 asm volatile ("sidt %0" : "=m" (ctxt->idt_limit));
48 asm volatile ("sldt %0" : "=m" (ctxt->ldt));
49 asm volatile ("str %0" : "=m" (ctxt->tr));
54 asm volatile ("movw %%es, %0" : "=m" (ctxt->es));
55 asm volatile ("movw %%fs, %0" : "=m" (ctxt->fs));
56 asm volatile ("movw %%gs, %0" : "=m" (ctxt->gs));
57 asm volatile ("movw %%ss, %0" : "=m" (ctxt->ss));
62 asm volatile ("movl %%cr0, %0" : "=r" (ctxt->cr0));
63 asm volatile ("movl %%cr2, %0" : "=r" (ctxt->cr2));
64 asm volatile ("movl %%cr3, %0" : "=r" (ctxt->cr3));
65 asm volatile ("movl %%cr4, %0" : "=r" (ctxt->cr4));
68 void save_processor_state(void)
70 __save_processor_state(&saved_context);
76 /* restore FPU regs if necessary */
77 /* Do it out of line so that gcc does not move cr0 load to some stupid place */
79 mxcsr_feature_mask_init();
83 static void fix_processor_context(void)
85 int cpu = smp_processor_id();
86 struct tss_struct * t = &per_cpu(init_tss, cpu);
88 set_tss_desc(cpu,t); /* This just modifies memory; should not be necessary. But... This is necessary, because 386 hardware has concept of busy TSS or some similar stupidity. */
89 per_cpu(cpu_gdt_table, cpu)[GDT_ENTRY_TSS].b &= 0xfffffdff;
91 load_TR_desc(); /* This does ltr */
92 load_LDT(¤t->active_mm->context); /* This does lldt */
95 * Now maybe reload the debug registers
97 if (current->thread.debugreg[7]){
98 loaddebug(¤t->thread, 0);
99 loaddebug(¤t->thread, 1);
100 loaddebug(¤t->thread, 2);
101 loaddebug(¤t->thread, 3);
103 loaddebug(¤t->thread, 6);
104 loaddebug(¤t->thread, 7);
109 void __restore_processor_state(struct saved_context *ctxt)
115 asm volatile ("movl %0, %%cr4" :: "r" (ctxt->cr4));
116 asm volatile ("movl %0, %%cr3" :: "r" (ctxt->cr3));
117 asm volatile ("movl %0, %%cr2" :: "r" (ctxt->cr2));
118 asm volatile ("movl %0, %%cr0" :: "r" (ctxt->cr0));
123 asm volatile ("movw %0, %%es" :: "r" (ctxt->es));
124 asm volatile ("movw %0, %%fs" :: "r" (ctxt->fs));
125 asm volatile ("movw %0, %%gs" :: "r" (ctxt->gs));
126 asm volatile ("movw %0, %%ss" :: "r" (ctxt->ss));
129 * now restore the descriptor tables to their proper values
130 * ltr is done i fix_processor_context().
132 asm volatile ("lgdt %0" :: "m" (ctxt->gdt_limit));
133 asm volatile ("lidt %0" :: "m" (ctxt->idt_limit));
134 asm volatile ("lldt %0" :: "m" (ctxt->ldt));
139 if (boot_cpu_has(X86_FEATURE_SEP))
140 enable_sep_cpu(NULL);
142 fix_processor_context();
146 void restore_processor_state(void)
148 __restore_processor_state(&saved_context);
151 /* Needed by apm.c */
152 EXPORT_SYMBOL(save_processor_state);
153 EXPORT_SYMBOL(restore_processor_state);