arch/ia64/kernel/ptrace.c

   1 /*
   2  * Kernel support for the ptrace() and syscall tracing interfaces.
   3  *
   4  * Copyright (C) 1999-2005 Hewlett-Packard Co
   5  *      David Mosberger-Tang <davidm@hpl.hp.com>
   6  * Copyright (C) 2006 Intel Co
   7  *  2006-08-12  - IA64 Native Utrace implementation support added by
   8  *      Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
   9  *
  10  * Derived from the x86 and Alpha versions.
  11  */
  12 #include <linux/kernel.h>
  13 #include <linux/sched.h>
  14 #include <linux/slab.h>
  15 #include <linux/mm.h>
  16 #include <linux/errno.h>
  17 #include <linux/ptrace.h>
  18 #include <linux/tracehook.h>
  19 #include <linux/smp_lock.h>
  20 #include <linux/user.h>
  21 #include <linux/security.h>
  22 #include <linux/audit.h>
  23 #include <linux/signal.h>
  24 #include <linux/module.h>
  25
  26 #include <asm/tracehook.h>
  27 #include <asm/pgtable.h>
  28 #include <asm/processor.h>
  29 #include <asm/ptrace_offsets.h>
  30 #include <asm/rse.h>
  31 #include <asm/system.h>
  32 #include <asm/uaccess.h>
  33 #include <asm/elf.h>
  34 #include <asm/unwind.h>
  35 #ifdef CONFIG_PERFMON
  36 #include <asm/perfmon.h>
  37 #endif
  38
  39 #include "entry.h"
  40
  41 /*
  42  * Bits in the PSR that we allow ptrace() to change:
  43  *      be, up, ac, mfl, mfh (the user mask; five bits total)
  44  *      db (debug breakpoint fault; one bit)
  45  *      id (instruction debug fault disable; one bit)
  46  *      dd (data debug fault disable; one bit)
  47  *      ri (restart instruction; two bits)
  48  *      is (instruction set; one bit)
  49  */
  50 #define IPSR_MASK (IA64_PSR_UM | IA64_PSR_DB | IA64_PSR_IS      \
  51                    | IA64_PSR_ID | IA64_PSR_DD | IA64_PSR_RI)
  52
  53 #define MASK(nbits)     ((1UL << (nbits)) - 1)  /* mask with NBITS bits set */
  54 #define PFM_MASK        MASK(38)
  55
  56 #define PTRACE_DEBUG    0
  57
  58 #if PTRACE_DEBUG
  59 # define dprintk(format...)     printk(format)
  60 # define inline
  61 #else
  62 # define dprintk(format...)
  63 #endif
  64
  65 /* Return TRUE if PT was created due to kernel-entry via a system-call.  */
  66
  67 static inline int
  68 in_syscall (struct pt_regs *pt)
  69 {
  70         return (long) pt->cr_ifs >= 0;
  71 }
  72
  73 /*
  74  * Collect the NaT bits for r1-r31 from scratch_unat and return a NaT
  75  * bitset where bit i is set iff the NaT bit of register i is set.
  76  */
  77 unsigned long
  78 ia64_get_scratch_nat_bits (struct pt_regs *pt, unsigned long scratch_unat)
  79 {
  80 #       define GET_BITS(first, last, unat)                              \
  81         ({                                                              \
  82                 unsigned long bit = ia64_unat_pos(&pt->r##first);       \
  83                 unsigned long nbits = (last - first + 1);               \
  84                 unsigned long mask = MASK(nbits) << first;              \
  85                 unsigned long dist;                                     \
  86                 if (bit < first)                                        \
  87                         dist = 64 + bit - first;                        \
  88                 else                                                    \
  89                         dist = bit - first;                             \
  90                 ia64_rotr(unat, dist) & mask;                           \
  91         })
  92         unsigned long val;
  93
  94         /*
  95          * Registers that are stored consecutively in struct pt_regs
  96          * can be handled in parallel.  If the register order in
  97          * struct_pt_regs changes, this code MUST be updated.
  98          */
  99         val  = GET_BITS( 1,  1, scratch_unat);
 100         val |= GET_BITS( 2,  3, scratch_unat);
 101         val |= GET_BITS(12, 13, scratch_unat);
 102         val |= GET_BITS(14, 14, scratch_unat);
 103         val |= GET_BITS(15, 15, scratch_unat);
 104         val |= GET_BITS( 8, 11, scratch_unat);
 105         val |= GET_BITS(16, 31, scratch_unat);
 106         return val;
 107
 108 #       undef GET_BITS
 109 }
 110
 111 /*
 112  * Set the NaT bits for the scratch registers according to NAT and
 113  * return the resulting unat (assuming the scratch registers are
 114  * stored in PT).
 115  */
 116 unsigned long
 117 ia64_put_scratch_nat_bits (struct pt_regs *pt, unsigned long nat)
 118 {
 119 #       define PUT_BITS(first, last, nat)                               \
 120         ({                                                              \
 121                 unsigned long bit = ia64_unat_pos(&pt->r##first);       \
 122                 unsigned long nbits = (last - first + 1);               \
 123                 unsigned long mask = MASK(nbits) << first;              \
 124                 long dist;                                              \
 125                 if (bit < first)                                        \
 126                         dist = 64 + bit - first;                        \
 127                 else                                                    \
 128                         dist = bit - first;                             \
 129                 ia64_rotl(nat & mask, dist);                            \
 130         })
 131         unsigned long scratch_unat;
 132
 133         /*
 134          * Registers that are stored consecutively in struct pt_regs
 135          * can be handled in parallel.  If the register order in
 136          * struct_pt_regs changes, this code MUST be updated.
 137          */
 138         scratch_unat  = PUT_BITS( 1,  1, nat);
 139         scratch_unat |= PUT_BITS( 2,  3, nat);
 140         scratch_unat |= PUT_BITS(12, 13, nat);
 141         scratch_unat |= PUT_BITS(14, 14, nat);
 142         scratch_unat |= PUT_BITS(15, 15, nat);
 143         scratch_unat |= PUT_BITS( 8, 11, nat);
 144         scratch_unat |= PUT_BITS(16, 31, nat);
 145
 146         return scratch_unat;
 147
 148 #       undef PUT_BITS
 149 }
 150
 151 #define IA64_MLX_TEMPLATE       0x2
 152 #define IA64_MOVL_OPCODE        6
 153
 154 void
 155 ia64_increment_ip (struct pt_regs *regs)
 156 {
 157         unsigned long w0, ri = ia64_psr(regs)->ri + 1;
 158
 159         if (ri > 2) {
 160                 ri = 0;
 161                 regs->cr_iip += 16;
 162         } else if (ri == 2) {
 163                 get_user(w0, (char __user *) regs->cr_iip + 0);
 164                 if (((w0 >> 1) & 0xf) == IA64_MLX_TEMPLATE) {
 165                         /*
 166                          * rfi'ing to slot 2 of an MLX bundle causes
 167                          * an illegal operation fault.  We don't want
 168                          * that to happen...
 169                          */
 170                         ri = 0;
 171                         regs->cr_iip += 16;
 172                 }
 173         }
 174         ia64_psr(regs)->ri = ri;
 175 }
 176
 177 void
 178 ia64_decrement_ip (struct pt_regs *regs)
 179 {
 180         unsigned long w0, ri = ia64_psr(regs)->ri - 1;
 181
 182         if (ia64_psr(regs)->ri == 0) {
 183                 regs->cr_iip -= 16;
 184                 ri = 2;
 185                 get_user(w0, (char __user *) regs->cr_iip + 0);
 186                 if (((w0 >> 1) & 0xf) == IA64_MLX_TEMPLATE) {
 187                         /*
 188                          * rfi'ing to slot 2 of an MLX bundle causes
 189                          * an illegal operation fault.  We don't want
 190                          * that to happen...
 191                          */
 192                         ri = 1;
 193                 }
 194         }
 195         ia64_psr(regs)->ri = ri;
 196 }
 197
 198 /*
 199  * This routine is used to read an rnat bits that are stored on the
 200  * kernel backing store.  Since, in general, the alignment of the user
 201  * and kernel are different, this is not completely trivial.  In
 202  * essence, we need to construct the user RNAT based on up to two
 203  * kernel RNAT values and/or the RNAT value saved in the child's
 204  * pt_regs.
 205  *
 206  * user rbs
 207  *
 208  * +--------+ <-- lowest address
 209  * | slot62 |
 210  * +--------+
 211  * |  rnat  | 0x....1f8
 212  * +--------+
 213  * | slot00 | \
 214  * +--------+ |
 215  * | slot01 | > child_regs->ar_rnat
 216  * +--------+ |
 217  * | slot02 | /                         kernel rbs
 218  * +--------+                           +--------+
 219  *          <- child_regs->ar_bspstore  | slot61 | <-- krbs
 220  * +- - - - +                           +--------+
 221  *                                      | slot62 |
 222  * +- - - - +                           +--------+
 223  *                                      |  rnat  |
 224  * +- - - - +                           +--------+
 225  *   vrnat                              | slot00 |
 226  * +- - - - +                           +--------+
 227  *                                      =        =
 228  *                                      +--------+
 229  *                                      | slot00 | \
 230  *                                      +--------+ |
 231  *                                      | slot01 | > child_stack->ar_rnat
 232  *                                      +--------+ |
 233  *                                      | slot02 | /
 234  *                                      +--------+
 235  *                                                <--- child_stack->ar_bspstore
 236  *
 237  * The way to think of this code is as follows: bit 0 in the user rnat
 238  * corresponds to some bit N (0 <= N <= 62) in one of the kernel rnat
 239  * value.  The kernel rnat value holding this bit is stored in
 240  * variable rnat0.  rnat1 is loaded with the kernel rnat value that
 241  * form the upper bits of the user rnat value.
 242  *
 243  * Boundary cases:
 244  *
 245  * o when reading the rnat "below" the first rnat slot on the kernel
 246  *   backing store, rnat0/rnat1 are set to 0 and the low order bits are
 247  *   merged in from pt->ar_rnat.
 248  *
 249  * o when reading the rnat "above" the last rnat slot on the kernel
 250  *   backing store, rnat0/rnat1 gets its value from sw->ar_rnat.
 251  */
 252 static unsigned long
 253 get_rnat (struct task_struct *task, struct switch_stack *sw,
 254           unsigned long *krbs, unsigned long *urnat_addr,
 255           unsigned long *urbs_end)
 256 {
 257         unsigned long rnat0 = 0, rnat1 = 0, urnat = 0, *slot0_kaddr;
 258         unsigned long umask = 0, mask, m;
 259         unsigned long *kbsp, *ubspstore, *rnat0_kaddr, *rnat1_kaddr, shift;
 260         long num_regs, nbits;
 261         struct pt_regs *pt;
 262
 263         pt = task_pt_regs(task);
 264         kbsp = (unsigned long *) sw->ar_bspstore;
 265         ubspstore = (unsigned long *) pt->ar_bspstore;
 266
 267         if (urbs_end < urnat_addr)
 268                 nbits = ia64_rse_num_regs(urnat_addr - 63, urbs_end);
 269         else
 270                 nbits = 63;
 271         mask = MASK(nbits);
 272         /*
 273          * First, figure out which bit number slot 0 in user-land maps
 274          * to in the kernel rnat.  Do this by figuring out how many
 275          * register slots we're beyond the user's backingstore and
 276          * then computing the equivalent address in kernel space.
 277          */
 278         num_regs = ia64_rse_num_regs(ubspstore, urnat_addr + 1);
 279         slot0_kaddr = ia64_rse_skip_regs(krbs, num_regs);
 280         shift = ia64_rse_slot_num(slot0_kaddr);
 281         rnat1_kaddr = ia64_rse_rnat_addr(slot0_kaddr);
 282         rnat0_kaddr = rnat1_kaddr - 64;
 283
 284         if (ubspstore + 63 > urnat_addr) {
 285                 /* some bits need to be merged in from pt->ar_rnat */
 286                 umask = MASK(ia64_rse_slot_num(ubspstore)) & mask;
 287                 urnat = (pt->ar_rnat & umask);
 288                 mask &= ~umask;
 289                 if (!mask)
 290                         return urnat;
 291         }
 292
 293         m = mask << shift;
 294         if (rnat0_kaddr >= kbsp)
 295                 rnat0 = sw->ar_rnat;
 296         else if (rnat0_kaddr > krbs)
 297                 rnat0 = *rnat0_kaddr;
 298         urnat |= (rnat0 & m) >> shift;
 299
 300         m = mask >> (63 - shift);
 301         if (rnat1_kaddr >= kbsp)
 302                 rnat1 = sw->ar_rnat;
 303         else if (rnat1_kaddr > krbs)
 304                 rnat1 = *rnat1_kaddr;
 305         urnat |= (rnat1 & m) << (63 - shift);
 306         return urnat;
 307 }
 308
 309 /*
 310  * The reverse of get_rnat.
 311  */
 312 static void
 313 put_rnat (struct task_struct *task, struct switch_stack *sw,
 314           unsigned long *krbs, unsigned long *urnat_addr, unsigned long urnat,
 315           unsigned long *urbs_end)
 316 {
 317         unsigned long rnat0 = 0, rnat1 = 0, *slot0_kaddr, umask = 0, mask, m;
 318         unsigned long *kbsp, *ubspstore, *rnat0_kaddr, *rnat1_kaddr, shift;
 319         long num_regs, nbits;
 320         struct pt_regs *pt;
 321         unsigned long cfm, *urbs_kargs;
 322
 323         pt = task_pt_regs(task);
 324         kbsp = (unsigned long *) sw->ar_bspstore;
 325         ubspstore = (unsigned long *) pt->ar_bspstore;
 326
 327         urbs_kargs = urbs_end;
 328         if (in_syscall(pt)) {
 329                 /*
 330                  * If entered via syscall, don't allow user to set rnat bits
 331                  * for syscall args.
 332                  */
 333                 cfm = pt->cr_ifs;
 334                 urbs_kargs = ia64_rse_skip_regs(urbs_end, -(cfm & 0x7f));
 335         }
 336
 337         if (urbs_kargs >= urnat_addr)
 338                 nbits = 63;
 339         else {
 340                 if ((urnat_addr - 63) >= urbs_kargs)
 341                         return;
 342                 nbits = ia64_rse_num_regs(urnat_addr - 63, urbs_kargs);
 343         }
 344         mask = MASK(nbits);
 345
 346         /*
 347          * First, figure out which bit number slot 0 in user-land maps
 348          * to in the kernel rnat.  Do this by figuring out how many
 349          * register slots we're beyond the user's backingstore and
 350          * then computing the equivalent address in kernel space.
 351          */
 352         num_regs = ia64_rse_num_regs(ubspstore, urnat_addr + 1);
 353         slot0_kaddr = ia64_rse_skip_regs(krbs, num_regs);
 354         shift = ia64_rse_slot_num(slot0_kaddr);
 355         rnat1_kaddr = ia64_rse_rnat_addr(slot0_kaddr);
 356         rnat0_kaddr = rnat1_kaddr - 64;
 357
 358         if (ubspstore + 63 > urnat_addr) {
 359                 /* some bits need to be place in pt->ar_rnat: */
 360                 umask = MASK(ia64_rse_slot_num(ubspstore)) & mask;
 361                 pt->ar_rnat = (pt->ar_rnat & ~umask) | (urnat & umask);
 362                 mask &= ~umask;
 363                 if (!mask)
 364                         return;
 365         }
 366         /*
 367          * Note: Section 11.1 of the EAS guarantees that bit 63 of an
 368          * rnat slot is ignored. so we don't have to clear it here.
 369          */
 370         rnat0 = (urnat << shift);
 371         m = mask << shift;
 372         if (rnat0_kaddr >= kbsp)
 373                 sw->ar_rnat = (sw->ar_rnat & ~m) | (rnat0 & m);
 374         else if (rnat0_kaddr > krbs)
 375                 *rnat0_kaddr = ((*rnat0_kaddr & ~m) | (rnat0 & m));
 376
 377         rnat1 = (urnat >> (63 - shift));
 378         m = mask >> (63 - shift);
 379         if (rnat1_kaddr >= kbsp)
 380                 sw->ar_rnat = (sw->ar_rnat & ~m) | (rnat1 & m);
 381         else if (rnat1_kaddr > krbs)
 382                 *rnat1_kaddr = ((*rnat1_kaddr & ~m) | (rnat1 & m));
 383 }
 384
 385 static inline int
 386 on_kernel_rbs (unsigned long addr, unsigned long bspstore,
 387                unsigned long urbs_end)
 388 {
 389         unsigned long *rnat_addr = ia64_rse_rnat_addr((unsigned long *)
 390                                                       urbs_end);
 391         return (addr >= bspstore && addr <= (unsigned long) rnat_addr);
 392 }
 393
 394 /*
 395  * Read a word from the user-level backing store of task CHILD.  ADDR
 396  * is the user-level address to read the word from, VAL a pointer to
 397  * the return value, and USER_BSP gives the end of the user-level
 398  * backing store (i.e., it's the address that would be in ar.bsp after
 399  * the user executed a "cover" instruction).
 400  *
 401  * This routine takes care of accessing the kernel register backing
 402  * store for those registers that got spilled there.  It also takes
 403  * care of calculating the appropriate RNaT collection words.
 404  */
 405 long
 406 ia64_peek (struct task_struct *child, struct switch_stack *child_stack,
 407            unsigned long user_rbs_end, unsigned long addr, long *val)
 408 {
 409         unsigned long *bspstore, *krbs, regnum, *laddr, *urbs_end, *rnat_addr;
 410         struct pt_regs *child_regs;
 411         size_t copied;
 412         long ret;
 413
 414         urbs_end = (long *) user_rbs_end;
 415         laddr = (unsigned long *) addr;
 416         child_regs = task_pt_regs(child);
 417         bspstore = (unsigned long *) child_regs->ar_bspstore;
 418         krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
 419         if (on_kernel_rbs(addr, (unsigned long) bspstore,
 420                           (unsigned long) urbs_end))
 421         {
 422                 /*
 423                  * Attempt to read the RBS in an area that's actually
 424                  * on the kernel RBS => read the corresponding bits in
 425                  * the kernel RBS.
 426                  */
 427                 rnat_addr = ia64_rse_rnat_addr(laddr);
 428                 ret = get_rnat(child, child_stack, krbs, rnat_addr, urbs_end);
 429
 430                 if (laddr == rnat_addr) {
 431                         /* return NaT collection word itself */
 432                         *val = ret;
 433                         return 0;
 434                 }
 435
 436                 if (((1UL << ia64_rse_slot_num(laddr)) & ret) != 0) {
 437                         /*
 438                          * It is implementation dependent whether the
 439                          * data portion of a NaT value gets saved on a
 440                          * st8.spill or RSE spill (e.g., see EAS 2.6,
 441                          * 4.4.4.6 Register Spill and Fill).  To get
 442                          * consistent behavior across all possible
 443                          * IA-64 implementations, we return zero in
 444                          * this case.
 445                          */
 446                         *val = 0;
 447                         return 0;
 448                 }
 449
 450                 if (laddr < urbs_end) {
 451                         /*
 452                          * The desired word is on the kernel RBS and
 453                          * is not a NaT.
 454                          */
 455                         regnum = ia64_rse_num_regs(bspstore, laddr);
 456                         *val = *ia64_rse_skip_regs(krbs, regnum);
 457                         return 0;
 458                 }
 459         }
 460         copied = access_process_vm(child, addr, &ret, sizeof(ret), 0);
 461         if (copied != sizeof(ret))
 462                 return -EIO;
 463         *val = ret;
 464         return 0;
 465 }
 466
 467 long
 468 ia64_poke (struct task_struct *child, struct switch_stack *child_stack,
 469            unsigned long user_rbs_end, unsigned long addr, long val)
 470 {
 471         unsigned long *bspstore, *krbs, regnum, *laddr;
 472         unsigned long *urbs_end = (long *) user_rbs_end;
 473         struct pt_regs *child_regs;
 474
 475         laddr = (unsigned long *) addr;
 476         child_regs = task_pt_regs(child);
 477         bspstore = (unsigned long *) child_regs->ar_bspstore;
 478         krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
 479         if (on_kernel_rbs(addr, (unsigned long) bspstore,
 480                           (unsigned long) urbs_end))
 481         {
 482                 /*
 483                  * Attempt to write the RBS in an area that's actually
 484                  * on the kernel RBS => write the corresponding bits
 485                  * in the kernel RBS.
 486                  */
 487                 if (ia64_rse_is_rnat_slot(laddr))
 488                         put_rnat(child, child_stack, krbs, laddr, val,
 489                                  urbs_end);
 490                 else {
 491                         if (laddr < urbs_end) {
 492                                 regnum = ia64_rse_num_regs(bspstore, laddr);
 493                                 *ia64_rse_skip_regs(krbs, regnum) = val;
 494                         }
 495                 }
 496         } else if (access_process_vm(child, addr, &val, sizeof(val), 1)
 497                    != sizeof(val))
 498                 return -EIO;
 499         return 0;
 500 }
 501
 502 /*
 503  * Calculate the address of the end of the user-level register backing
 504  * store.  This is the address that would have been stored in ar.bsp
 505  * if the user had executed a "cover" instruction right before
 506  * entering the kernel.  If CFMP is not NULL, it is used to return the
 507  * "current frame mask" that was active at the time the kernel was
 508  * entered.
 509  */
 510 unsigned long
 511 ia64_get_user_rbs_end (struct task_struct *child, struct pt_regs *pt,
 512                        unsigned long *cfmp)
 513 {
 514         unsigned long *krbs, *bspstore, cfm = pt->cr_ifs;
 515         long ndirty;
 516
 517         krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
 518         bspstore = (unsigned long *) pt->ar_bspstore;
 519         ndirty = ia64_rse_num_regs(krbs, krbs + (pt->loadrs >> 19));
 520
 521         if (in_syscall(pt))
 522                 ndirty += (cfm & 0x7f);
 523         else
 524                 cfm &= ~(1UL << 63);    /* clear valid bit */
 525
 526         if (cfmp)
 527                 *cfmp = cfm;
 528         return (unsigned long) ia64_rse_skip_regs(bspstore, ndirty);
 529 }
 530
 531 /*
 532  * Synchronize (i.e, write) the RSE backing store living in kernel
 533  * space to the VM of the CHILD task.  SW and PT are the pointers to
 534  * the switch_stack and pt_regs structures, respectively.
 535  * USER_RBS_END is the user-level address at which the backing store
 536  * ends.
 537  */
 538 long
 539 ia64_sync_user_rbs (struct task_struct *child, struct switch_stack *sw,
 540                     unsigned long user_rbs_start, unsigned long user_rbs_end)
 541 {
 542         unsigned long addr, val;
 543         long ret;
 544
 545         /* now copy word for word from kernel rbs to user rbs: */
 546         for (addr = user_rbs_start; addr < user_rbs_end; addr += 8) {
 547                 ret = ia64_peek(child, sw, user_rbs_end, addr, &val);
 548                 if (ret < 0)
 549                         return ret;
 550                 if (access_process_vm(child, addr, &val, sizeof(val), 1)
 551                     != sizeof(val))
 552                         return -EIO;
 553         }
 554         return 0;
 555 }
 556
 557 /*
 558  * Write f32-f127 back to task->thread.fph if it has been modified.
 559  */
 560 inline void
 561 ia64_flush_fph (struct task_struct *task)
 562 {
 563         struct ia64_psr *psr = ia64_psr(task_pt_regs(task));
 564
 565         /*
 566          * Prevent migrating this task while
 567          * we're fiddling with the FPU state
 568          */
 569         preempt_disable();
 570         if (ia64_is_local_fpu_owner(task) && psr->mfh) {
 571                 psr->mfh = 0;
 572                 task->thread.flags |= IA64_THREAD_FPH_VALID;
 573                 ia64_save_fpu(&task->thread.fph[0]);
 574         }
 575         preempt_enable();
 576 }
 577
 578 /*
 579  * Sync the fph state of the task so that it can be manipulated
 580  * through thread.fph.  If necessary, f32-f127 are written back to
 581  * thread.fph or, if the fph state hasn't been used before, thread.fph
 582  * is cleared to zeroes.  Also, access to f32-f127 is disabled to
 583  * ensure that the task picks up the state from thread.fph when it
 584  * executes again.
 585  */
 586 void
 587 ia64_sync_fph (struct task_struct *task)
 588 {
 589         struct ia64_psr *psr = ia64_psr(task_pt_regs(task));
 590
 591         ia64_flush_fph(task);
 592         if (!(task->thread.flags & IA64_THREAD_FPH_VALID)) {
 593                 task->thread.flags |= IA64_THREAD_FPH_VALID;
 594                 memset(&task->thread.fph, 0, sizeof(task->thread.fph));
 595         }
 596         ia64_drop_fpu(task);
 597         psr->dfh = 1;
 598 }
 599
 600 #if 0
 601 static int
 602 access_fr (struct unw_frame_info *info, int regnum, int hi,
 603            unsigned long *data, int write_access)
 604 {
 605         struct ia64_fpreg fpval;
 606         int ret;
 607
 608         ret = unw_get_fr(info, regnum, &fpval);
 609         if (ret < 0)
 610                 return ret;
 611
 612         if (write_access) {
 613                 fpval.u.bits[hi] = *data;
 614                 ret = unw_set_fr(info, regnum, fpval);
 615         } else
 616                 *data = fpval.u.bits[hi];
 617         return ret;
 618 }
 619 #endif /* access_fr() */
 620
 621 /*
 622  * Change the machine-state of CHILD such that it will return via the normal
 623  * kernel exit-path, rather than the syscall-exit path.
 624  */
 625 static void
 626 convert_to_non_syscall (struct task_struct *child, struct pt_regs  *pt,
 627                         unsigned long cfm)
 628 {
 629         struct unw_frame_info info, prev_info;
 630         unsigned long ip, sp, pr;
 631
 632         unw_init_from_blocked_task(&info, child);
 633         while (1) {
 634                 prev_info = info;
 635                 if (unw_unwind(&info) < 0)
 636                         return;
 637
 638                 unw_get_sp(&info, &sp);
 639                 if ((long)((unsigned long)child + IA64_STK_OFFSET - sp)
 640                     < IA64_PT_REGS_SIZE) {
 641                         dprintk("ptrace.%s: ran off the top of the kernel "
 642                                 "stack\n", __FUNCTION__);
 643                         return;
 644                 }
 645                 if (unw_get_pr (&prev_info, &pr) < 0) {
 646                         unw_get_rp(&prev_info, &ip);
 647                         dprintk("ptrace.%s: failed to read "
 648                                 "predicate register (ip=0x%lx)\n",
 649                                 __FUNCTION__, ip);
 650                         return;
 651                 }
 652                 if (unw_is_intr_frame(&info)
 653                     && (pr & (1UL << PRED_USER_STACK)))
 654                         break;
 655         }
 656
 657         /*
 658          * Note: at the time of this call, the target task is blocked
 659          * in notify_resume_user() and by clearling PRED_LEAVE_SYSCALL
 660          * (aka, "pLvSys") we redirect execution from
 661          * .work_pending_syscall_end to .work_processed_kernel.
 662          */
 663         unw_get_pr(&prev_info, &pr);
 664         pr &= ~((1UL << PRED_SYSCALL) | (1UL << PRED_LEAVE_SYSCALL));
 665         pr |=  (1UL << PRED_NON_SYSCALL);
 666         unw_set_pr(&prev_info, pr);
 667
 668         pt->cr_ifs = (1UL << 63) | cfm;
 669         /*
 670          * Clear the memory that is NOT written on syscall-entry to
 671          * ensure we do not leak kernel-state to user when execution
 672          * resumes.
 673          */
 674         pt->r2 = 0;
 675         pt->r3 = 0;
 676         pt->r14 = 0;
 677         memset(&pt->r16, 0, 16*8);      /* clear r16-r31 */
 678         memset(&pt->f6, 0, 6*16);       /* clear f6-f11 */
 679         pt->b7 = 0;
 680         pt->ar_ccv = 0;
 681         pt->ar_csd = 0;
 682         pt->ar_ssd = 0;
 683 }
 684
 685 static int
 686 access_nat_bits (struct task_struct *child, struct pt_regs *pt,
 687                  struct unw_frame_info *info,
 688                  unsigned long *data, int write_access)
 689 {
 690         unsigned long regnum, nat_bits, scratch_unat, dummy = 0;
 691         char nat = 0;
 692
 693         if (write_access) {
 694                 nat_bits = *data;
 695                 scratch_unat = ia64_put_scratch_nat_bits(pt, nat_bits);
 696                 if (unw_set_ar(info, UNW_AR_UNAT, scratch_unat) < 0) {
 697                         dprintk("ptrace: failed to set ar.unat\n");
 698                         return -1;
 699                 }
 700                 for (regnum = 4; regnum <= 7; ++regnum) {
 701                         unw_get_gr(info, regnum, &dummy, &nat);
 702                         unw_set_gr(info, regnum, dummy,
 703                                    (nat_bits >> regnum) & 1);
 704                 }
 705         } else {
 706                 if (unw_get_ar(info, UNW_AR_UNAT, &scratch_unat) < 0) {
 707                         dprintk("ptrace: failed to read ar.unat\n");
 708                         return -1;
 709                 }
 710                 nat_bits = ia64_get_scratch_nat_bits(pt, scratch_unat);
 711                 for (regnum = 4; regnum <= 7; ++regnum) {
 712                         unw_get_gr(info, regnum, &dummy, &nat);
 713                         nat_bits |= (nat != 0) << regnum;
 714                 }
 715                 *data = nat_bits;
 716         }
 717         return 0;
 718 }
 719
 720
 721 /* "asmlinkage" so the input arguments are preserved... */
 722
 723 asmlinkage void
 724 syscall_trace_enter (long arg0, long arg1, long arg2, long arg3,
 725                      long arg4, long arg5, long arg6, long arg7,
 726                      struct pt_regs regs)
 727 {
 728         if (test_thread_flag(TIF_SYSCALL_TRACE))
 729                 tracehook_report_syscall(&regs, 0);
 730
 731         if (unlikely(current->audit_context)) {
 732                 long syscall;
 733                 int arch;
 734
 735                 if (IS_IA32_PROCESS(&regs)) {
 736                         syscall = regs.r1;
 737                         arch = AUDIT_ARCH_I386;
 738                 } else {
 739                         syscall = regs.r15;
 740                         arch = AUDIT_ARCH_IA64;
 741                 }
 742
 743                 audit_syscall_entry(arch, syscall, arg0, arg1, arg2, arg3);
 744         }
 745
 746 }
 747
 748 /* "asmlinkage" so the input arguments are preserved... */
 749
 750 asmlinkage void
 751 syscall_trace_leave (long arg0, long arg1, long arg2, long arg3,
 752                      long arg4, long arg5, long arg6, long arg7,
 753                      struct pt_regs regs)
 754 {
 755         if (unlikely(current->audit_context)) {
 756                 int success = AUDITSC_RESULT(regs.r10);
 757                 long result = regs.r8;
 758
 759                 if (success != AUDITSC_SUCCESS)
 760                         result = -result;
 761                 audit_syscall_exit(success, result);
 762         }
 763
 764         if (test_thread_flag(TIF_SYSCALL_TRACE))
 765                 tracehook_report_syscall(&regs, 1);
 766 }
 767
 768
 769 #ifdef CONFIG_UTRACE
 770
 771 /* Utrace implementation starts here */
 772
 773 typedef struct utrace_get {
 774         void *kbuf;
 775         void __user *ubuf;
 776 } utrace_get_t;
 777
 778 typedef struct utrace_set {
 779         const void *kbuf;
 780         const void __user *ubuf;
 781 } utrace_set_t;
 782
 783 typedef struct utrace_getset {
 784         struct task_struct *target;
 785         const struct utrace_regset *regset;
 786         union {
 787                 utrace_get_t get;
 788                 utrace_set_t set;
 789         } u;
 790         unsigned int pos;
 791         unsigned int count;
 792         int ret;
 793 } utrace_getset_t;
 794
 795 static int
 796 access_elf_gpreg(struct task_struct *target, struct unw_frame_info *info,
 797                 unsigned long addr, unsigned long *data, int write_access)
 798 {
 799         struct pt_regs *pt;
 800         unsigned long *ptr = NULL;
 801         int ret;
 802         char nat=0;
 803
 804         pt = task_pt_regs(target);
 805         switch (addr) {
 806                 case ELF_GR_OFFSET(1):
 807                         ptr = &pt->r1;
 808                         break;
 809                 case ELF_GR_OFFSET(2):
 810                 case ELF_GR_OFFSET(3):
 811                         ptr = (void *)&pt->r2 + (addr - ELF_GR_OFFSET(2));
 812                         break;
 813                 case ELF_GR_OFFSET(4) ... ELF_GR_OFFSET(7):
 814                         if (write_access) {
 815                                 /* read NaT bit first: */
 816                                 unsigned long dummy;
 817
 818                                 ret = unw_get_gr(info, addr/8, &dummy, &nat);
 819                                 if (ret < 0)
 820                                         return ret;
 821                         }
 822                         return unw_access_gr(info, addr/8, data, &nat, write_access);
 823                 case ELF_GR_OFFSET(8) ... ELF_GR_OFFSET(11):
 824                         ptr = (void *)&pt->r8 + addr - ELF_GR_OFFSET(8);
 825                         break;
 826                 case ELF_GR_OFFSET(12):
 827                 case ELF_GR_OFFSET(13):
 828                         ptr = (void *)&pt->r12 + addr - ELF_GR_OFFSET(12);
 829                         break;
 830                 case ELF_GR_OFFSET(14):
 831                         ptr = &pt->r14;
 832                         break;
 833                 case ELF_GR_OFFSET(15):
 834                         ptr = &pt->r15;
 835         }
 836         if (write_access)
 837                 *ptr = *data;
 838         else
 839                 *data = *ptr;
 840         return 0;
 841 }
 842
 843 static int
 844 access_elf_breg(struct task_struct *target, struct unw_frame_info *info,
 845                 unsigned long addr, unsigned long *data, int write_access)
 846 {
 847         struct pt_regs *pt;
 848         unsigned long *ptr = NULL;
 849
 850         pt = task_pt_regs(target);
 851         switch (addr) {
 852                 case ELF_BR_OFFSET(0):
 853                         ptr = &pt->b0;
 854                         break;
 855                 case ELF_BR_OFFSET(1) ... ELF_BR_OFFSET(5):
 856                         return unw_access_br(info, (addr - ELF_BR_OFFSET(0))/8,
 857                                         data, write_access);
 858                 case ELF_BR_OFFSET(6):
 859                         ptr = &pt->b6;
 860                         break;
 861                 case ELF_BR_OFFSET(7):
 862                         ptr = &pt->b7;
 863         }
 864         if (write_access)
 865                 *ptr = *data;
 866         else
 867                 *data = *ptr;
 868         return 0;
 869 }
 870
 871 static int
 872 access_elf_areg(struct task_struct *target, struct unw_frame_info *info,
 873                 unsigned long addr, unsigned long *data, int write_access)
 874 {
 875         struct pt_regs *pt;
 876         unsigned long cfm, urbs_end, rnat_addr;
 877         unsigned long *ptr = NULL;
 878
 879         pt = task_pt_regs(target);
 880         if (addr >= ELF_AR_RSC_OFFSET && addr <= ELF_AR_SSD_OFFSET) {
 881                 switch (addr) {
 882                         case ELF_AR_RSC_OFFSET:
 883                                 /* force PL3 */
 884                                 if (write_access)
 885                                         pt->ar_rsc = *data | (3 << 2);
 886                                 else
 887                                         *data = pt->ar_rsc;
 888                                 return 0;
 889                         case ELF_AR_BSP_OFFSET:
 890                                 /*
 891                                  * By convention, we use PT_AR_BSP to refer to
 892                                  * the end of the user-level backing store.
 893                                  * Use ia64_rse_skip_regs(PT_AR_BSP, -CFM.sof)
 894                                  * to get the real value of ar.bsp at the time
 895                                  * the kernel was entered.
 896                                  *
 897                                  * Furthermore, when changing the contents of
 898                                  * PT_AR_BSP (or PT_CFM) we MUST copy any
 899                                  * users-level stacked registers that are
 900                                  * stored on the kernel stack back to
 901                                  * user-space because otherwise, we might end
 902                                  * up clobbering kernel stacked registers.
 903                                  * Also, if this happens while the task is
 904                                  * blocked in a system call, which convert the
 905                                  * state such that the non-system-call exit
 906                                  * path is used.  This ensures that the proper
 907                                  * state will be picked up when resuming
 908                                  * execution.  However, it *also* means that
 909                                  * once we write PT_AR_BSP/PT_CFM, it won't be
 910                                  * possible to modify the syscall arguments of
 911                                  * the pending system call any longer.  This
 912                                  * shouldn't be an issue because modifying
 913                                  * PT_AR_BSP/PT_CFM generally implies that
 914                                  * we're either abandoning the pending system
 915                                  * call or that we defer it's re-execution
 916                                  * (e.g., due to GDB doing an inferior
 917                                  * function call).
 918                                  */
 919                                 urbs_end = ia64_get_user_rbs_end(target, pt, &cfm);
 920                                 if (write_access) {
 921                                         if (*data != urbs_end) {
 922                                                 if (ia64_sync_user_rbs(target, info->sw,
 923                                                                         pt->ar_bspstore,
 924                                                                         urbs_end) < 0)
 925                                                         return -1;
 926                                                 if (in_syscall(pt))
 927                                                         convert_to_non_syscall(target,
 928                                                                         pt,
 929                                                                         cfm);
 930                                                 /*
 931                                                  * Simulate user-level write
 932                                                  * of ar.bsp:
 933                                                  */
 934                                                 pt->loadrs = 0;
 935                                                 pt->ar_bspstore = *data;
 936                                         }
 937                                 } else
 938                                         *data = urbs_end;
 939                                 return 0;
 940                         case ELF_AR_BSPSTORE_OFFSET: // ar_bsp_store
 941                                 ptr = &pt->ar_bspstore;
 942                                 break;
 943                         case ELF_AR_RNAT_OFFSET:  // ar_rnat
 944                                 urbs_end = ia64_get_user_rbs_end(target, pt, NULL);
 945                                 rnat_addr = (long) ia64_rse_rnat_addr((long *)
 946                                                 urbs_end);
 947                                 if (write_access)
 948                                         return ia64_poke(target, info->sw, urbs_end,
 949                                                         rnat_addr, *data);
 950                                 else
 951                                         return ia64_peek(target, info->sw, urbs_end,
 952                                                         rnat_addr, data);
 953                         case ELF_AR_CCV_OFFSET:   // ar_ccv
 954                                 ptr = &pt->ar_ccv;
 955                                 break;
 956                         case ELF_AR_UNAT_OFFSET:        // ar_unat
 957                                 ptr = &pt->ar_unat;
 958                                 break;
 959                         case ELF_AR_FPSR_OFFSET:  // ar_fpsr
 960                                 ptr = &pt->ar_fpsr;
 961                                 break;
 962                         case ELF_AR_PFS_OFFSET:  // ar_pfs
 963                                 ptr = &pt->ar_pfs;
 964                                 break;
 965                         case ELF_AR_LC_OFFSET:   // ar_lc
 966                                 return unw_access_ar(info, UNW_AR_LC, data,
 967                                                 write_access);
 968                         case ELF_AR_EC_OFFSET:    // ar_ec
 969                                 return unw_access_ar(info, UNW_AR_EC, data,
 970                                                 write_access);
 971                         case ELF_AR_CSD_OFFSET:   // ar_csd
 972                                 ptr = &pt->ar_csd;
 973                                 break;
 974                         case ELF_AR_SSD_OFFSET:   // ar_ssd
 975                                 ptr = &pt->ar_ssd;
 976                 }
 977         } else if (addr >= ELF_CR_IIP_OFFSET && addr <= ELF_CR_IPSR_OFFSET) {
 978                 switch (addr) {
 979                         case ELF_CR_IIP_OFFSET:
 980                                 ptr = &pt->cr_iip;
 981                                 break;
 982                         case ELF_CFM_OFFSET:
 983                                 urbs_end = ia64_get_user_rbs_end(target, pt, &cfm);
 984                                 if (write_access) {
 985                                         if (((cfm ^ *data) & PFM_MASK) != 0) {
 986                                                 if (ia64_sync_user_rbs(target, info->sw,
 987                                                                         pt->ar_bspstore,
 988                                                                         urbs_end) < 0)
 989                                                         return -1;
 990                                                 if (in_syscall(pt))
 991                                                         convert_to_non_syscall(target,
 992                                                                         pt,
 993                                                                         cfm);
 994                                                 pt->cr_ifs = ((pt->cr_ifs & ~PFM_MASK)
 995                                                                 | (*data & PFM_MASK));
 996                                         }
 997                                 } else
 998                                         *data = cfm;
 999                                 return 0;
1000                         case ELF_CR_IPSR_OFFSET:
1001                                 if (write_access)
1002                                         pt->cr_ipsr = ((*data & IPSR_MASK)
1003                                                         | (pt->cr_ipsr & ~IPSR_MASK));
1004                                 else
1005                                         *data = (pt->cr_ipsr & IPSR_MASK);
1006                                 return 0;
1007                 }
1008         } else if (addr == ELF_NAT_OFFSET)
1009                         return access_nat_bits(target, pt, info,
1010                                         data, write_access);
1011         else if (addr == ELF_PR_OFFSET)
1012                         ptr = &pt->pr;
1013         else
1014                 return -1;
1015
1016         if (write_access)
1017                 *ptr = *data;
1018         else
1019                 *data = *ptr;
1020
1021         return 0;
1022 }
1023
1024 static int
1025 access_elf_reg(struct task_struct *target, struct unw_frame_info *info,
1026                 unsigned long addr, unsigned long *data, int write_access)
1027 {
1028         if (addr >= ELF_GR_OFFSET(1) && addr <= ELF_GR_OFFSET(15))
1029                 return access_elf_gpreg(target, info, addr, data, write_access);
1030         else if (addr >= ELF_BR_OFFSET(0) && addr <= ELF_BR_OFFSET(7))
1031                 return access_elf_breg(target, info, addr, data, write_access);
1032         else
1033                 return access_elf_areg(target, info, addr, data, write_access);
1034 }
1035
1036 void do_gpregs_get(struct unw_frame_info *info, void *arg)
1037 {
1038         struct pt_regs *pt;
1039         utrace_getset_t *dst = arg;
1040         elf_greg_t tmp[16];
1041         unsigned int i, index, min_copy;
1042
1043         if (unw_unwind_to_user(info) < 0)
1044                 return;
1045
1046         /*
1047          * coredump format:
1048          *      r0-r31
1049          *      NaT bits (for r0-r31; bit N == 1 iff rN is a NaT)
1050          *      predicate registers (p0-p63)
1051          *      b0-b7
1052          *      ip cfm user-mask
1053          *      ar.rsc ar.bsp ar.bspstore ar.rnat
1054          *      ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec
1055          */
1056
1057
1058         /* Skip r0 */
1059         if (dst->count > 0 && dst->pos < ELF_GR_OFFSET(1)) {
1060                 dst->ret = utrace_regset_copyout_zero(&dst->pos, &dst->count,
1061                                                       &dst->u.get.kbuf,
1062                                                       &dst->u.get.ubuf,
1063                                                       0, ELF_GR_OFFSET(1));
1064                 if (dst->ret || dst->count == 0)
1065                         return;
1066         }
1067
1068         /* gr1 - gr15 */
1069         if (dst->count > 0 && dst->pos < ELF_GR_OFFSET(16)) {
1070                 index = (dst->pos - ELF_GR_OFFSET(1)) / sizeof(elf_greg_t);
1071                 min_copy = ELF_GR_OFFSET(16) > (dst->pos + dst->count) ?
1072                          (dst->pos + dst->count) : ELF_GR_OFFSET(16);
1073                 for (i = dst->pos; i < min_copy; i += sizeof(elf_greg_t), index++)
1074                         if (access_elf_reg(dst->target, info, i,
1075                                                 &tmp[index], 0) < 0) {
1076                                 dst->ret = -EIO;
1077                                 return;
1078                         }
1079                 dst->ret = utrace_regset_copyout(&dst->pos, &dst->count,
1080                                 &dst->u.get.kbuf, &dst->u.get.ubuf, tmp,
1081                                 ELF_GR_OFFSET(1), ELF_GR_OFFSET(16));
1082                 if (dst->ret || dst->count == 0)
1083                         return;
1084         }
1085
1086         /* r16-r31 */
1087         if (dst->count > 0 && dst->pos < ELF_NAT_OFFSET) {
1088                 pt = task_pt_regs(dst->target);
1089                 dst->ret = utrace_regset_copyout(&dst->pos, &dst->count,
1090                                 &dst->u.get.kbuf, &dst->u.get.ubuf, &pt->r16,
1091                                 ELF_GR_OFFSET(16), ELF_NAT_OFFSET);
1092                 if (dst->ret || dst->count == 0)
1093                         return;
1094         }
1095
1096         /* nat, pr, b0 - b7 */
1097         if (dst->count > 0 && dst->pos < ELF_CR_IIP_OFFSET) {
1098                 index = (dst->pos - ELF_NAT_OFFSET) / sizeof(elf_greg_t);
1099                 min_copy = ELF_CR_IIP_OFFSET > (dst->pos + dst->count) ?
1100                          (dst->pos + dst->count) : ELF_CR_IIP_OFFSET;
1101                 for (i = dst->pos; i < min_copy; i += sizeof(elf_greg_t), index++)
1102                         if (access_elf_reg(dst->target, info, i,
1103                                                 &tmp[index], 0) < 0) {
1104                                 dst->ret = -EIO;
1105                                 return;
1106                         }
1107                 dst->ret = utrace_regset_copyout(&dst->pos, &dst->count,
1108                                 &dst->u.get.kbuf, &dst->u.get.ubuf, tmp,
1109                                 ELF_NAT_OFFSET, ELF_CR_IIP_OFFSET);
1110                 if (dst->ret || dst->count == 0)
1111                         return;
1112         }
1113
1114         /* ip cfm psr ar.rsc ar.bsp ar.bspstore ar.rnat
1115          * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec ar.csd ar.ssd
1116          */
1117         if (dst->count > 0 && dst->pos < (ELF_AR_END_OFFSET)) {
1118                 index = (dst->pos - ELF_CR_IIP_OFFSET) / sizeof(elf_greg_t);
1119                 min_copy = ELF_AR_END_OFFSET > (dst->pos + dst->count) ?
1120                          (dst->pos + dst->count) : ELF_AR_END_OFFSET;
1121                 for (i = dst->pos; i < min_copy; i += sizeof(elf_greg_t), index++)
1122                         if (access_elf_reg(dst->target, info, i,
1123                                                 &tmp[index], 0) < 0) {
1124                                 dst->ret = -EIO;
1125                                 return;
1126                         }
1127                 dst->ret = utrace_regset_copyout(&dst->pos, &dst->count,
1128                                 &dst->u.get.kbuf, &dst->u.get.ubuf, tmp,
1129                                 ELF_CR_IIP_OFFSET, ELF_AR_END_OFFSET);
1130         }
1131 }
1132
1133 void do_gpregs_set(struct unw_frame_info *info, void *arg)
1134 {
1135         struct pt_regs *pt;
1136         utrace_getset_t *dst = arg;
1137         elf_greg_t tmp[16];
1138         unsigned int i, index;
1139
1140         if (unw_unwind_to_user(info) < 0)
1141                 return;
1142
1143         /* Skip r0 */
1144         if (dst->count > 0 && dst->pos < ELF_GR_OFFSET(1)) {
1145                 dst->ret = utrace_regset_copyin_ignore(&dst->pos, &dst->count,
1146                                                        &dst->u.set.kbuf,
1147                                                        &dst->u.set.ubuf,
1148                                                        0, ELF_GR_OFFSET(1));
1149                 if (dst->ret || dst->count == 0)
1150                         return;
1151         }
1152
1153         /* gr1-gr15 */
1154         if (dst->count > 0 && dst->pos < ELF_GR_OFFSET(16)) {
1155                 i = dst->pos;
1156                 index = (dst->pos - ELF_GR_OFFSET(1)) / sizeof(elf_greg_t);
1157                 dst->ret = utrace_regset_copyin(&dst->pos, &dst->count,
1158                                 &dst->u.set.kbuf, &dst->u.set.ubuf, tmp,
1159                                 ELF_GR_OFFSET(1), ELF_GR_OFFSET(16));
1160                 if (dst->ret)
1161                         return;
1162                 for ( ; i < dst->pos; i += sizeof(elf_greg_t), index++)
1163                         if (access_elf_reg(dst->target, info, i,
1164                                                 &tmp[index], 1) < 0) {
1165                                 dst->ret = -EIO;
1166                                 return;
1167                         }
1168                 if (dst->count == 0)
1169                         return;
1170         }
1171
1172         /* gr16-gr31 */
1173         if (dst->count > 0 && dst->pos < ELF_NAT_OFFSET) {
1174                 pt = task_pt_regs(dst->target);
1175                 dst->ret = utrace_regset_copyin(&dst->pos, &dst->count,
1176                                 &dst->u.set.kbuf, &dst->u.set.ubuf, &pt->r16,
1177                                 ELF_GR_OFFSET(16), ELF_NAT_OFFSET);
1178                 if (dst->ret || dst->count == 0)
1179                         return;
1180         }
1181
1182         /* nat, pr, b0 - b7 */
1183         if (dst->count > 0 && dst->pos < ELF_CR_IIP_OFFSET) {
1184                 i = dst->pos;
1185                 index = (dst->pos - ELF_NAT_OFFSET) / sizeof(elf_greg_t);
1186                 dst->ret = utrace_regset_copyin(&dst->pos, &dst->count,
1187                                 &dst->u.set.kbuf, &dst->u.set.ubuf, tmp,
1188                                 ELF_NAT_OFFSET, ELF_CR_IIP_OFFSET);
1189                 if (dst->ret)
1190                         return;
1191                 for (; i < dst->pos; i += sizeof(elf_greg_t), index++)
1192                         if (access_elf_reg(dst->target, info, i,
1193                                                 &tmp[index], 1) < 0) {
1194                                 dst->ret = -EIO;
1195                                 return;
1196                         }
1197                 if (dst->count == 0)
1198                         return;
1199         }
1200
1201         /* ip cfm psr ar.rsc ar.bsp ar.bspstore ar.rnat
1202          * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec ar.csd ar.ssd
1203          */
1204         if (dst->count > 0 && dst->pos < (ELF_AR_END_OFFSET)) {
1205                 i = dst->pos;
1206                 index = (dst->pos - ELF_CR_IIP_OFFSET) / sizeof(elf_greg_t);
1207                 dst->ret = utrace_regset_copyin(&dst->pos, &dst->count,
1208                                 &dst->u.set.kbuf, &dst->u.set.ubuf, tmp,
1209                                 ELF_CR_IIP_OFFSET, ELF_AR_END_OFFSET);
1210                 if (dst->ret)
1211                         return;
1212                 for ( ; i < dst->pos; i += sizeof(elf_greg_t), index++)
1213                         if (access_elf_reg(dst->target, info, i,
1214                                                 &tmp[index], 1) < 0) {
1215                                 dst->ret = -EIO;
1216                                 return;
1217                         }
1218         }
1219 }
1220
1221 #define ELF_FP_OFFSET(i)        (i * sizeof(elf_fpreg_t))
1222
1223 void do_fpregs_get(struct unw_frame_info *info, void *arg)
1224 {
1225         utrace_getset_t *dst = arg;
1226         struct task_struct *task = dst->target;
1227         elf_fpreg_t tmp[30];
1228         int index, min_copy, i;
1229
1230         if (unw_unwind_to_user(info) < 0)
1231                 return;
1232
1233         /* Skip pos 0 and 1 */
1234         if (dst->count > 0 && dst->pos < ELF_FP_OFFSET(2)) {
1235                 dst->ret = utrace_regset_copyout_zero(&dst->pos, &dst->count,
1236                                                       &dst->u.get.kbuf,
1237                                                       &dst->u.get.ubuf,
1238                                                       0, ELF_FP_OFFSET(2));
1239                 if (dst->count == 0 || dst->ret)
1240                         return;
1241         }
1242
1243         /* fr2-fr31 */
1244         if (dst->count > 0 && dst->pos < ELF_FP_OFFSET(32)) {
1245                 index = (dst->pos - ELF_FP_OFFSET(2)) / sizeof(elf_fpreg_t);
1246                 min_copy = min(((unsigned int)ELF_FP_OFFSET(32)),
1247                                 dst->pos + dst->count);
1248                 for (i = dst->pos; i < min_copy; i += sizeof(elf_fpreg_t), index++)
1249                         if (unw_get_fr(info, i / sizeof(elf_fpreg_t),
1250                                          &tmp[index])) {
1251                                 dst->ret = -EIO;
1252                                 return;
1253                         }
1254                 dst->ret = utrace_regset_copyout(&dst->pos, &dst->count,
1255                                 &dst->u.get.kbuf, &dst->u.get.ubuf, tmp,
1256                                 ELF_FP_OFFSET(2), ELF_FP_OFFSET(32));
1257                 if (dst->count == 0 || dst->ret)
1258                         return;
1259         }
1260
1261         /* fph */
1262         if (dst->count > 0) {
1263                 ia64_flush_fph(dst->target);
1264                 if (task->thread.flags & IA64_THREAD_FPH_VALID)
1265                         dst->ret = utrace_regset_copyout(
1266                                 &dst->pos, &dst->count,
1267                                 &dst->u.get.kbuf, &dst->u.get.ubuf,
1268                                 &dst->target->thread.fph,
1269                                 ELF_FP_OFFSET(32), -1);
1270                 else
1271                         /* Zero fill instead.  */
1272                         dst->ret = utrace_regset_copyout_zero(
1273                                 &dst->pos, &dst->count,
1274                                 &dst->u.get.kbuf, &dst->u.get.ubuf,
1275                                 ELF_FP_OFFSET(32), -1);
1276         }
1277 }
1278
1279 void do_fpregs_set(struct unw_frame_info *info, void *arg)
1280 {
1281         utrace_getset_t *dst = arg;
1282         elf_fpreg_t fpreg, tmp[30];
1283         int index, start, end;
1284
1285         if (unw_unwind_to_user(info) < 0)
1286                 return;
1287
1288         /* Skip pos 0 and 1 */
1289         if (dst->count > 0 && dst->pos < ELF_FP_OFFSET(2)) {
1290                 dst->ret = utrace_regset_copyin_ignore(&dst->pos, &dst->count,
1291                                                        &dst->u.set.kbuf,
1292                                                        &dst->u.set.ubuf,
1293                                                        0, ELF_FP_OFFSET(2));
1294                 if (dst->count == 0 || dst->ret)
1295                         return;
1296         }
1297
1298         /* fr2-fr31 */
1299         if (dst->count > 0 && dst->pos < ELF_FP_OFFSET(32)) {
1300                 start = dst->pos;
1301                 end = min(((unsigned int)ELF_FP_OFFSET(32)),
1302                          dst->pos + dst->count);
1303                 dst->ret = utrace_regset_copyin(&dst->pos, &dst->count,
1304                                 &dst->u.set.kbuf, &dst->u.set.ubuf, tmp,
1305                                 ELF_FP_OFFSET(2), ELF_FP_OFFSET(32));
1306                 if (dst->ret)
1307                         return;
1308
1309                 if (start & 0xF) { //  only write high part
1310                         if (unw_get_fr(info, start / sizeof(elf_fpreg_t),
1311                                          &fpreg)) {
1312                                 dst->ret = -EIO;
1313                                 return;
1314                         }
1315                         tmp[start / sizeof(elf_fpreg_t) - 2].u.bits[0]
1316                                 = fpreg.u.bits[0];
1317                         start &= ~0xFUL;
1318                 }
1319                 if (end & 0xF) { // only write low part
1320                         if (unw_get_fr(info, end / sizeof(elf_fpreg_t), &fpreg)) {
1321                                 dst->ret = -EIO;
1322                                 return;
1323                         }
1324                         tmp[end / sizeof(elf_fpreg_t) -2].u.bits[1]
1325                                 = fpreg.u.bits[1];
1326                         end = (end + 0xF) & ~0xFUL;
1327                 }
1328
1329                 for ( ; start < end ; start += sizeof(elf_fpreg_t)) {
1330                         index = start / sizeof(elf_fpreg_t);
1331                         if (unw_set_fr(info, index, tmp[index - 2])){
1332                                 dst->ret = -EIO;
1333                                 return;
1334                         }
1335                 }
1336                 if (dst->ret || dst->count == 0)
1337                         return;
1338         }
1339
1340         /* fph */
1341         if (dst->count > 0 && dst->pos < ELF_FP_OFFSET(128)) {
1342                 ia64_sync_fph(dst->target);
1343                 dst->ret = utrace_regset_copyin(&dst->pos, &dst->count,
1344                                                 &dst->u.set.kbuf,
1345                                                 &dst->u.set.ubuf,
1346                                                 &dst->target->thread.fph,
1347                                                 ELF_FP_OFFSET(32), -1);
1348         }
1349 }
1350
1351 static int
1352 do_regset_call(void (*call)(struct unw_frame_info *, void *),
1353                struct task_struct *target,
1354                const struct utrace_regset *regset,
1355                unsigned int pos, unsigned int count,
1356                const void *kbuf, const void __user *ubuf)
1357 {
1358         utrace_getset_t info = { .target = target, .regset = regset,
1359                                  .pos = pos, .count = count,
1360                                  .u.set = { .kbuf = kbuf, .ubuf = ubuf },
1361                                  .ret = 0 };
1362
1363         if (target == current)
1364                 unw_init_running(call, &info);
1365         else {
1366                 struct unw_frame_info ufi;
1367                 memset(&ufi, 0, sizeof(ufi));
1368                 unw_init_from_blocked_task(&ufi, target);
1369                 (*call)(&ufi, &info);
1370         }
1371
1372         return info.ret;
1373 }
1374
1375 static int
1376 gpregs_get(struct task_struct *target,
1377            const struct utrace_regset *regset,
1378            unsigned int pos, unsigned int count,
1379            void *kbuf, void __user *ubuf)
1380 {
1381         return do_regset_call(do_gpregs_get, target, regset, pos, count, kbuf, ubuf);
1382 }
1383
1384 static int gpregs_set(struct task_struct *target,
1385                 const struct utrace_regset *regset,
1386                 unsigned int pos, unsigned int count,
1387                 const void *kbuf, const void __user *ubuf)
1388 {
1389         return do_regset_call(do_gpregs_set, target, regset, pos, count, kbuf, ubuf);
1390 }
1391
1392 /*
1393  * This is called to write back the register backing store.
1394  * ptrace does this before it stops, so that a tracer reading the user
1395  * memory after the thread stops will get the current register data.
1396  */
1397 static int
1398 gpregs_writeback(struct task_struct *target,
1399                  const struct utrace_regset *regset,
1400                  int now)
1401 {
1402         unsigned long urbs_end, cfm;
1403         struct pt_regs *pt = task_pt_regs(target);
1404         struct switch_stack *sw = (void *) (target->thread.ksp + 16);
1405         urbs_end = ia64_get_user_rbs_end(target, pt, &cfm);
1406         return ia64_sync_user_rbs(target, sw, pt->ar_bspstore, urbs_end);
1407 }
1408
1409 static int
1410 fpregs_active(struct task_struct *target, const struct utrace_regset *regset)
1411 {
1412         return (target->thread.flags & IA64_THREAD_FPH_VALID) ? 128 : 32;
1413 }
1414
1415 static int fpregs_get(struct task_struct *target,
1416                 const struct utrace_regset *regset,
1417                 unsigned int pos, unsigned int count,
1418                 void *kbuf, void __user *ubuf)
1419 {
1420         return do_regset_call(do_fpregs_get, target, regset, pos, count, kbuf, ubuf);
1421 }
1422
1423 static int fpregs_set(struct task_struct *target,
1424                 const struct utrace_regset *regset,
1425                 unsigned int pos, unsigned int count,
1426                 const void *kbuf, const void __user *ubuf)
1427 {
1428         return do_regset_call(do_fpregs_set, target, regset, pos, count, kbuf, ubuf);
1429 }
1430
1431 static int dbregs_get(struct task_struct *target,
1432                 const struct utrace_regset *regset,
1433                 unsigned int pos, unsigned int count,
1434                 void *kbuf, void __user *ubuf)
1435 {
1436         int ret;
1437
1438 #ifdef CONFIG_PERFMON
1439         /*
1440          * Check if debug registers are used by perfmon. This
1441          * test must be done once we know that we can do the
1442          * operation, i.e. the arguments are all valid, but
1443          * before we start modifying the state.
1444          *
1445          * Perfmon needs to keep a count of how many processes
1446          * are trying to modify the debug registers for system
1447          * wide monitoring sessions.
1448          *
1449          * We also include read access here, because they may
1450          * cause the PMU-installed debug register state
1451          * (dbr[], ibr[]) to be reset. The two arrays are also
1452          * used by perfmon, but we do not use
1453          * IA64_THREAD_DBG_VALID. The registers are restored
1454          * by the PMU context switch code.
1455          */
1456         if (pfm_use_debug_registers(target))
1457                 return -EIO;
1458 #endif
1459
1460         if (!(target->thread.flags & IA64_THREAD_DBG_VALID))
1461                 ret = utrace_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
1462                                                  0, -1);
1463         else {
1464                 preempt_disable();
1465                 if (target == current)
1466                         ia64_load_debug_regs(&target->thread.dbr[0]);
1467                 preempt_enable_no_resched();
1468                 ret = utrace_regset_copyout(&pos, &count, &kbuf, &ubuf,
1469                                             &target->thread.dbr, 0, -1);
1470         }
1471
1472         return ret;
1473 }
1474
1475 static int dbregs_set(struct task_struct *target,
1476                 const struct utrace_regset *regset,
1477                 unsigned int pos, unsigned int count,
1478                 const void *kbuf, const void __user *ubuf)
1479 {
1480         int i, ret;
1481
1482 #ifdef CONFIG_PERFMON
1483         if (pfm_use_debug_registers(target))
1484                 return -EIO;
1485 #endif
1486
1487         ret = 0;
1488         if (!(target->thread.flags & IA64_THREAD_DBG_VALID)){
1489                 target->thread.flags |= IA64_THREAD_DBG_VALID;
1490                 memset(target->thread.dbr, 0, 2 * sizeof(target->thread.dbr));
1491         } else if (target == current){
1492                 preempt_disable();
1493                 ia64_save_debug_regs(&target->thread.dbr[0]);
1494                 preempt_enable_no_resched();
1495         }
1496
1497         ret = utrace_regset_copyin(&pos, &count, &kbuf, &ubuf,
1498                                    &target->thread.dbr, 0, -1);
1499
1500         for (i = 1; i < IA64_NUM_DBG_REGS; i += 2) {
1501                 target->thread.dbr[i] &= ~(7UL << 56);
1502                 target->thread.ibr[i] &= ~(7UL << 56);
1503         }
1504
1505         if (ret)
1506                 return ret;
1507
1508         if (target == current){
1509                 preempt_disable();
1510                 ia64_load_debug_regs(&target->thread.dbr[0]);
1511                 preempt_enable_no_resched();
1512         }
1513         return 0;
1514 }
1515
1516 static const struct utrace_regset native_regsets[] = {
1517         {
1518                 .n = ELF_NGREG,
1519                 .size = sizeof(elf_greg_t), .align = sizeof(elf_greg_t),
1520                 .get = gpregs_get, .set = gpregs_set,
1521                 .writeback = gpregs_writeback
1522         },
1523         {
1524                 .n = ELF_NFPREG,
1525                 .size = sizeof(elf_fpreg_t), .align = sizeof(elf_fpreg_t),
1526                 .get = fpregs_get, .set = fpregs_set, .active = fpregs_active
1527         },
1528         {
1529                 .n = 2 * IA64_NUM_DBG_REGS, .size = sizeof(long),
1530                 .align = sizeof(long),
1531                 .get = dbregs_get, .set = dbregs_set
1532         }
1533 };
1534
1535 const struct utrace_regset_view utrace_ia64_native = {
1536         .name = "ia64",
1537         .e_machine = EM_IA_64,
1538         .regsets = native_regsets,
1539         .n = sizeof native_regsets / sizeof native_regsets[0],
1540 };
1541 EXPORT_SYMBOL_GPL(utrace_ia64_native);
1542
1543 #endif  /* CONFIG_UTRACE */
1544
1545
1546 #ifdef CONFIG_PTRACE
1547
1548 #define WORD(member, num) \
1549         offsetof(struct pt_all_user_regs, member), \
1550         offsetof(struct pt_all_user_regs, member) + num * sizeof(long)
1551 static const struct ptrace_layout_segment pt_all_user_regs_layout[] = {
1552         {WORD(nat, 1),          0,      ELF_NAT_OFFSET},
1553         {WORD(cr_iip, 1),       0,      ELF_CR_IIP_OFFSET},
1554         {WORD(cfm, 1),          0,      ELF_CFM_OFFSET},
1555         {WORD(cr_ipsr, 1),      0,      ELF_CR_IPSR_OFFSET},
1556         {WORD(pr, 1),           0,      ELF_PR_OFFSET},
1557         {WORD(gr[0], 32),       0,      ELF_GR_OFFSET(0)},
1558         {WORD(br[0], 8),        0,      ELF_BR_OFFSET(0)},
1559         {WORD(ar[PT_AUR_RSC], 4),  0,   ELF_AR_RSC_OFFSET},
1560         {WORD(ar[PT_AUR_CCV], 1),  0,   ELF_AR_CCV_OFFSET},
1561         {WORD(ar[PT_AUR_UNAT], 1), 0,   ELF_AR_UNAT_OFFSET},
1562         {WORD(ar[PT_AUR_FPSR], 1), 0,   ELF_AR_FPSR_OFFSET},
1563         {WORD(ar[PT_AUR_PFS], 3),  0,   ELF_AR_PFS_OFFSET},
1564         {offsetof(struct pt_all_user_regs, fr[0]),
1565          offsetof(struct pt_all_user_regs, fr[128]),
1566          1, 0},
1567         {0, 0, -1, 0}
1568 };
1569 #undef WORD
1570
1571 #define NEXT(addr, sum) (addr + sum * sizeof(long))
1572 static const struct ptrace_layout_segment pt_uarea_layout[] = {
1573         {PT_F32,        PT_NAT_BITS,            1,      ELF_FP_OFFSET(32)},
1574         {PT_NAT_BITS,   NEXT(PT_NAT_BITS, 1),   0,      ELF_NAT_OFFSET},
1575         {PT_F2,         PT_F10,                 1,      ELF_FP_OFFSET(2)},
1576         {PT_F10,        PT_R4,                  1,      ELF_FP_OFFSET(10)},
1577         {PT_R4,         PT_B1,                  0,      ELF_GR_OFFSET(4)},
1578         {PT_B1,         PT_AR_EC,               0,      ELF_BR_OFFSET(1)},
1579         {PT_AR_EC,      PT_AR_LC,               0,      ELF_AR_EC_OFFSET},
1580         {PT_AR_LC,      NEXT(PT_AR_LC, 1),      0,      ELF_AR_LC_OFFSET},
1581         {PT_CR_IPSR,    PT_CR_IIP,              0,      ELF_CR_IPSR_OFFSET},
1582         {PT_CR_IIP,     PT_AR_UNAT,             0,      ELF_CR_IIP_OFFSET},
1583         {PT_AR_UNAT,    PT_AR_PFS,              0,      ELF_AR_UNAT_OFFSET},
1584         {PT_AR_PFS,     PT_AR_RSC,              0,      ELF_AR_PFS_OFFSET},
1585         {PT_AR_RSC,     PT_AR_RNAT,             0,      ELF_AR_RSC_OFFSET},
1586         {PT_AR_RNAT,    PT_AR_BSPSTORE,         0,      ELF_AR_RNAT_OFFSET},
1587         {PT_AR_BSPSTORE,PT_PR,                  0,      ELF_AR_BSPSTORE_OFFSET},
1588         {PT_PR,         PT_B6,                  0,      ELF_PR_OFFSET},
1589         {PT_B6,         PT_AR_BSP,              0,      ELF_BR_OFFSET(6)},
1590         {PT_AR_BSP,     PT_R1,                  0,      ELF_AR_BSP_OFFSET},
1591         {PT_R1,         PT_R12,                 0,      ELF_GR_OFFSET(1)},
1592         {PT_R12,        PT_R8,                  0,      ELF_GR_OFFSET(12)},
1593         {PT_R8,         PT_R16,                 0,      ELF_GR_OFFSET(8)},
1594         {PT_R16,        PT_AR_CCV,              0,      ELF_GR_OFFSET(16)},
1595         {PT_AR_CCV,     PT_AR_FPSR,             0,      ELF_AR_CCV_OFFSET},
1596         {PT_AR_FPSR,    PT_B0,                  0,      ELF_AR_FPSR_OFFSET},
1597         {PT_B0,         PT_B7,                  0,      ELF_BR_OFFSET(0)},
1598         {PT_B7,         PT_F6,                  0,      ELF_BR_OFFSET(7)},
1599         {PT_F6,         PT_AR_CSD,              1,      ELF_FP_OFFSET(6)},
1600         {PT_AR_CSD,     NEXT(PT_AR_CSD, 2),     0,      ELF_AR_CSD_OFFSET},
1601         {PT_DBR,        NEXT(PT_DBR, 8),        2,      0},
1602         {PT_IBR,        NEXT(PT_IBR, 8),        2,      8 * sizeof(long)},
1603         {0, 0, -1, 0}
1604 };
1605 #undef NEXT
1606
1607 fastcall int arch_ptrace(long *request, struct task_struct *child,
1608                          struct utrace_attached_engine *engine,
1609                          unsigned long addr, unsigned long data, long *val)
1610 {
1611         int ret = -ENOSYS;
1612         switch (*request) {
1613         case PTRACE_OLD_GETSIGINFO:
1614                 *request = PTRACE_GETSIGINFO;
1615                 break;
1616         case PTRACE_OLD_SETSIGINFO:
1617                 *request = PTRACE_SETSIGINFO;
1618                 break;
1619
1620         case PTRACE_PEEKTEXT: /* read word at location addr. */
1621         case PTRACE_PEEKDATA:
1622                 ret = access_process_vm(child, addr, val, sizeof(*val), 0);
1623                 ret = ret == sizeof(*val) ? 0 : -EIO;
1624                 break;
1625
1626         case PTRACE_PEEKUSR:
1627                 return ptrace_layout_access(child, engine,
1628                                             utrace_native_view(current),
1629                                             pt_uarea_layout,
1630                                             addr, sizeof(long),
1631                                             NULL, val, 0);
1632         case PTRACE_POKEUSR:
1633                 return ptrace_pokeusr(child, engine,
1634                                       pt_uarea_layout, addr, data);
1635
1636         case PTRACE_GETREGS:
1637         case PTRACE_SETREGS:
1638                 return ptrace_layout_access(child, engine,
1639                                             utrace_native_view(current),
1640                                             pt_all_user_regs_layout,
1641                                             0, sizeof(struct pt_all_user_regs),
1642                                             (void __user *) data, NULL,
1643                                             *request == PTRACE_SETREGS);
1644         }
1645         return ret;
1646 }
1647
1648 #endif  /* CONFIG_PTRACE */