2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
9 #include <asm/sn/pci/pci_bus_cvlink.h>
10 #include <asm/sn/simulator.h>
12 char pciio_info_fingerprint[] = "pciio_info";
14 /* =====================================================================
15 * PCI Generic Bus Provider
16 * Implement PCI provider operations. The pciio* layer provides a
17 * platform-independent interface for PCI devices. This layer
18 * switches among the possible implementations of a PCI adapter.
21 /* =====================================================================
22 * Provider Function Location
24 * If there is more than one possible provider for
25 * this platform, we need to examine the master
26 * vertex of the current vertex for a provider
27 * function structure, and indirect through the
28 * appropriately named member.
32 pciio_to_provider_fns(vertex_hdl_t dev)
34 pciio_info_t card_info;
35 pciio_provider_t *provider_fns;
38 * We're called with two types of vertices, one is
39 * the bridge vertex (ends with "pci") and the other is the
40 * pci slot vertex (ends with "pci/[0-8]"). For the first type
41 * we need to get the provider from the PFUNCS label. For
42 * the second we get it from fastinfo/c_pops.
44 provider_fns = pciio_provider_fns_get(dev);
45 if (provider_fns == NULL) {
46 card_info = pciio_info_get(dev);
47 if (card_info != NULL) {
48 provider_fns = pciio_info_pops_get(card_info);
52 if (provider_fns == NULL) {
53 char devname[MAXDEVNAME];
54 panic("%s: provider_fns == NULL", vertex_to_name(dev, devname, MAXDEVNAME));
60 #define DEV_FUNC(dev,func) pciio_to_provider_fns(dev)->func
61 #define CAST_PIOMAP(x) ((pciio_piomap_t)(x))
62 #define CAST_DMAMAP(x) ((pciio_dmamap_t)(x))
63 #define CAST_INTR(x) ((pciio_intr_t)(x))
66 * Many functions are not passed their vertex
67 * information directly; rather, they must
68 * dive through a resource map. These macros
69 * are available to coordinate this detail.
71 #define PIOMAP_FUNC(map,func) DEV_FUNC((map)->pp_dev,func)
72 #define DMAMAP_FUNC(map,func) DEV_FUNC((map)->pd_dev,func)
73 #define INTR_FUNC(intr_hdl,func) DEV_FUNC((intr_hdl)->pi_dev,func)
75 /* =====================================================================
78 * For mapping system virtual address space to
79 * pciio space on a specified card
83 pciio_piomap_alloc(vertex_hdl_t dev, /* set up mapping for this device */
84 device_desc_t dev_desc, /* device descriptor */
85 pciio_space_t space, /* CFG, MEM, IO, or a device-decoded window */
86 iopaddr_t addr, /* lowest address (or offset in window) */
87 size_t byte_count, /* size of region containing our mappings */
88 size_t byte_count_max, /* maximum size of a mapping */
90 { /* defined in sys/pio.h */
91 return (pciio_piomap_t) DEV_FUNC(dev, piomap_alloc)
92 (dev, dev_desc, space, addr, byte_count, byte_count_max, flags);
96 pciio_piomap_free(pciio_piomap_t pciio_piomap)
98 PIOMAP_FUNC(pciio_piomap, piomap_free)
99 (CAST_PIOMAP(pciio_piomap));
103 pciio_piomap_addr(pciio_piomap_t pciio_piomap, /* mapping resources */
104 iopaddr_t pciio_addr, /* map for this pciio address */
106 { /* map this many bytes */
107 pciio_piomap->pp_kvaddr = PIOMAP_FUNC(pciio_piomap, piomap_addr)
108 (CAST_PIOMAP(pciio_piomap), pciio_addr, byte_count);
110 return pciio_piomap->pp_kvaddr;
114 pciio_piomap_done(pciio_piomap_t pciio_piomap)
116 PIOMAP_FUNC(pciio_piomap, piomap_done)
117 (CAST_PIOMAP(pciio_piomap));
121 pciio_piotrans_addr(vertex_hdl_t dev, /* translate for this device */
122 device_desc_t dev_desc, /* device descriptor */
123 pciio_space_t space, /* CFG, MEM, IO, or a device-decoded window */
124 iopaddr_t addr, /* starting address (or offset in window) */
125 size_t byte_count, /* map this many bytes */
127 { /* (currently unused) */
128 return DEV_FUNC(dev, piotrans_addr)
129 (dev, dev_desc, space, addr, byte_count, flags);
133 pciio_pio_addr(vertex_hdl_t dev, /* translate for this device */
134 device_desc_t dev_desc, /* device descriptor */
135 pciio_space_t space, /* CFG, MEM, IO, or a device-decoded window */
136 iopaddr_t addr, /* starting address (or offset in window) */
137 size_t byte_count, /* map this many bytes */
138 pciio_piomap_t *mapp, /* where to return the map pointer */
141 pciio_piomap_t map = 0;
146 map = *mapp; /* possible pre-allocated map */
147 *mapp = 0; /* record "no map used" */
150 res = pciio_piotrans_addr
151 (dev, dev_desc, space, addr, byte_count, flags);
153 return res; /* pciio_piotrans worked */
156 map = pciio_piomap_alloc
157 (dev, dev_desc, space, addr, byte_count, byte_count, flags);
159 return res; /* pciio_piomap_alloc failed */
163 res = pciio_piomap_addr
164 (map, addr, byte_count);
167 pciio_piomap_free(map);
168 return res; /* pciio_piomap_addr failed */
171 *mapp = map; /* pass back map used */
173 return res; /* pciio_piomap_addr succeeded */
177 pciio_piospace_alloc(vertex_hdl_t dev, /* Device requiring space */
178 device_desc_t dev_desc, /* Device descriptor */
179 pciio_space_t space, /* MEM32/MEM64/IO */
180 size_t byte_count, /* Size of mapping */
182 { /* Alignment needed */
183 if (align < PAGE_SIZE)
185 return DEV_FUNC(dev, piospace_alloc)
186 (dev, dev_desc, space, byte_count, align);
190 pciio_piospace_free(vertex_hdl_t dev, /* Device freeing space */
191 pciio_space_t space, /* Type of space */
192 iopaddr_t pciaddr, /* starting address */
194 { /* Range of address */
195 DEV_FUNC(dev, piospace_free)
196 (dev, space, pciaddr, byte_count);
199 /* =====================================================================
202 * For mapping from pci space to system
207 pciio_dmamap_alloc(vertex_hdl_t dev, /* set up mappings for this device */
208 device_desc_t dev_desc, /* device descriptor */
209 size_t byte_count_max, /* max size of a mapping */
211 { /* defined in dma.h */
212 return (pciio_dmamap_t) DEV_FUNC(dev, dmamap_alloc)
213 (dev, dev_desc, byte_count_max, flags);
217 pciio_dmamap_free(pciio_dmamap_t pciio_dmamap)
219 DMAMAP_FUNC(pciio_dmamap, dmamap_free)
220 (CAST_DMAMAP(pciio_dmamap));
224 pciio_dmamap_addr(pciio_dmamap_t pciio_dmamap, /* use these mapping resources */
225 paddr_t paddr, /* map for this address */
227 { /* map this many bytes */
228 return DMAMAP_FUNC(pciio_dmamap, dmamap_addr)
229 (CAST_DMAMAP(pciio_dmamap), paddr, byte_count);
233 pciio_dmamap_done(pciio_dmamap_t pciio_dmamap)
235 DMAMAP_FUNC(pciio_dmamap, dmamap_done)
236 (CAST_DMAMAP(pciio_dmamap));
240 pciio_dmatrans_addr(vertex_hdl_t dev, /* translate for this device */
241 device_desc_t dev_desc, /* device descriptor */
242 paddr_t paddr, /* system physical address */
243 size_t byte_count, /* length */
245 { /* defined in dma.h */
246 return DEV_FUNC(dev, dmatrans_addr)
247 (dev, dev_desc, paddr, byte_count, flags);
251 pciio_dma_addr(vertex_hdl_t dev, /* translate for this device */
252 device_desc_t dev_desc, /* device descriptor */
253 paddr_t paddr, /* system physical address */
254 size_t byte_count, /* length */
255 pciio_dmamap_t *mapp, /* map to use, then map we used */
258 pciio_dmamap_t map = 0;
263 map = *mapp; /* possible pre-allocated map */
264 *mapp = 0; /* record "no map used" */
267 res = pciio_dmatrans_addr
268 (dev, dev_desc, paddr, byte_count, flags);
270 return res; /* pciio_dmatrans worked */
273 map = pciio_dmamap_alloc
274 (dev, dev_desc, byte_count, flags);
276 return res; /* pciio_dmamap_alloc failed */
280 res = pciio_dmamap_addr
281 (map, paddr, byte_count);
284 pciio_dmamap_free(map);
285 return res; /* pciio_dmamap_addr failed */
288 *mapp = map; /* pass back map used */
290 return res; /* pciio_dmamap_addr succeeded */
294 pciio_dmamap_drain(pciio_dmamap_t map)
296 DMAMAP_FUNC(map, dmamap_drain)
301 pciio_dmaaddr_drain(vertex_hdl_t dev, paddr_t addr, size_t size)
303 DEV_FUNC(dev, dmaaddr_drain)
307 /* =====================================================================
308 * INTERRUPT MANAGEMENT
310 * Allow crosstalk devices to establish interrupts
314 * Allocate resources required for an interrupt as specified in intr_desc.
315 * Return resource handle in intr_hdl.
318 pciio_intr_alloc(vertex_hdl_t dev, /* which Crosstalk device */
319 device_desc_t dev_desc, /* device descriptor */
320 pciio_intr_line_t lines, /* INTR line(s) to attach */
321 vertex_hdl_t owner_dev)
322 { /* owner of this interrupt */
323 return (pciio_intr_t) DEV_FUNC(dev, intr_alloc)
324 (dev, dev_desc, lines, owner_dev);
328 * Free resources consumed by intr_alloc.
331 pciio_intr_free(pciio_intr_t intr_hdl)
333 INTR_FUNC(intr_hdl, intr_free)
334 (CAST_INTR(intr_hdl));
338 * Associate resources allocated with a previous pciio_intr_alloc call with the
339 * described handler, arg, name, etc.
341 * Returns 0 on success, returns <0 on failure.
344 pciio_intr_connect(pciio_intr_t intr_hdl,
345 intr_func_t intr_func, intr_arg_t intr_arg) /* pciio intr resource handle */
347 return INTR_FUNC(intr_hdl, intr_connect)
348 (CAST_INTR(intr_hdl), intr_func, intr_arg);
352 * Disassociate handler with the specified interrupt.
355 pciio_intr_disconnect(pciio_intr_t intr_hdl)
357 INTR_FUNC(intr_hdl, intr_disconnect)
358 (CAST_INTR(intr_hdl));
362 * Return a hwgraph vertex that represents the CPU currently
363 * targeted by an interrupt.
366 pciio_intr_cpu_get(pciio_intr_t intr_hdl)
368 return INTR_FUNC(intr_hdl, intr_cpu_get)
369 (CAST_INTR(intr_hdl));
373 pciio_slot_func_to_name(char *name,
375 pciio_function_t func)
378 * standard connection points:
380 * PCIIO_SLOT_NONE: .../pci/direct
381 * PCIIO_FUNC_NONE: .../pci/<SLOT> ie. .../pci/3
382 * multifunction: .../pci/<SLOT><FUNC> ie. .../pci/3c
385 if (slot == PCIIO_SLOT_NONE)
386 sprintf(name, EDGE_LBL_DIRECT);
387 else if (func == PCIIO_FUNC_NONE)
388 sprintf(name, "%d", slot);
390 sprintf(name, "%d%c", slot, 'a'+func);
396 * Get the pciio info structure corresponding to the
397 * specified PCI "slot" (we like it when the same index
398 * number is used for the PCI IDSEL, the REQ/GNT pair,
399 * and the interrupt line being used for INTA. We like
400 * it so much we call it the slot number).
404 vertex_hdl_t pciio_vhdl,
405 pciio_slot_t pci_slot)
408 pciio_info_t info = 0;
411 pciio_slot_func_to_name(namebuf, pci_slot, PCIIO_FUNC_NONE);
413 hwgraph_traverse(pciio_vhdl, namebuf, &conn)) {
414 info = pciio_info_chk(conn);
415 hwgraph_vertex_unref(conn);
423 * pciio_error_handler:
424 * dispatch an error to the appropriate
425 * pciio connection point, or process
426 * it as a generic pci error.
427 * Yes, the first parameter is the
428 * provider vertex at the middle of
429 * the bus; we get to the pciio connect
430 * point using the ioerror widgetdev field.
432 * This function is called by the
433 * specific PCI provider, after it has figured
434 * out where on the PCI bus (including which slot,
435 * if it can tell) the error came from.
440 vertex_hdl_t pciio_vhdl,
445 pciio_info_t pciio_info;
446 vertex_hdl_t pconn_vhdl;
451 #if DEBUG && ERROR_DEBUG
452 printk("%v: pciio_error_handler\n", pciio_vhdl);
455 IOERR_PRINTF(printk(KERN_NOTICE "%v: PCI Bus Error: Error code: %d Error mode: %d\n",
456 pciio_vhdl, error_code, mode));
458 /* If there is an error handler sitting on
459 * the "no-slot" connection point, give it
460 * first crack at the error. NOTE: it is
461 * quite possible that this function may
462 * do further refining of the ioerror.
464 pciio_info = pciio_cardinfo_get(pciio_vhdl, PCIIO_SLOT_NONE);
465 if (pciio_info && pciio_info->c_efunc) {
466 pconn_vhdl = pciio_info_dev_get(pciio_info);
468 retval = pciio_info->c_efunc
469 (pciio_info->c_einfo, error_code, mode, ioerror);
470 if (retval != IOERROR_UNHANDLED)
474 /* Is the error associated with a particular slot?
476 if (IOERROR_FIELDVALID(ioerror, widgetdev)) {
480 * widgetdev is a 4byte value encoded as slot in the higher order
481 * 2 bytes and function in the lower order 2 bytes.
483 IOERROR_GETVALUE(widgetdev, ioerror, widgetdev);
484 slot = pciio_widgetdev_slot_get(widgetdev);
486 /* If this slot has an error handler,
487 * deliver the error to it.
489 pciio_info = pciio_cardinfo_get(pciio_vhdl, slot);
490 if (pciio_info != NULL) {
491 if (pciio_info->c_efunc != NULL) {
493 pconn_vhdl = pciio_info_dev_get(pciio_info);
495 retval = pciio_info->c_efunc
496 (pciio_info->c_einfo, error_code, mode, ioerror);
497 if (retval != IOERROR_UNHANDLED)
503 return (mode == MODE_DEVPROBE)
504 ? IOERROR_HANDLED /* probes are OK */
505 : IOERROR_UNHANDLED; /* otherwise, foo! */
508 /* =====================================================================
509 * CONFIGURATION MANAGEMENT
513 * Startup a crosstalk provider
516 pciio_provider_startup(vertex_hdl_t pciio_provider)
518 DEV_FUNC(pciio_provider, provider_startup)
523 * Shutdown a crosstalk provider
526 pciio_provider_shutdown(vertex_hdl_t pciio_provider)
528 DEV_FUNC(pciio_provider, provider_shutdown)
533 * Read value of configuration register
536 pciio_config_get(vertex_hdl_t dev,
543 /* handle accesses that cross words here,
544 * since that's common code between all
545 * possible providers.
548 unsigned biw = 4 - (reg&3);
552 value |= DEV_FUNC(dev, config_get)
553 (dev, reg, biw) << shift;
563 * Change value of configuration register
566 pciio_config_set(vertex_hdl_t dev,
571 /* handle accesses that cross words here,
572 * since that's common code between all
573 * possible providers.
576 unsigned biw = 4 - (reg&3);
580 DEV_FUNC(dev, config_set)
581 (dev, reg, biw, value);
588 /* =====================================================================
589 * GENERIC PCI SUPPORT FUNCTIONS
593 * Issue a hardware reset to a card.
596 pciio_reset(vertex_hdl_t dev)
598 return DEV_FUNC(dev, reset) (dev);
601 /****** Generic pci slot information interfaces ******/
604 pciio_info_chk(vertex_hdl_t pciio)
606 arbitrary_info_t ainfo = 0;
608 hwgraph_info_get_LBL(pciio, INFO_LBL_PCIIO, &ainfo);
609 return (pciio_info_t) ainfo;
613 pciio_info_get(vertex_hdl_t pciio)
615 pciio_info_t pciio_info;
617 pciio_info = (pciio_info_t) hwgraph_fastinfo_get(pciio);
619 if ((pciio_info != NULL) &&
620 (pciio_info->c_fingerprint != pciio_info_fingerprint)
621 && (pciio_info->c_fingerprint != NULL)) {
623 return((pciio_info_t)-1); /* Should panic .. */
630 pciio_info_set(vertex_hdl_t pciio, pciio_info_t pciio_info)
632 if (pciio_info != NULL)
633 pciio_info->c_fingerprint = pciio_info_fingerprint;
634 hwgraph_fastinfo_set(pciio, (arbitrary_info_t) pciio_info);
636 /* Also, mark this vertex as a PCI slot
637 * and use the pciio_info, so pciio_info_chk
638 * can work (and be fairly efficient).
640 hwgraph_info_add_LBL(pciio, INFO_LBL_PCIIO,
641 (arbitrary_info_t) pciio_info);
645 pciio_info_dev_get(pciio_info_t pciio_info)
647 return (pciio_info->c_vertex);
652 pciio_info_bus_get(pciio_info_t pciio_info)
654 return (pciio_info->c_bus);
658 pciio_info_slot_get(pciio_info_t pciio_info)
660 return (pciio_info->c_slot);
664 pciio_info_function_get(pciio_info_t pciio_info)
666 return (pciio_info->c_func);
670 pciio_info_vendor_id_get(pciio_info_t pciio_info)
672 return (pciio_info->c_vendor);
676 pciio_info_device_id_get(pciio_info_t pciio_info)
678 return (pciio_info->c_device);
682 pciio_info_master_get(pciio_info_t pciio_info)
684 return (pciio_info->c_master);
688 pciio_info_mfast_get(pciio_info_t pciio_info)
690 return (pciio_info->c_mfast);
694 pciio_info_pops_get(pciio_info_t pciio_info)
696 return (pciio_info->c_pops);
699 /* =====================================================================
700 * GENERIC PCI INITIALIZATION FUNCTIONS
704 * pciioattach: called for each vertex in the graph
705 * that is a PCI provider.
709 pciio_attach(vertex_hdl_t pciio)
711 #if DEBUG && ATTACH_DEBUG
712 char devname[MAXDEVNAME];
713 printk("%s: pciio_attach\n", vertex_to_name(pciio, devname, MAXDEVNAME));
719 * Associate a set of pciio_provider functions with a vertex.
722 pciio_provider_register(vertex_hdl_t provider, pciio_provider_t *pciio_fns)
724 hwgraph_info_add_LBL(provider, INFO_LBL_PFUNCS, (arbitrary_info_t) pciio_fns);
728 * Disassociate a set of pciio_provider functions with a vertex.
731 pciio_provider_unregister(vertex_hdl_t provider)
733 arbitrary_info_t ainfo;
735 hwgraph_info_remove_LBL(provider, INFO_LBL_PFUNCS, (long *) &ainfo);
739 * Obtain a pointer to the pciio_provider functions for a specified Crosstalk
743 pciio_provider_fns_get(vertex_hdl_t provider)
745 arbitrary_info_t ainfo = 0;
747 (void) hwgraph_info_get_LBL(provider, INFO_LBL_PFUNCS, &ainfo);
748 return (pciio_provider_t *) ainfo;
752 pciio_device_info_new(
753 pciio_info_t pciio_info,
756 pciio_function_t func,
757 pciio_vendor_id_t vendor_id,
758 pciio_device_id_t device_id)
761 pciio_info = kmalloc(sizeof (*(pciio_info)), GFP_KERNEL);
763 memset(pciio_info, 0, sizeof (*(pciio_info)));
765 printk(KERN_WARNING "pciio_device_info_new(): Unable to "
766 "allocate memory\n");
770 pciio_info->c_slot = slot;
771 pciio_info->c_func = func;
772 pciio_info->c_vendor = vendor_id;
773 pciio_info->c_device = device_id;
774 pciio_info->c_master = master;
775 pciio_info->c_mfast = hwgraph_fastinfo_get(master);
776 pciio_info->c_pops = pciio_provider_fns_get(master);
777 pciio_info->c_efunc = 0;
778 pciio_info->c_einfo = 0;
784 pciio_device_info_free(pciio_info_t pciio_info)
786 /* NOTE : pciio_info is a structure within the pcibr_info
787 * and not a pointer to memory allocated on the heap !!
789 memset((char *)pciio_info, 0, sizeof(pciio_info));
793 pciio_device_info_register(
794 vertex_hdl_t connectpt, /* vertex at center of bus */
795 pciio_info_t pciio_info) /* details about the connectpt */
799 int device_master_set(vertex_hdl_t, vertex_hdl_t);
801 pciio_slot_func_to_name(name,
806 hwgraph_path_add(connectpt, name, &pconn))
809 pciio_info->c_vertex = pconn;
810 pciio_info_set(pconn, pciio_info);
813 * create link to our pci provider
816 device_master_set(pconn, pciio_info->c_master);
821 pciio_device_info_unregister(vertex_hdl_t connectpt,
822 pciio_info_t pciio_info)
825 vertex_hdl_t pconn = NULL;
830 pciio_slot_func_to_name(name,
834 pciio_info_set(pconn,0);
836 hwgraph_vertex_unref(pconn);
837 hwgraph_vertex_destroy(pconn);
842 pciio_device_attach(vertex_hdl_t pconn,
845 pciio_info_t pciio_info;
846 pciio_vendor_id_t vendor_id;
847 pciio_device_id_t device_id;
850 pciio_info = pciio_info_get(pconn);
852 vendor_id = pciio_info->c_vendor;
853 device_id = pciio_info->c_device;
855 /* we don't start attaching things until
856 * all the driver init routines (including
857 * pciio_init) have been called; so we
858 * can assume here that we have a registry.
861 return(cdl_add_connpt(vendor_id, device_id, pconn, drv_flags));
865 pciio_device_detach(vertex_hdl_t pconn,
872 * Allocate space from the specified PCI window mapping resource. On
873 * success record information about the allocation in the supplied window
874 * allocation cookie (if non-NULL) and return the address of the allocated
875 * window. On failure return NULL.
877 * The "size" parameter is usually from a PCI device's Base Address Register
878 * (BAR) decoder. As such, the allocation must be aligned to be a multiple of
879 * that. The "align" parameter acts as a ``minimum alignment'' allocation
880 * constraint. The alignment contraint reflects system or device addressing
881 * restrictions such as the inability to share higher level ``windows''
882 * between devices, etc. The returned PCI address allocation will be a
883 * multiple of the alignment constraint both in alignment and size. Thus, the
884 * returned PCI address block is aligned to the maximum of the requested size
888 pciio_device_win_alloc(struct resource *root_resource,
889 pciio_win_alloc_t win_alloc,
890 size_t start, size_t size, size_t align)
893 struct resource *new_res;
896 new_res = (struct resource *) kmalloc( sizeof(struct resource), GFP_KERNEL);
901 status = allocate_resource( root_resource, new_res,
902 size, start /* Min start addr. */,
903 (start + size) - 1, 1,
908 status = allocate_resource( root_resource, new_res,
909 size, align /* Min start addr. */,
910 root_resource->end, align,
916 return((iopaddr_t) NULL);
920 * If a window allocation cookie has been supplied, use it to keep
921 * track of all the allocated space assigned to this window.
924 win_alloc->wa_resource = new_res;
925 win_alloc->wa_base = new_res->start;
926 win_alloc->wa_pages = size;
929 return new_res->start;
933 * Free the specified window allocation back into the PCI window mapping
934 * resource. As noted above, we keep page addresses offset by 1 ...
937 pciio_device_win_free(pciio_win_alloc_t win_alloc)
941 if (win_alloc->wa_resource) {
942 status = release_resource(win_alloc->wa_resource);
944 kfree(win_alloc->wa_resource);
951 * pciio_error_register:
952 * arrange for a function to be called with
953 * a specified first parameter plus other
954 * information when an error is encountered
955 * and traced to the pci slot corresponding
956 * to the connection point pconn.
958 * may also be called with a null function
959 * pointer to "unregister" the error handler.
961 * NOTE: subsequent calls silently overwrite
962 * previous data for this vertex. We assume that
963 * cooperating drivers, well, cooperate ...
966 pciio_error_register(vertex_hdl_t pconn,
967 error_handler_f *efunc,
968 error_handler_arg_t einfo)
970 pciio_info_t pciio_info;
972 pciio_info = pciio_info_get(pconn);
973 ASSERT(pciio_info != NULL);
974 pciio_info->c_efunc = efunc;
975 pciio_info->c_einfo = einfo;
979 * Check if any device has been found in this slot, and return
981 * vhdl is the vertex for the slot
984 pciio_slot_inuse(vertex_hdl_t pconn_vhdl)
986 pciio_info_t pciio_info = pciio_info_get(pconn_vhdl);
989 ASSERT(pciio_info->c_vertex == pconn_vhdl);
990 if (pciio_info->c_vendor) {
992 * Non-zero value for vendor indicate
993 * a board being found in this slot.
1001 pciio_info_type1_get(pciio_info_t pci_info)
1003 return (pci_info->c_type1);