arch/ia64/xen/xenminstate.h

   1
   2 #include <asm/cache.h>
   3
   4 #ifdef CONFIG_XEN
   5 #include "../kernel/entry.h"
   6 #else
   7 #include "entry.h"
   8 #endif
   9
  10 /*
  11  * For ivt.s we want to access the stack virtually so we don't have to disable translation
  12  * on interrupts.
  13  *
  14  *  On entry:
  15  *      r1:     pointer to current task (ar.k6)
  16  */
  17 #define MINSTATE_START_SAVE_MIN_VIRT                                                            \
  18 (pUStk) mov ar.rsc=0;           /* set enforced lazy mode, pl 0, little-endian, loadrs=0 */     \
  19         ;;                                                                                      \
  20 (pUStk) mov.m r24=ar.rnat;                                                                      \
  21 (pUStk) addl r22=IA64_RBS_OFFSET,r1;                    /* compute base of RBS */               \
  22 (pKStk) mov r1=sp;                                      /* get sp  */                           \
  23         ;;                                                                                      \
  24 (pUStk) lfetch.fault.excl.nt1 [r22];                                                            \
  25 (pUStk) addl r1=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r1;   /* compute base of memory stack */      \
  26 (pUStk) mov r23=ar.bspstore;                            /* save ar.bspstore */                  \
  27         ;;                                                                                      \
  28 (pUStk) mov ar.bspstore=r22;                            /* switch to kernel RBS */              \
  29 (pKStk) addl r1=-IA64_PT_REGS_SIZE,r1;                  /* if in kernel mode, use sp (r12) */   \
  30         ;;                                                                                      \
  31 (pUStk) mov r18=ar.bsp;                                                                         \
  32 (pUStk) mov ar.rsc=0x3;         /* set eager mode, pl 0, little-endian, loadrs=0 */             \
  33
  34 #define MINSTATE_END_SAVE_MIN_VIRT                                                              \
  35         bsw.1;                  /* switch back to bank 1 (must be last in insn group) */        \
  36         ;;
  37
  38 /*
  39  * For mca_asm.S we want to access the stack physically since the state is saved before we
  40  * go virtual and don't want to destroy the iip or ipsr.
  41  */
  42 #define MINSTATE_START_SAVE_MIN_PHYS                                                            \
  43 (pKStk) mov r3=IA64_KR(PER_CPU_DATA);;                                                          \
  44 (pKStk) addl r3=THIS_CPU(ia64_mca_data),r3;;                                                    \
  45 (pKStk) ld8 r3 = [r3];;                                                                         \
  46 (pKStk) addl r3=IA64_MCA_CPU_INIT_STACK_OFFSET,r3;;                                             \
  47 (pKStk) addl sp=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r3;                                           \
  48 (pUStk) mov ar.rsc=0;           /* set enforced lazy mode, pl 0, little-endian, loadrs=0 */     \
  49 (pUStk) addl r22=IA64_RBS_OFFSET,r1;            /* compute base of register backing store */    \
  50         ;;                                                                                      \
  51 (pUStk) mov r24=ar.rnat;                                                                        \
  52 (pUStk) addl r1=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r1;   /* compute base of memory stack */      \
  53 (pUStk) mov r23=ar.bspstore;                            /* save ar.bspstore */                  \
  54 (pUStk) dep r22=-1,r22,61,3;                    /* compute kernel virtual addr of RBS */        \
  55         ;;                                                                                      \
  56 (pKStk) addl r1=-IA64_PT_REGS_SIZE,r1;          /* if in kernel mode, use sp (r12) */           \
  57 (pUStk) mov ar.bspstore=r22;                    /* switch to kernel RBS */                      \
  58         ;;                                                                                      \
  59 (pUStk) mov r18=ar.bsp;                                                                         \
  60 (pUStk) mov ar.rsc=0x3;         /* set eager mode, pl 0, little-endian, loadrs=0 */             \
  61
  62 #define MINSTATE_END_SAVE_MIN_PHYS                                                              \
  63         dep r12=-1,r12,61,3;            /* make sp a kernel virtual address */                  \
  64         ;;
  65
  66 #ifdef MINSTATE_VIRT
  67 # define MINSTATE_GET_CURRENT(reg)      mov reg=IA64_KR(CURRENT)
  68 # define MINSTATE_START_SAVE_MIN        MINSTATE_START_SAVE_MIN_VIRT
  69 # define MINSTATE_END_SAVE_MIN          MINSTATE_END_SAVE_MIN_VIRT
  70 #endif
  71
  72 #ifdef MINSTATE_PHYS
  73 # define MINSTATE_GET_CURRENT(reg)      mov reg=IA64_KR(CURRENT);; tpa reg=reg
  74 # define MINSTATE_START_SAVE_MIN        MINSTATE_START_SAVE_MIN_PHYS
  75 # define MINSTATE_END_SAVE_MIN          MINSTATE_END_SAVE_MIN_PHYS
  76 #endif
  77
  78 /*
  79  * DO_SAVE_MIN switches to the kernel stacks (if necessary) and saves
  80  * the minimum state necessary that allows us to turn psr.ic back
  81  * on.
  82  *
  83  * Assumed state upon entry:
  84  *      psr.ic: off
  85  *      r31:    contains saved predicates (pr)
  86  *
  87  * Upon exit, the state is as follows:
  88  *      psr.ic: off
  89  *       r2 = points to &pt_regs.r16
  90  *       r8 = contents of ar.ccv
  91  *       r9 = contents of ar.csd
  92  *      r10 = contents of ar.ssd
  93  *      r11 = FPSR_DEFAULT
  94  *      r12 = kernel sp (kernel virtual address)
  95  *      r13 = points to current task_struct (kernel virtual address)
  96  *      p15 = TRUE if psr.i is set in cr.ipsr
  97  *      predicate registers (other than p2, p3, and p15), b6, r3, r14, r15:
  98  *              preserved
  99  * CONFIG_XEN note: p6/p7 are not preserved
 100  *
 101  * Note that psr.ic is NOT turned on by this macro.  This is so that
 102  * we can pass interruption state as arguments to a handler.
 103  */
 104 #ifdef CONFIG_XEN
 105 #define DO_SAVE_MIN(COVER,SAVE_IFS,EXTRA)                                                       \
 106         MINSTATE_GET_CURRENT(r16);      /* M (or M;;I) */                                       \
 107         mov r27=ar.rsc;                 /* M */                                                 \
 108         mov r20=r1;                     /* A */                                                 \
 109         mov r25=ar.unat;                /* M */                                                 \
 110         /* mov r29=cr.ipsr;             /* M */                                                 \
 111         movl r29=XSI_IPSR;;                                                                     \
 112         ld8 r29=[r29];;                                                                         \
 113         mov r26=ar.pfs;                 /* I */                                                 \
 114         /* mov r28=cr.iip;              /* M */                                                 \
 115         movl r28=XSI_IIP;;                                                                      \
 116         ld8 r28=[r28];;                                                                         \
 117         mov r21=ar.fpsr;                /* M */                                                 \
 118         COVER;                  /* B;; (or nothing) */                                  \
 119         ;;                                                                                      \
 120         adds r16=IA64_TASK_THREAD_ON_USTACK_OFFSET,r16;                                         \
 121         ;;                                                                                      \
 122         ld1 r17=[r16];                          /* load current->thread.on_ustack flag */       \
 123         st1 [r16]=r0;                           /* clear current->thread.on_ustack flag */      \
 124         adds r1=-IA64_TASK_THREAD_ON_USTACK_OFFSET,r16                                          \
 125         /* switch from user to kernel RBS: */                                                   \
 126         ;;                                                                                      \
 127         invala;                         /* M */                                                 \
 128         /* SAVE_IFS; /* see xen special handling below */                                               \
 129         cmp.eq pKStk,pUStk=r0,r17;              /* are we in kernel mode already? */            \
 130         ;;                                                                                      \
 131         MINSTATE_START_SAVE_MIN                                                                 \
 132         adds r17=2*L1_CACHE_BYTES,r1;           /* really: biggest cache-line size */           \
 133         adds r16=PT(CR_IPSR),r1;                                                                \
 134         ;;                                                                                      \
 135         lfetch.fault.excl.nt1 [r17],L1_CACHE_BYTES;                                             \
 136         st8 [r16]=r29;          /* save cr.ipsr */                                              \
 137         ;;                                                                                      \
 138         lfetch.fault.excl.nt1 [r17];                                                            \
 139         tbit.nz p15,p0=r29,IA64_PSR_I_BIT;                                                      \
 140         mov r29=b0                                                                              \
 141         ;;                                                                                      \
 142         adds r16=PT(R8),r1;     /* initialize first base pointer */                             \
 143         adds r17=PT(R9),r1;     /* initialize second base pointer */                            \
 144 (pKStk) mov r18=r0;             /* make sure r18 isn't NaT */                                   \
 145         ;;                                                                                      \
 146 .mem.offset 0,0; st8.spill [r16]=r8,16;                                                         \
 147 .mem.offset 8,0; st8.spill [r17]=r9,16;                                                         \
 148         ;;                                                                                      \
 149 .mem.offset 0,0; st8.spill [r16]=r10,24;                                                        \
 150 .mem.offset 8,0; st8.spill [r17]=r11,24;                                                        \
 151         ;;                                                                                      \
 152         /* xen special handling for possibly lazy cover */                                      \
 153         movl r8=XSI_INCOMPL_REGFR;                                                              \
 154         ;;                                                                                      \
 155         ld4 r30=[r8];                                                                           \
 156         ;;                                                                                      \
 157         /* set XSI_INCOMPL_REGFR 0 */                                                           \
 158         st4 [r8]=r0;                                                                            \
 159         cmp.eq  p6,p7=r30,r0;                                                                   \
 160         ;; /* not sure if this stop bit is necessary */                                         \
 161 (p6)    adds r8=XSI_PRECOVER_IFS-XSI_INCOMPL_REGFR,r8;                                          \
 162 (p7)    adds r8=XSI_IFS-XSI_INCOMPL_REGFR,r8;                                                   \
 163         ;;                                                                                      \
 164         ld8 r30=[r8];                                                                           \
 165         ;;                                                                                      \
 166         st8 [r16]=r28,16;       /* save cr.iip */                                               \
 167         st8 [r17]=r30,16;       /* save cr.ifs */                                               \
 168 (pUStk) sub r18=r18,r22;        /* r18=RSE.ndirty*8 */                                          \
 169         mov r8=ar.ccv;                                                                          \
 170         mov r9=ar.csd;                                                                          \
 171         mov r10=ar.ssd;                                                                         \
 172         movl r11=FPSR_DEFAULT;   /* L-unit */                                                   \
 173         ;;                                                                                      \
 174         st8 [r16]=r25,16;       /* save ar.unat */                                              \
 175         st8 [r17]=r26,16;       /* save ar.pfs */                                               \
 176         shl r18=r18,16;         /* compute ar.rsc to be used for "loadrs" */                    \
 177         ;;                                                                                      \
 178         st8 [r16]=r27,16;       /* save ar.rsc */                                               \
 179 (pUStk) st8 [r17]=r24,16;       /* save ar.rnat */                                              \
 180 (pKStk) adds r17=16,r17;        /* skip over ar_rnat field */                                   \
 181         ;;                      /* avoid RAW on r16 & r17 */                                    \
 182 (pUStk) st8 [r16]=r23,16;       /* save ar.bspstore */                                          \
 183         st8 [r17]=r31,16;       /* save predicates */                                           \
 184 (pKStk) adds r16=16,r16;        /* skip over ar_bspstore field */                               \
 185         ;;                                                                                      \
 186         st8 [r16]=r29,16;       /* save b0 */                                                   \
 187         st8 [r17]=r18,16;       /* save ar.rsc value for "loadrs" */                            \
 188         cmp.eq pNonSys,pSys=r0,r0       /* initialize pSys=0, pNonSys=1 */                      \
 189         ;;                                                                                      \
 190 .mem.offset 0,0; st8.spill [r16]=r20,16;        /* save original r1 */                          \
 191 .mem.offset 8,0; st8.spill [r17]=r12,16;                                                        \
 192         adds r12=-16,r1;        /* switch to kernel memory stack (with 16 bytes of scratch) */  \
 193         ;;                                                                                      \
 194 .mem.offset 0,0; st8.spill [r16]=r13,16;                                                        \
 195 .mem.offset 8,0; st8.spill [r17]=r21,16;        /* save ar.fpsr */                              \
 196         mov r13=IA64_KR(CURRENT);       /* establish `current' */                               \
 197         ;;                                                                                      \
 198 .mem.offset 0,0; st8.spill [r16]=r15,16;                                                        \
 199 .mem.offset 8,0; st8.spill [r17]=r14,16;                                                        \
 200         ;;                                                                                      \
 201 .mem.offset 0,0; st8.spill [r16]=r2,16;                                                         \
 202 .mem.offset 8,0; st8.spill [r17]=r3,16;                                                         \
 203         ;;                                                                                      \
 204         EXTRA;                                                                                  \
 205         mov r2=b0; br.call.sptk b0=xen_bsw1;; mov b0=r2;                                        \
 206         adds r2=IA64_PT_REGS_R16_OFFSET,r1;                                                     \
 207         ;;                                                                                      \
 208         movl r1=__gp;           /* establish kernel global pointer */                           \
 209         ;;                                                                                      \
 210         /* MINSTATE_END_SAVE_MIN */
 211 #else
 212 #define DO_SAVE_MIN(COVER,SAVE_IFS,EXTRA)                                                       \
 213         MINSTATE_GET_CURRENT(r16);      /* M (or M;;I) */                                       \
 214         mov r27=ar.rsc;                 /* M */                                                 \
 215         mov r20=r1;                     /* A */                                                 \
 216         mov r25=ar.unat;                /* M */                                                 \
 217         mov r29=cr.ipsr;                /* M */                                                 \
 218         mov r26=ar.pfs;                 /* I */                                                 \
 219         mov r28=cr.iip;                 /* M */                                                 \
 220         mov r21=ar.fpsr;                /* M */                                                 \
 221         COVER;                          /* B;; (or nothing) */                                  \
 222         ;;                                                                                      \
 223         adds r16=IA64_TASK_THREAD_ON_USTACK_OFFSET,r16;                                         \
 224         ;;                                                                                      \
 225         ld1 r17=[r16];                          /* load current->thread.on_ustack flag */       \
 226         st1 [r16]=r0;                           /* clear current->thread.on_ustack flag */      \
 227         adds r1=-IA64_TASK_THREAD_ON_USTACK_OFFSET,r16                                          \
 228         /* switch from user to kernel RBS: */                                                   \
 229         ;;                                                                                      \
 230         invala;                         /* M */                                                 \
 231         SAVE_IFS;                                                                               \
 232         cmp.eq pKStk,pUStk=r0,r17;              /* are we in kernel mode already? */            \
 233         ;;                                                                                      \
 234         MINSTATE_START_SAVE_MIN                                                                 \
 235         adds r17=2*L1_CACHE_BYTES,r1;           /* really: biggest cache-line size */           \
 236         adds r16=PT(CR_IPSR),r1;                                                                \
 237         ;;                                                                                      \
 238         lfetch.fault.excl.nt1 [r17],L1_CACHE_BYTES;                                             \
 239         st8 [r16]=r29;          /* save cr.ipsr */                                              \
 240         ;;                                                                                      \
 241         lfetch.fault.excl.nt1 [r17];                                                            \
 242         tbit.nz p15,p0=r29,IA64_PSR_I_BIT;                                                      \
 243         mov r29=b0                                                                              \
 244         ;;                                                                                      \
 245         adds r16=PT(R8),r1;     /* initialize first base pointer */                             \
 246         adds r17=PT(R9),r1;     /* initialize second base pointer */                            \
 247 (pKStk) mov r18=r0;             /* make sure r18 isn't NaT */                                   \
 248         ;;                                                                                      \
 249 .mem.offset 0,0; st8.spill [r16]=r8,16;                                                         \
 250 .mem.offset 8,0; st8.spill [r17]=r9,16;                                                         \
 251         ;;                                                                                      \
 252 .mem.offset 0,0; st8.spill [r16]=r10,24;                                                        \
 253 .mem.offset 8,0; st8.spill [r17]=r11,24;                                                        \
 254         ;;                                                                                      \
 255         st8 [r16]=r28,16;       /* save cr.iip */                                               \
 256         st8 [r17]=r30,16;       /* save cr.ifs */                                               \
 257 (pUStk) sub r18=r18,r22;        /* r18=RSE.ndirty*8 */                                          \
 258         mov r8=ar.ccv;                                                                          \
 259         mov r9=ar.csd;                                                                          \
 260         mov r10=ar.ssd;                                                                         \
 261         movl r11=FPSR_DEFAULT;   /* L-unit */                                                   \
 262         ;;                                                                                      \
 263         st8 [r16]=r25,16;       /* save ar.unat */                                              \
 264         st8 [r17]=r26,16;       /* save ar.pfs */                                               \
 265         shl r18=r18,16;         /* compute ar.rsc to be used for "loadrs" */                    \
 266         ;;                                                                                      \
 267         st8 [r16]=r27,16;       /* save ar.rsc */                                               \
 268 (pUStk) st8 [r17]=r24,16;       /* save ar.rnat */                                              \
 269 (pKStk) adds r17=16,r17;        /* skip over ar_rnat field */                                   \
 270         ;;                      /* avoid RAW on r16 & r17 */                                    \
 271 (pUStk) st8 [r16]=r23,16;       /* save ar.bspstore */                                          \
 272         st8 [r17]=r31,16;       /* save predicates */                                           \
 273 (pKStk) adds r16=16,r16;        /* skip over ar_bspstore field */                               \
 274         ;;                                                                                      \
 275         st8 [r16]=r29,16;       /* save b0 */                                                   \
 276         st8 [r17]=r18,16;       /* save ar.rsc value for "loadrs" */                            \
 277         cmp.eq pNonSys,pSys=r0,r0       /* initialize pSys=0, pNonSys=1 */                      \
 278         ;;                                                                                      \
 279 .mem.offset 0,0; st8.spill [r16]=r20,16;        /* save original r1 */                          \
 280 .mem.offset 8,0; st8.spill [r17]=r12,16;                                                        \
 281         adds r12=-16,r1;        /* switch to kernel memory stack (with 16 bytes of scratch) */  \
 282         ;;                                                                                      \
 283 .mem.offset 0,0; st8.spill [r16]=r13,16;                                                        \
 284 .mem.offset 8,0; st8.spill [r17]=r21,16;        /* save ar.fpsr */                              \
 285         mov r13=IA64_KR(CURRENT);       /* establish `current' */                               \
 286         ;;                                                                                      \
 287 .mem.offset 0,0; st8.spill [r16]=r15,16;                                                        \
 288 .mem.offset 8,0; st8.spill [r17]=r14,16;                                                        \
 289         ;;                                                                                      \
 290 .mem.offset 0,0; st8.spill [r16]=r2,16;                                                         \
 291 .mem.offset 8,0; st8.spill [r17]=r3,16;                                                         \
 292         adds r2=IA64_PT_REGS_R16_OFFSET,r1;                                                     \
 293         ;;                                                                                      \
 294         EXTRA;                                                                                  \
 295         movl r1=__gp;           /* establish kernel global pointer */                           \
 296         ;;                                                                                      \
 297         MINSTATE_END_SAVE_MIN
 298 #endif
 299
 300 /*
 301  * SAVE_REST saves the remainder of pt_regs (with psr.ic on).
 302  *
 303  * Assumed state upon entry:
 304  *      psr.ic: on
 305  *      r2:     points to &pt_regs.r16
 306  *      r3:     points to &pt_regs.r17
 307  *      r8:     contents of ar.ccv
 308  *      r9:     contents of ar.csd
 309  *      r10:    contents of ar.ssd
 310  *      r11:    FPSR_DEFAULT
 311  *
 312  * Registers r14 and r15 are guaranteed not to be touched by SAVE_REST.
 313  */
 314 #define SAVE_REST                               \
 315 .mem.offset 0,0; st8.spill [r2]=r16,16;         \
 316 .mem.offset 8,0; st8.spill [r3]=r17,16;         \
 317         ;;                                      \
 318 .mem.offset 0,0; st8.spill [r2]=r18,16;         \
 319 .mem.offset 8,0; st8.spill [r3]=r19,16;         \
 320         ;;                                      \
 321 .mem.offset 0,0; st8.spill [r2]=r20,16;         \
 322 .mem.offset 8,0; st8.spill [r3]=r21,16;         \
 323         mov r18=b6;                             \
 324         ;;                                      \
 325 .mem.offset 0,0; st8.spill [r2]=r22,16;         \
 326 .mem.offset 8,0; st8.spill [r3]=r23,16;         \
 327         mov r19=b7;                             \
 328         ;;                                      \
 329 .mem.offset 0,0; st8.spill [r2]=r24,16;         \
 330 .mem.offset 8,0; st8.spill [r3]=r25,16;         \
 331         ;;                                      \
 332 .mem.offset 0,0; st8.spill [r2]=r26,16;         \
 333 .mem.offset 8,0; st8.spill [r3]=r27,16;         \
 334         ;;                                      \
 335 .mem.offset 0,0; st8.spill [r2]=r28,16;         \
 336 .mem.offset 8,0; st8.spill [r3]=r29,16;         \
 337         ;;                                      \
 338 .mem.offset 0,0; st8.spill [r2]=r30,16;         \
 339 .mem.offset 8,0; st8.spill [r3]=r31,32;         \
 340         ;;                                      \
 341         mov ar.fpsr=r11;        /* M-unit */    \
 342         st8 [r2]=r8,8;          /* ar.ccv */    \
 343         adds r24=PT(B6)-PT(F7),r3;              \
 344         ;;                                      \
 345         stf.spill [r2]=f6,32;                   \
 346         stf.spill [r3]=f7,32;                   \
 347         ;;                                      \
 348         stf.spill [r2]=f8,32;                   \
 349         stf.spill [r3]=f9,32;                   \
 350         ;;                                      \
 351         stf.spill [r2]=f10;                     \
 352         stf.spill [r3]=f11;                     \
 353         adds r25=PT(B7)-PT(F11),r3;             \
 354         ;;                                      \
 355         st8 [r24]=r18,16;       /* b6 */        \
 356         st8 [r25]=r19,16;       /* b7 */        \
 357         ;;                                      \
 358         st8 [r24]=r9;           /* ar.csd */    \
 359         st8 [r25]=r10;          /* ar.ssd */    \
 360         ;;
 361
 362 #define SAVE_MIN_WITH_COVER     DO_SAVE_MIN(cover, mov r30=cr.ifs,)
 363 #define SAVE_MIN_WITH_COVER_R19 DO_SAVE_MIN(cover, mov r30=cr.ifs, mov r15=r19)
 364 #ifdef CONFIG_XEN
 365 #define SAVE_MIN                break 0;; /* FIXME: non-cover version only for ia32 support? */
 366 #else
 367 #define SAVE_MIN                DO_SAVE_MIN(     , mov r30=r0, )
 368 #endif